CN204666777U - Reverse recovery current is utilized to measure the circuit of bidirectional semiconductor switch carrier lifetime - Google Patents
Reverse recovery current is utilized to measure the circuit of bidirectional semiconductor switch carrier lifetime Download PDFInfo
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- CN204666777U CN204666777U CN201520346506.8U CN201520346506U CN204666777U CN 204666777 U CN204666777 U CN 204666777U CN 201520346506 U CN201520346506 U CN 201520346506U CN 204666777 U CN204666777 U CN 204666777U
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Abstract
The utility model provides a kind of circuit utilizing reverse recovery current to measure bidirectional semiconductor switch carrier lifetime.Comprise output pulses generator (M1), sampling pulse generator (M1), the first field effect transistor (FET1), triode (Q1), the first resistance (R1), the second resistance (R2), the 3rd resistance (R3), integrating capacitor (C) and voltage table (J).Ground connection after the positive pole of the negative pole of output pulses generator and this switch first end and sampling pulse generator is connected, the positive pole of output pulses generator is connected with the source electrode of this field effect transistor; The drain electrode of this field effect transistor is connected with this switch the 3rd end by the second resistance, is also connected with the base stage of triode by the 3rd resistance, and the grid of this field effect transistor is connected with this switch second end by the first resistance; The collector of triode is connected with the positive pole of voltage table, the minus earth of voltage table, and this collector is also connected with the negative pole of sampling pulse generator by integrating capacitor, and the emitter of triode is connected with switch the 3rd end.The utility model can measure the carrier lifetime of the devices such as bidirectional thyristor.
Description
Technical field
The utility model relates to semiconductor switch field of measuring technique, particularly relates to a kind of circuit utilizing reverse recovery current to measure the bidirectional semiconductor switch efficient carrier life-span.
Background technology
Utilize the junction voltage attenuation measurement efficient carrier life-span (hereinafter referred to as: circuit τ) has been successfully applied to diode, rectifier and transistor, and cannot be suitable for for the semiconductor switch device (as thyristor) that inside comprises multiple knot, need other technology to determine τ.
Therefore, people can adopt QRR circuit to carry out measuring semiconductor switching device τ usually.This QRR circuit is for practical traditional semiconductor single-way switch device τ with unidirectional thyristor characteristic tests, but because bidirectional thyristor has the easily triggering and feature of easy conducting, therefore the bidirectional semiconductor switch device τ with bidirectional thyristor characteristic to be tested and inapplicable, and lack a kind of feasible test circuit.
As can be seen here, need a kind of circuit badly, solve the problem that bidirectional semiconductor switch device τ cannot measure.
Summary of the invention
The utility model embodiment technical matters to be solved is, a kind of circuit utilizing reverse recovery current to measure bidirectional semiconductor switch carrier lifetime is provided, can overcome that this type of switch easily triggers, the easy feature such as conducting, property, thus the bidirectional semiconductor switch efficient carrier life-span can be measured.
In order to solve the problems of the technologies described above, the utility model embodiment provides a kind of circuit to measuring the bidirectional semiconductor switch efficient carrier life-span, it matches with tested bidirectional semiconductor switch, and described circuit comprises output pulses generator, sampling pulse generator, the first field effect transistor, triode, the first resistance, the second resistance, the 3rd resistance, integrating capacitor and voltage table; Wherein,
Ground connection after the negative pole of described output pulses generator is connected with the first end of described tested bidirectional semiconductor switch and the positive pole of described sampling pulse generator, the positive pole of described output pulses generator is connected with the source electrode of described first field effect transistor;
The drain electrode of described first field effect transistor is connected with the 3rd end of described tested bidirectional semiconductor switch by described second resistance, and be also connected with the base stage of described triode by described 3rd resistance, the grid of described first field effect transistor is connected with the second end of described tested bidirectional semiconductor switch by described first resistance;
The collector of described triode is connected with the positive pole of described voltage table, and is also connected by the negative pole of described integrating capacitor with described sampling pulse generator, and the emitter of described triode is connected with the 3rd end of described tested bidirectional semiconductor switch.
Further, described circuit also comprises for stablizing described first fet gate side described in driver driver and comprises the second field effect transistor (FET2), the first commutation diode (D1), the second commutation diode (D2), negative voltage feedback time delay network (Td), operational amplifier (U1), filter capacitor (C1), inductance (L1) and the 3rd field effect transistor (FET3); Wherein,
The grid of described second field effect transistor (FET2) connects the positive pole of described output pulses generator (M1), the source electrode of described second field effect transistor (FET2) connects the input end of described negative voltage feedback time delay network (Td), described first commutation diode (D1) and described second commutation diode (D2) are connected with the end of oppisite phase of described operational amplifier (U1) after connecting, described first commutation diode (D1) is also connected with the described drain electrode of the 3rd field effect transistor (FET3) and the grid of described first field effect transistor (FET1) by described inductance (L1),
The in-phase end of described operational amplifier (U1) connects reference voltage V
ref, the output terminal of described operational amplifier (U1) is connected by the grid of described negative voltage feedback time delay network (Td) with described 3rd field effect transistor (FET3).
Implement the utility model embodiment, there is following beneficial effect:
1, in the utility model embodiment, because output pulses generator can first discharge to circuit, sampling pulse generator loads reverse sampling pulse to circuit again, thus effectively prevent the easily triggering and easy conduction of tested bidirectional semiconductor switch, and when circuit loads reverse sampling pulse, obtain the time delay of twice range value specific change before and after voltage table, and determine τ according to the difference of twice time delay, thus the bidirectional semiconductor switch efficient carrier life-span can be measured;
2, in the utility model embodiment, owing to adding the driver stablizing its grid voltage in circuit to the first field effect transistor, thus improve the stability of measurement, reduce the first fet switch loss.
Accompanying drawing explanation
In order to be illustrated more clearly in the technical scheme of the utility model embodiment, be briefly described to the accompanying drawing used required in the description of embodiment technical scheme below, apparently, accompanying drawing in the following describes is only embodiments more of the present utility model, for those of ordinary skill in the art, under the prerequisite not paying creative work, the accompanying drawing obtaining other according to these accompanying drawings still belongs to category of the present utility model.
The connection diagram of the basic circuit in the measurement bidirectional semiconductor switch efficient carrier life-span that Fig. 1 provides for the utility model embodiment;
Fig. 2 a is that in Fig. 1, tested bidirectional semiconductor switch DUT loads the ranging pulse oscillogram (based on i-t curve) after reverse sampling pulse;
Fig. 2 b is that in Fig. 1, tested bidirectional semiconductor switch DUT loads the ranging pulse oscillogram (based on Vc-t curve) after reverse sampling pulse;
Fig. 3 is the circuit connection diagram of the first field effect transistor FET1 gate side drive device application scenarios in Fig. 1;
Fig. 4 is the reverse recovery current oscillogram of the bidirectional semiconductor switch utilizing Fig. 1 to measure;
Fig. 5 is the reverse recovery current oscillogram of the bidirectional semiconductor switch utilizing Fig. 3 and Fig. 1 to measure.
Embodiment
For making the purpose of this utility model, technical scheme and advantage clearly, below in conjunction with accompanying drawing, the utility model is described in further detail.
As shown in Figure 1, for in the utility model embodiment, a kind of circuit measuring the bidirectional semiconductor switch efficient carrier life-span provided, it matches with tested bidirectional semiconductor switch DUT, and circuit comprises output pulses generator M1, sampling pulse generator M2, the first field effect transistor FET1, triode Q1, the first resistance R1, the second resistance R2, the 3rd resistance R3, integrating capacitor C and voltage table J; Wherein,
Ground connection after the output terminal of output pulses generator M1 is connected with the first end a1 of tested bidirectional semiconductor switch DUT and the input end of sampling pulse generator M2, output terminal is connected with the source electrode of the first field effect transistor FET1;
The drain electrode of the first field effect transistor FET1 is connected with the 3rd end a3 of tested bidirectional semiconductor switch DUT by the second resistance R2, and be also connected with the base stage of triode Q1 by the 3rd resistance R3, the grid of the first field effect transistor FET1 is connected with the second end a2 of tested bidirectional semiconductor switch DUT by the first resistance R1;
The collector of triode Q1 is connected with voltage table J, and is also connected with the input end of sampling pulse generator M2 by integrating capacitor C, and the emitter of triode Q1 is connected with the 3rd end a3 of tested bidirectional semiconductor switch DUT.
The principle of work of the circuit in the measurement bidirectional semiconductor switch efficient carrier life-span in the utility model embodiment is: first, output pulses generator M1 is connected with tested bidirectional semiconductor switch DUT with the second resistance R2 by the first field effect transistor FET1, now triode Q1 conducting, discharges to the electricity that voltage fills to integrating capacitor C before.After suitable delay, utilize sampling pulse generator M2 to load reverse sampling pulse by the base-assembly of triode Q1, the second resistance R2 and the 3rd R3, effectively prevent tested bidirectional semiconductor switch DUT from triggering.Now, as shown in Figure 2 a and 2 b, when to obtain voltage table reading be full scale value first time delay T1 (wherein, T1>> τ) value, and continue to postpone, until when voltage table reading is 36.8% of full scale, determine second time delay T2 value, then determine the τ of tested bidirectional semiconductor switch DUT according to formula τ=T2-T1.
It should be noted that before concrete measurement, the accuracy about measurement instrument should be calibrated.
The key of the circuit in the measurement bidirectional semiconductor switch efficient carrier life-span in the utility model embodiment is the driving of the first field effect transistor FET1.On the one hand, because the first field effect transistor FET1 raster data model exists stray inductance, the switching speed of the first field effect transistor FET1 is limited; On the other hand, because the damping resistance of the first field effect transistor FET1 raster data model causes internal switch loss, and export higher-order of oscillation noise be added to tested bidirectional semiconductor switch DUT reverse recovery current on, disturb the accuracy of measurement of τ in tested bidirectional semiconductor switch DUT.Therefore, improve the accuracy of measurement in order to ensure the first field effect transistor FET1 gate electrode side voltage stabilization, the circuit in the measurement bidirectional semiconductor switch efficient carrier life-span in the utility model embodiment also comprises the driver for stablizing the first field effect transistor FET1 grid.
In one embodiment, as shown in Figure 3,
Described driver comprises the second field effect transistor (FET2), the first commutation diode (D1), the second commutation diode (D2), negative voltage feedback time delay network (Td), operational amplifier (U1), filter capacitor (C1), inductance (L1) and the 3rd field effect transistor (FET3); Wherein,
The grid of described second field effect transistor (FET2) connects the positive pole of described output pulses generator (M1), the source electrode of described second field effect transistor (FET2) connects the input end of described negative voltage feedback time delay network (Td), described first commutation diode (D1) and described second commutation diode (D2) are connected with the end of oppisite phase of described operational amplifier (U1) after connecting, described first commutation diode (D1) is also connected with the described drain electrode of the 3rd field effect transistor (FET3) and the grid of described first field effect transistor (FET1) by described inductance (L1),
The in-phase end of described operational amplifier (U1) connects reference voltage V
ref, the output terminal of described operational amplifier (U1) is connected by the grid of described negative voltage feedback time delay network (Td) with described 3rd field effect transistor (FET3).
Comparison diagram 4 is visible with Fig. 5, and after being loaded with the gate driver circuit of the first field effect transistor FET1, the reverse recovery current waveform of bidirectional semiconductor switch is more clear, and the higher-order of oscillation disappears.Be conducive to reverse sampling pulse and reasonably intercept reverse recovery time, thus obtain minority carrier lifetime accurately.
Implement the utility model embodiment, there is following beneficial effect:
1, in the utility model embodiment, because output pulses generator can first discharge to circuit, sampling pulse generator loads reverse sampling pulse to circuit again, thus effectively prevent the easily triggering and easy conduction of tested bidirectional semiconductor switch, and when circuit loads reverse sampling pulse, obtain the time delay of twice range value specific change before and after voltage table, and determine τ according to the difference of twice time delay, thus the bidirectional semiconductor switch efficient carrier life-span can be measured;
2, in the utility model embodiment, owing to adding the driver stablizing its grid voltage in circuit to the first field effect transistor, thus improve the stability of measurement, reduce the first fet switch loss.
One of ordinary skill in the art will appreciate that all or part of step realized in above-described embodiment circuit is that the hardware that can carry out instruction relevant by program has come, described program can be stored in a computer read/write memory medium, described storage medium, as the ROM/RAM, disk, CD etc. of CPU.
Above disclosedly be only a kind of preferred embodiment of the utility model, certainly can not limit the interest field of the utility model with this, therefore according to the equivalent variations that the utility model claim is done, still belong to the scope that the utility model is contained.
Claims (3)
1. the circuit utilizing reverse recovery current to measure bidirectional semiconductor switch carrier lifetime, it matches with tested bidirectional semiconductor switch, it is characterized in that, described circuit comprises output pulses generator (M1), sampling pulse generator (M2), the first field effect transistor (FET1), triode (Q1), the first resistance (R1), the second resistance (R2), the 3rd resistance (R3), integrating capacitor (C) and voltage table (J); Wherein,
Ground connection after the positive pole of the negative pole of described output pulses generator (M1) and the first end of described tested bidirectional semiconductor switch and described sampling pulse generator (M2) is connected, the positive pole of described output pulses generator (M1) is connected with the source electrode of described first field effect transistor (FET1);
The drain electrode of described first field effect transistor (FET1) is connected with the 3rd end (a3) of described tested bidirectional semiconductor switch by described second resistance (R2), and be also connected with the base stage of described triode (Q1) by described 3rd resistance (R3), the grid of described first field effect transistor (FET1) is connected with second end (a2) of described tested bidirectional semiconductor switch by described first resistance (R1);
The collector of described triode (Q1) is connected with the positive pole of described voltage table (J), and be also connected by the negative pole of described integrating capacitor (C) with described sampling pulse generator (M2), the emitter of described triode (Q1) is connected with the 3rd end (a3) of described tested bidirectional semiconductor switch.
2. circuit as claimed in claim 1, it is characterized in that, described circuit also comprises the driver for stablizing described first field effect transistor (FET1) gate electrode side.
3. circuit as claimed in claim 2, it is characterized in that, described driver comprises the second field effect transistor (FET2), the first commutation diode (D1), the second commutation diode (D2), negative voltage feedback time delay network (Td), operational amplifier (U1), filter capacitor (C1), inductance (L1) and the 3rd field effect transistor (FET3);
Wherein, the grid of described second field effect transistor (FET2) connects the positive pole of described output pulses generator (M1), the source electrode of the second field effect transistor (FET2) connects the input end of described negative voltage feedback time delay network (Td), described first commutation diode (D1) and the second commutation diode (D2) are connected with the end of oppisite phase of described operational amplifier (U1) after connecting, described first commutation diode (D1) is also connected with the described drain electrode of the 3rd field effect transistor (FET3) and the grid of the first field effect transistor (FET1) by described inductance (L1),
The in-phase end of described operational amplifier (U1) connects reference voltage (V
ref), the output terminal of described operational amplifier (U1) is connected by the grid of described negative voltage feedback time delay network (Td) with described 3rd field effect transistor (FET3).
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111381143A (en) * | 2020-03-18 | 2020-07-07 | 华中科技大学 | RBDT dynamic characteristic testing device and testing method |
| RU201072U1 (en) * | 2020-05-28 | 2020-11-25 | Акционерное общество "ПРОТОН-ЭЛЕКТРОТЕКС" | INSTALLATION FOR MEASURING THE LIFE TIME OF NON-FUNDAMENTAL CHARGE CARRIERS IN THE BASES OF SEMICONDUCTOR DEVICES |
| CN113156289A (en) * | 2020-12-18 | 2021-07-23 | 国网辽宁省电力有限公司经济技术研究院 | High-precision testing device and method for reverse recovery current of non-fully-controlled semiconductor device |
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111381143A (en) * | 2020-03-18 | 2020-07-07 | 华中科技大学 | RBDT dynamic characteristic testing device and testing method |
| CN111381143B (en) * | 2020-03-18 | 2021-07-27 | 华中科技大学 | RBDT dynamic characteristic testing device and testing method |
| RU201072U1 (en) * | 2020-05-28 | 2020-11-25 | Акционерное общество "ПРОТОН-ЭЛЕКТРОТЕКС" | INSTALLATION FOR MEASURING THE LIFE TIME OF NON-FUNDAMENTAL CHARGE CARRIERS IN THE BASES OF SEMICONDUCTOR DEVICES |
| CN113156289A (en) * | 2020-12-18 | 2021-07-23 | 国网辽宁省电力有限公司经济技术研究院 | High-precision testing device and method for reverse recovery current of non-fully-controlled semiconductor device |
| CN113156289B (en) * | 2020-12-18 | 2022-11-11 | 国网辽宁省电力有限公司经济技术研究院 | High-precision testing device and method for reverse recovery current of non-fully-controlled semiconductor device |
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