201218885 六、發明說明： 【發明所屬之技術領域】 [⑽1] 本發明涉及電路板製造技術，尤其涉及—插带 1里龟路扳製作 方法。 【先前技術】 [0002] 在資訊、通訊及消費性電子產業中，電路板為所有電子 產品不可或缺之基本構成要件。隨著電子產品往小型化 、高速化方向發展，電路板亦從單面電路板往雙面電路 板、多層電路板方向發展。.多.層電路.板由於具有較多佈 線面積與較高裝配密度雨得到廣泛應甩，請參見Taka- hashi，A.等人於 1992年發表於IEEE Trans. on Components, Packaging, and Manufacturing Technology 之文獻 “High density multilayer printed circuit board f〇r HITAC M〜880” 。 [0003] 雙面電路板具有兩層導電層’兩層導電層之間通過導孔 實現訊號連接。導孔一般通過鑽孔、化學鍍及電鍍之工 藝形成。在先前技術中’對於製作導孔中之鑽孔工序一 般係僅採用機械鑽孔工藝，或者僅採用雷射鑽孔工藝。 惟，機械鑽孔之製作精度不佳，而雷射鑽孔雖然精度較 高，但使用雷射鑽導電層時則速度較慢，需要較長之製 作時間。並且，僅有紫外雷射適合用於鑽導電層，但使 用紫外雷射之成本較高。 [〇〇〇4] 有鑑於此，有必要提供一種可具有較高製作效率與製作 精度之電路板製作方法。 【發明内容】 099136851 表單編號A0101 第4頁/共28頁 0992064361-0 201218885 [0005]以下將以實施例說明一種電路板製作方法。 [00〇6]—種電路板製作方法，包括步驟：提供雙面覆銅板，所 述雙面覆銅板包括絕緣層、第—銅箔層及第二銅箔層， 所述絕緣層位於第一銅箔層與第二銅箔層之間；以牝學 j 蝕刻工藝在第一銅箔層中形成複數第一孔，在在第〆銅 箔層中形成複數第二孔，所述複數第 一孔與所述旅數第 二孔—一對應，且每個第一孔之孔徑均大於或等於與其 對應之第二孔之孔徑；以雷射燒蝕工藝在所述絶緣層肀 0 形成與複數第二孔--對應之複數第三孔，每個第，孔 之孔徑均等於或小於與其對應之第二孔之孔徑，每個第 三孔均連通於一個第一孔與一個第二孔之間，從而所述 複數第一孔、複數第二孔及複數第三孔在所述雙面覆銅 板中構成複數通孔；在暴露於所述複數通孔中之絕緣層 表面形成導電層，從而導通第—銅箔層與第二銅箔層； 以及將第一銅箔層形成第—導電線路，並舉第二銅箔層 形成第二導電線路。 ❹剛本技術方案之電路板製作方法中，採用先化學_第— 銅fl層與第二銅制再用雷射燒舰緣層之工藝製作通 孔’由於化學_之成本較低，而㈣燒純緣層之速 度較快’如此則雜低之生絲本及較高之製作效率實 現了電路板之製作。並且’在製作通孔時，第—銅落層 中之第一孔之孔徑大於或等於第二銅落層之第二孔之孔 徑，如此在生產時僅需保證第二孔之製作精度，即可保 證第-孔之製作精度’亦即降低了生產之難度。而在用 雷射燒#_層形成第三孔時’第三孔之孔徑等於或小 099136851 表單編號A0101 第5頁/共28頁 0992064361-0 201218885 [0008] [0009] [0010] [0011] [0012] 於第二孔之孔徑，如此則保證了通孔之製作精度。 【實施方式】 下面將結合附圖及實施例，對本技術方案提供之電路板 製作方法作進一步之詳細說明。 請參閱圖1，本技術方案實施方式提供一種電路板製作方 法，包括步驟： 第步，凊參閱圖2，提供雙面覆銅板10。所述雙面覆銅 板10包括依次堆疊之第一銅箔層u、絕緣層13及第二銅 箔層12。所述絕緣層13具有第一表面131及與第一表面 131相對之第二表面丨32。所述第一銅箔層丨丨貼合在第一 表面131，所述第二銅箔層12貼合在第二表面132，亦即 ，絕緣層13位於第一銅箔層丨〗與第二鋼箔層12之間。所 述絕緣層13之材料為柔性材料，例如聚醯亞胺（p〇ly_ imide，PI)、聚乙烯對苯二甲酸乙二醇酯(Polyethylene Terephtha!ate，PET)、聚萘二甲酸 乙一醇醋（Polyethylene naphthalate，PEN)等，但 亦可為硬性材料，如環氧樹脂、玻纖布等。 第二步，請一併參閱圖3至圖5 ,以化學蝕刻工藝在第一 鋼箔層11中形成複數第一孔110，並在第二銅箔層12中形 成複數第二孔120。化學蝕刻工藝係指採用蝕刻液蝕刻去 除材料之方法。所述複數第一孔11〇與所述複數第二孔 120 — 一對應，且每個第一孔11〇之孔徑均大於或等於與 其對應之一個第二孔12〇之孔徑。 具體地，請參閱圖3，首先，在第一銅镇層丨丨表面形成第 099136851 表單編號A0101 第6頁/共28頁 0992064361-0 201218885 光阻層14，在第二銅箔層12表面形成第二光阻層15。 所述第一光阻層14與第二光阻層15可為正型光阻，亦可 為負型光阻。其次，對第一光阻層14與第二光阻層15進 仃曝光、顯影，從而圖案化第一光阻層14與第二光阻層 15。在本實施例中，在第一光阻層14中形成複數第—開 口140，在第二光阻層15中形成複數第二開口 150，如圖 4所不。需要說明，複數第一開口 140之數量不限，可為 兩個以上之任意自然數；複數第一開口 140之位置與需要 〇 形成之複數第一孔110之位置相對應；複數第二開口 150 之數量不限’可為，個以上之任意自然數；複數第二開 口 150之位置與需要形成之複數第二孔12〇之位置相對應 在本實施例之圖示中，以兩個第一開口 14〇與兩個第二 開口 150為例進行說明。再次，利用銅钵刻液蝕刻從複數 第-開口 140中暴露出之第-銅箔層11以及從複數第二開 150中暴露出之第二銅箔層12，從而在第一銅箔層u中 化成所述複數第—孔11〇，在第二銅猪層“中形成所述複 〇 數第二孔120，如圖5所示。絕緣層13之第一表面131暴 絡於所述複數第-孔11〇中、絕緣層13之第二表面暴露於 所述複數第一孔120中。所述銅姓刻液可為酸性氣化銅姓 刻液、驗性氣化触刻液或者_系統之制液。舉例 而:，酸性氣化銅㈣液之主要成分包括氣化銅、過氧 氫孤酸氣化納、氯化铵、氣酸納等。最後，請參 閱圖6，通過剝離、磨刷或溶解去除第一光阻層14與第二 光阻層15。 [0013] 在本實施方式中，每個第—力11Λ 母1^第孔110之孔徑均大致在20微米 099136851 表單編號Α0101 第7頁/共28頁 0992064361-0 201218885 至50微米之間’且每個第—孔⑴之孔徑均大於或等於與 其對應之-個第二孔12Q之孔徑。具體地，每個第—孔 11〇之孔徑均為與其對應之一個第二孔120之孔徑之1至2 ^亦即，每個第二孔120之孔徑在20微米至1〇〇微米之 間。需要說明，在本實施方式中，每個第一孔11〇之孔控 可以不同，僅需每個第一孔11〇之孔徑均在與其對應之一 個第二孔1 2 〇之孔徑之2倍以下即可。 [0014] [0015] [0016] 第一步，4參閱圖7，以雷射燒蚀工藝在所述絕緣層13中 形成與複數第二孔120— 一對應之複數第三孔13〇。雷射 燒蝕工藝係指採用雷射燒蝕去除材斜之方法。 具體地，以二氧化碳雷射從靠近第二銅箔層12之位置向 朝向第一銅箔層11之方向燒蝕絕緣層13暴露於複數第二 孔120之部分，從而在所述絕緣層13中形成與複數第二孔 120—一對應之複數第三孔13()。由於雷射從複數第二孔 120向複數第一孔110方向堤蝕絕緣層13，因此，每個第 二孔13 0之孔徑均等於或小於與其對應之第二孔丨2 〇之孔 徑。在本實施例中，每個第三孔13〇之孔徑均等於與其對 應之第一孔120之孔徑。亦即，每個第三孔丨3〇之孔徑均 在20微米至50微米之間。 每個第三孔130均連通於一個第一孔11〇與一個第二孔 120之間，從而所述複數第—孔11〇、複數第二孔12〇及 複數第三孔130在雙面覆銅板10中構成複數通孔1〇〇。亦 即，每個第三孔130以及與其連通之第一孔11〇與第二孔 120共同構成一個通孔1〇〇。在本實施方式中，每個第三 孔130之孔徑亦可不同，僅需第三孔13〇之孔徑小於或等 099136851 表單編號A0101 第8頁/共28頁 0992064361-0 201218885 於與其連通之第二孔120之孔徑即可。 [0017] 第四步，請參閱圖8，在暴露於所述複數通孔100中之絕 緣層13表面形成導電層16，從而將複數通孔100製成複數 導孔，從而導通第一銅箔層11與第二銅箔層12。導電層 16之厚度在5微米至25微米之間。 [0018] 本實施例中，通過黑化、電鍍工藝在暴露於所述複數通 孔100中之絕緣層13表面沈積導電層16。具體地，先通過 黑化工藝在暴露於所述複數通孔100中之絕緣層13表面沈 0 積導電石墨層（圖未示），然後再通過電鍍工藝在導電 石墨層表面、第一銅箔層11表面以及第二銅箔層12表面 沈積電鍍銅層，如此導電石墨層及導電石墨層表面之電 鍍銅層構成了絕緣層13表面之導電層16，從而使得第一 銅箔層11與第二銅箔層12通過導電層16電性連接。需要 說明，由於導電石墨層之厚度較薄，因此未在本實施例 之圖示中繪示。另外，黑化工藝可以黑影工藝、化學沈 銅工藝或其他相關工藝替代。並且，在其他實施例中， 0 亦可僅通過黑化工藝或者化學沈銅工藝形成所述導電層 16。換言之，導電層16可為化學銅層、導電石墨層或者 為多層結構。當導電層16為化學銅層或為導電石墨層時 ，第一銅箔層11表面以及第二銅箔層12表面不形成有鍍 層材料。當導電層16為多層結構時，第一銅箔層11表面 以及第二銅箔層12表面形成有鍍層材料。多層結構可以 為導電石墨層與電鍍銅層之複合結構，亦可為化學銅層 與電鍍銅層之複合結構，還可為其他可沈積在絕緣材料 表面之導電材料層與電鍍銅層一起構成之複合結構。 099136851 表單編號A0101 第9頁/共28頁 0992064361-0 201218885 [0019] [0020] [0021] 另外，本領域技術人討以理解，在導電石墨層表面、 第一㈣和表面以及第二㈣層12表面沈積電鐘銅層 時，由於尖端效應，在第一表面131沈積之電鍵銅層之厚 度可旎大於在其他部位沈積之電鍍銅層之厚度。 第五步，請一併參閱圖9至圖12，將第一銅箱川形成第 一導電線路11卜並將第二銅箱層12形成第二導電線路 121。形成導電線路之工藝可以為化學蝕刻，亦可以為雷 射燒钱。在本實_中，以化學㈣為例進行具體說明 〇 首先，請參閱圖9’在第一銅落層n表面之電鍍銅層表面 形成第三光阻層17 ’在第二鋼落層12表面之電鑛銅層表 面形成第四光阻層18。其次，請參閲嶋，通過曝光、 顯影圖案化第三光阻層17,同時圖案化第四光阻層Μ。 亦即’在第三光阻層17中形成複數第三開σΐ7()，同時在 第四光阻層18中形成複數第四開口⑽。第三光阻層以 圖案與需要在第-銅落㈣中形成之導電線路之圖案相 對應’第四光阻層18之圖案與轉在第二銅箱層12中形 成之導電線路之㈣相制。再次，請㈣㈣，以銅 姓刻液姓刻暴露於複數第三開口 17◦中之第一銅箱層Μ 其表面之電鑛銅層’同時韻刻暴露於複數第四開口 ΐ8〇中 之第二銅箱層12及其表面之電鍍銅層，從而圖案化第— 銅箱層11與第二㈣層12。亦即，在第_㈣層u中形 成與第三光阻層17之圖案相對應之第一導電線路⑴，在 第二㈣層12中形成與第四光阻層18之圖案相對應之第 二導電線路121。最後’請參閱圖12，除去圖案化之第三 099136851 表單編號A0101 第10頁/共28頁 0992064361-0 201218885 先阻層π與第四光阻層18，即可獲得製成之雙面電 2〇。所述雙面電路板20包括第一導電線路iu 線路121及位於第—導電線叫u與第二導電線路12—= 間之_13，第，線路U1與第二_路121通 過複數通孔100中之導電層16實現電性連接。 [0022] 當然，本領域技術人員可 1"，形成第二導電線路121=在:成第一導電線路 電線路m表面及第1電綠後，還可以包括在第-導 及第一導電線路121表面均貼覆覆蓋膜之 Ο [0023] 少频。 並且’需要說L雙面電路板2G亦可用來製作成多 層電路板。亦即，雙面電略板2G可以再與-個以上之單 面電路板、雙面電路板❹層祕板壓合，構成多層電 路板；雙面電路板财可再與—似上單㈣銅板壓合 併通過線路製作工藝構成多層電路板。 [0024] ❹ 本技術方案之製作雙面電路板2G之方法中，採用先化學 姓刻第-㈣和與第二銅簿層12再用雷射燒钱絕緣層 13之工藝製作通孔⑽’由於化學_之成本較低而雷 射燒蝕絕緣層13之速度較快，如此則以較低之生產成本 及較高之製作效率實現了雙面電路板2〇之製作。並且， 在製作通孔100時，第一銅箔層u中之第一孔11〇之孔徑 大於或等於第二銅箔層12之第二孔120之孔徑，如此在生 產時僅需保證第二孔120之製作精度，即可保證第一孔 u〇之製作精度，亦即降低了生產之難度。而在用雷射燒 钮絕緣層13形成第三孔130時，從第二孔120向第一孔 110方向燒银’如此則保證了第三孔1之孔徑範圍，保 099136851 表單編號A0101 第11頁/共28頁 0992064361-0 201218885 證了通孔100之製作精度。 [0025] 綜上所述，本發明確已符合發明專利之要件，遂依法提 出專利申請。惟，以上所述者僅為本發明之較佳實施方 式，自不能以此限制本案之申請專利範圍。舉凡熟悉本 案技藝之人士援依本發明之精神所作之等效修飾或變化 ，皆應涵蓋於以下申請專利範圍内。 【圖式簡單說明】 [0026] 圖1為本技術方案實施方式提供之電路板製作方法之流程 示意圖。 [0027] 圖2為本技術方案實施方式提供之雙面覆銅板之剖視示意 圖。 [0028] 圖3為本技術方案實施方式提供之在雙面覆銅板兩側分別 形成第一光阻層與第二光阻層之後之剖視示意圖。 [0029] 圖4為本技術方案實施方式提供之圖案化第一光阻層與第 二光阻層之後之剖視示意圖。 [0030] 圖5為本技術方案實施方式提供之蝕刻第一銅箔層與第二 銅箔層之後之剖視示意圖。 [0031] 圖6為本技術方案實施方式提供之去除第一光阻層與第二 光阻層之後之剖視示意圖。 [0032] 圖7為本技術方案實施方式提供之採用雷射燒蝕雙面覆銅 板之絕緣層之後形成複數通孔之剖視示意圖。 [0033] 圖8為本技術方案實施方式提供之將複數通孔製成複數導 孔之剖視示意圖。 099136851 表單編號A0101 第12頁/共28頁 0992064361-0 201218885 [0034] [0035] [0036] [0037]201218885 VI. Description of the Invention: [Technical Field of the Invention] [(10) 1] The present invention relates to a circuit board manufacturing technique, and more particularly to a method for manufacturing a turtle blade in the tape 1. [Prior Art] [0002] In the information, communication and consumer electronics industries, circuit boards are an essential component of all electronic products. With the development of electronic products in the direction of miniaturization and high speed, circuit boards have also evolved from single-sided circuit boards to double-sided circuit boards and multilayer circuit boards. Multi-layer circuits. Boards have been widely used due to their more wiring area and higher assembly density. See Taka-has, A. et al., 1992, IEEE Trans. on Components, Packaging, and Manufacturing Technology. The document "High density multilayer printed circuit board f〇r HITAC M~880". [0003] The double-sided circuit board has two conductive layers, and the two conductive layers are connected by a via hole. The via holes are generally formed by a process of drilling, electroless plating, and electroplating. In the prior art, the drilling process in the fabrication of the via holes was generally performed using only a mechanical drilling process, or only a laser drilling process. However, the precision of mechanical drilling is not good, while the precision of laser drilling is high, but the use of laser drilled conductive layers is slower and requires longer production time. Also, only ultraviolet lasers are suitable for drilling conductive layers, but the cost of using ultraviolet lasers is higher. [〇〇〇4] In view of this, it is necessary to provide a circuit board manufacturing method which can have high manufacturing efficiency and manufacturing precision. SUMMARY OF THE INVENTION 099136851 Form No. A0101 Page 4 of 28 0992064361-0 201218885 [0005] A method of fabricating a circuit board will be described below by way of example. [006] A circuit board manufacturing method, comprising the steps of: providing a double-sided copper clad board, the double-sided copper clad board comprising an insulating layer, a first copper foil layer and a second copper foil layer, wherein the insulating layer is located at first Between the copper foil layer and the second copper foil layer; forming a plurality of first holes in the first copper foil layer by a j j etching process, and forming a plurality of second holes in the second copper foil layer, the plural first The hole corresponds to the second hole of the travel number, and the aperture of each first hole is greater than or equal to the aperture of the second hole corresponding thereto; forming and complexing in the insulating layer 以0 by a laser ablation process a second hole--corresponding to the plurality of third holes, each of the holes has a hole diameter equal to or smaller than an aperture of the second hole corresponding thereto, and each of the third holes is connected to a first hole and a second hole Between the plurality of first holes, the plurality of second holes, and the plurality of third holes, forming a plurality of through holes in the double-sided copper clad laminate; forming a conductive layer on a surface of the insulating layer exposed to the plurality of through holes, thereby Conducting the first copper foil layer and the second copper foil layer; and forming the first copper foil layer to form a first conductive The line and the second copper foil layer are formed to form a second conductive line. In the method of manufacturing the circuit board of the technical solution of the present invention, the through hole is formed by the process of using the first chemical_first-copper fl layer and the second copper to re-use the laser-fired ship edge layer, because the cost of the chemical is lower, and (4) The speed of burning the pure edge layer is faster, so the production of the circuit board is realized by the low raw silk and the high production efficiency. And when the through hole is formed, the aperture of the first hole in the first copper falling layer is greater than or equal to the aperture of the second hole of the second copper falling layer, so that only the manufacturing precision of the second hole is ensured during production, that is, The accuracy of the production of the first hole can be guaranteed, which reduces the difficulty of production. When the third hole is formed by the laser firing #_ layer, the aperture of the third hole is equal to or smaller than 099136851. Form No. A0101 Page 5 / Total 28 Page 0992064361-0 201218885 [0008] [0009] [0011] [0012] The aperture of the second hole ensures the precision of the through hole. [Embodiment] Hereinafter, a circuit board manufacturing method provided by the present technical solution will be further described in detail with reference to the accompanying drawings and embodiments. Referring to FIG. 1, an embodiment of the present technical solution provides a circuit board manufacturing method, including the steps. Step: Referring to FIG. 2, a double-sided copper clad laminate 10 is provided. The double-sided copper clad laminate 10 includes a first copper foil layer u, an insulating layer 13, and a second copper foil layer 12 which are sequentially stacked. The insulating layer 13 has a first surface 131 and a second surface 丨 32 opposite the first surface 131. The first copper foil layer is adhered to the first surface 131, and the second copper foil layer 12 is attached to the second surface 132, that is, the insulating layer 13 is located on the first copper foil layer and the second layer Between the steel foil layers 12. The material of the insulating layer 13 is a flexible material, such as p〇ly_imide (PI), polyethylene terephthalate (PET), polyethylene naphthalate. Polyethylene naphthalate (PEN), etc., but can also be a hard material, such as epoxy resin, fiberglass cloth, and the like. In the second step, referring to FIG. 3 to FIG. 5, a plurality of first holes 110 are formed in the first steel foil layer 11 by a chemical etching process, and a plurality of second holes 120 are formed in the second copper foil layer 12. The chemical etching process refers to a method of etching away a material by using an etching solution. The plurality of first holes 11 — correspond to the plurality of second holes 120, and the aperture of each of the first holes 11 均 is greater than or equal to the aperture of a second hole 12 对应 corresponding thereto. Specifically, referring to FIG. 3, first, a surface resist layer 14 is formed on the surface of the second copper foil layer 12 on the surface of the first copper foil layer by forming a number 099136851 form number A0101 page 6 of 28 pages 0992064361-0 201218885. The second photoresist layer 15. The first photoresist layer 14 and the second photoresist layer 15 may be positive photoresists or negative photoresists. Next, the first photoresist layer 14 and the second photoresist layer 15 are exposed and developed to pattern the first photoresist layer 14 and the second photoresist layer 15. In the present embodiment, a plurality of first openings 140 are formed in the first photoresist layer 14, and a plurality of second openings 150 are formed in the second photoresist layer 15, as shown in FIG. It should be noted that the number of the plurality of first openings 140 is not limited and may be any two or more natural numbers; the positions of the plurality of first openings 140 correspond to the positions of the plurality of first holes 110 required to form the plurality of holes; the plurality of second openings 150 The number is not limited to any arbitrary natural number; the position of the plurality of second openings 150 corresponds to the position of the plurality of second holes 12〇 to be formed in the illustration of the embodiment, with two first The opening 14A and the two second openings 150 are described as an example. Again, the first copper foil layer 11 exposed from the plurality of first openings 140 and the second copper foil layer 12 exposed from the plurality of second openings 150 are etched by copper engraving so as to be on the first copper foil layer u Forming the plurality of first holes - 11 holes, forming the second number of holes 208 in the second copper layer ", as shown in FIG. 5. The first surface 131 of the insulating layer 13 is violent in the plural The second surface of the first hole 120 is exposed in the first hole 120. The copper surname may be an acidified copper etchant, an experimental gasification etch or _ The liquid preparation of the system. For example: the main components of the acidified copper (four) liquid include vaporized copper, hydrogen peroxide acid acid sodium, ammonium chloride, sodium sulphate, etc. Finally, please refer to Figure 6, by stripping The first photoresist layer 14 and the second photoresist layer 15 are removed by brushing or dissolving. [0013] In the present embodiment, the aperture of each of the first force 11 第 1 holes 110 is approximately 20 micrometers 099136851 No. 1010101, page 7 / 28 pages 0992064361-0 201218885 to between 50 microns and the aperture of each of the first holes (1) is greater than or equal to its corresponding - the aperture of the second hole 12Q. Specifically, the aperture of each of the first holes 11 is 1 to 2 of the aperture of the second hole 120 corresponding thereto, that is, the aperture of each of the second holes 120 is Between 20 micrometers and 1 micrometer. It should be noted that in the present embodiment, the aperture control of each first hole 11〇 may be different, and only the aperture of each first hole 11〇 is in the corresponding one. [0016] In the first step, 4, referring to FIG. 7, a laser ablation process is formed in the insulating layer 13 and a plurality of seconds. The hole 120 - a corresponding plurality of third holes 13 〇. The laser ablation process refers to a method of removing the oblique of the material by laser ablation. Specifically, the carbon dioxide laser is directed from a position close to the second copper foil layer 12 The direction ablation insulating layer 13 of the first copper foil layer 11 is exposed to a portion of the plurality of second holes 120, thereby forming a plurality of third holes 13() corresponding to the plurality of second holes 120 in the insulating layer 13. Since the laser etches the insulating layer 13 from the plurality of second holes 120 toward the plurality of first holes 110, the aperture of each of the second holes 130 is The aperture of the second aperture 〇2 与其 is equal to or smaller than the aperture of the second aperture 〇2 与其 corresponding thereto. In this embodiment, the aperture of each of the third apertures 13 均 is equal to the aperture of the first aperture 120 corresponding thereto. Each of the third holes 130 is connected between a first hole 11 〇 and a second hole 120, so that the plurality of first holes 11 〇, plural The second hole 12 〇 and the plurality of third holes 130 form a plurality of through holes 1 in the double-sided copper clad laminate 10. That is, each of the third holes 130 and the first hole 11 连通 and the second hole 120 communicating therewith are common Form a through hole 1〇〇. In this embodiment, the aperture of each of the third holes 130 may be different, and only the aperture of the third hole 13〇 is smaller than or equal to 099136851 Form No. A0101 Page 8 / Total 28 Page 0992064361-0 201218885 The aperture of the two holes 120 can be. [0017] In the fourth step, referring to FIG. 8, a conductive layer 16 is formed on the surface of the insulating layer 13 exposed in the plurality of via holes 100, thereby forming the plurality of via holes 100 into a plurality of via holes, thereby turning on the first copper foil. Layer 11 and second copper foil layer 12. The conductive layer 16 has a thickness between 5 microns and 25 microns. In the present embodiment, the conductive layer 16 is deposited on the surface of the insulating layer 13 exposed in the plurality of via holes 100 by a blackening and electroplating process. Specifically, a conductive graphite layer (not shown) is deposited on the surface of the insulating layer 13 exposed in the plurality of via holes 100 by a blackening process, and then the surface of the conductive graphite layer, the first copper foil is passed through an electroplating process. An electroplated copper layer is deposited on the surface of the layer 11 and the surface of the second copper foil layer 12. The electroconductive graphite layer and the electroplated copper layer on the surface of the conductive graphite layer constitute the conductive layer 16 on the surface of the insulating layer 13, so that the first copper foil layer 11 and the first The two copper foil layers 12 are electrically connected through the conductive layer 16. It is to be noted that since the thickness of the conductive graphite layer is thin, it is not shown in the diagram of the embodiment. In addition, the blackening process can be replaced by a black shadow process, a chemical copper process, or other related processes. Moreover, in other embodiments, 0 may also form the conductive layer 16 only by a blackening process or a chemical copper deposition process. In other words, the conductive layer 16 may be a chemical copper layer, a conductive graphite layer, or a multilayer structure. When the conductive layer 16 is a chemical copper layer or a conductive graphite layer, the surface of the first copper foil layer 11 and the surface of the second copper foil layer 12 are not formed with a plating material. When the conductive layer 16 has a multilayer structure, the surface of the first copper foil layer 11 and the surface of the second copper foil layer 12 are formed with a plating material. The multi-layer structure may be a composite structure of a conductive graphite layer and an electroplated copper layer, or a composite structure of a chemical copper layer and an electroplated copper layer, and may also be formed by other conductive material layers deposited on the surface of the insulating material together with the electroplated copper layer. Composite structure. 099136851 Form No. A0101 Page 9 / Total 28 Page 0992064361-0 201218885 [0019] [0021] In addition, those skilled in the art will understand that the surface of the conductive graphite layer, the first (four) and the surface, and the second (four) layer When the surface of the electric clock copper layer is deposited, the thickness of the electroconductive copper layer deposited on the first surface 131 may be greater than the thickness of the electroplated copper layer deposited in other portions due to the tip effect. In the fifth step, referring to FIG. 9 to FIG. 12, the first copper box is formed into the first conductive line 11 and the second copper box layer 12 is formed into the second conductive line 121. The process of forming the conductive lines may be chemical etching or laser burning. In the present embodiment, the chemical (4) is taken as an example for specific description. First, referring to FIG. 9', a third photoresist layer 17' is formed on the surface of the electroplated copper layer on the surface of the first copper falling layer n. A fourth photoresist layer 18 is formed on the surface of the surface of the electro-mineralized copper layer. Next, referring to 嶋, the third photoresist layer 17 is patterned by exposure and development while patterning the fourth photoresist layer Μ. That is, a plurality of third open σ ΐ 7 () is formed in the third photoresist layer 17, while a plurality of fourth openings (10) are formed in the fourth photoresist layer 18. The third photoresist layer corresponds in pattern to the pattern of the conductive lines to be formed in the first copper pad (four), and the pattern of the fourth photoresist layer 18 and the (four) phase of the conductive line formed in the second copper box layer 12. system. Once again, please (4) (4), with the name of the copper surname engraved on the first copper box layer of the third opening 17◦, the surface of the electro-mineral copper layer', and the rhyme is exposed to the fourth opening ΐ8〇 The copper layer 12 and its surface are plated with a copper layer to pattern the first copper layer 11 and the second (four) layer 12. That is, a first conductive line (1) corresponding to the pattern of the third photoresist layer 17 is formed in the (_)th layer u, and a pattern corresponding to the pattern of the fourth photoresist layer 18 is formed in the second (four) layer 12 Two conductive lines 121. Finally, please refer to Figure 12, except for the patterning of the third 099136851 Form No. A0101 Page 10 / Total 28 Page 0992064361-0 201218885 The first resist layer π and the fourth photoresist layer 18 can be obtained. Hey. The double-sided circuit board 20 includes a first conductive line iu line 121 and a _13 between the first conductive line and the second conductive line 12-=, and the line U1 and the second_way 121 pass through the plurality of through holes. The conductive layer 16 of 100 is electrically connected. [0022] Of course, those skilled in the art may 1" form the second conductive line 121=after: forming the surface of the first conductive line electrical circuit m and the first green light, and may also be included in the first conductive and first conductive lines. 121 surface is covered with a cover film [0023] less frequency. And it is necessary to say that the L double-sided circuit board 2G can also be used to form a multi-layer circuit board. That is to say, the double-sided electric board 2G can be combined with more than one single-sided circuit board and double-sided circuit board to form a multi-layer circuit board; the double-sided circuit board can be similar to the same (4) The copper plate is combined and formed into a multilayer circuit board by a line fabrication process. [0024] In the method for fabricating the double-sided circuit board 2G according to the present technical solution, the through hole (10) is formed by the process of first chemically engraving the first-(four) and re-using the laser-burning insulating layer 13 with the second copper layer 12. Due to the lower cost of the chemical, the laser ablate the insulating layer 13 at a faster speed, so that the production of the double-sided circuit board is achieved with lower production cost and higher manufacturing efficiency. Moreover, when the through hole 100 is formed, the aperture of the first hole 11 in the first copper foil layer u is greater than or equal to the aperture of the second hole 120 of the second copper foil layer 12, so that only the second is required in production. The precision of the production of the hole 120 can ensure the precision of the production of the first hole, that is, the difficulty of production. When the third hole 130 is formed by the laser burn button insulating layer 13, the silver is burned from the second hole 120 toward the first hole 110. Thus, the aperture range of the third hole 1 is ensured, and the 099136851 form number A0101 is 11 Page / Total 28 pages 0992064361-0 201218885 Prove the production accuracy of the through hole 100. [0025] In summary, the present invention has indeed met the requirements of the invention patent, and the patent application is filed according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims. BRIEF DESCRIPTION OF THE DRAWINGS [0026] FIG. 1 is a schematic flow chart of a method for fabricating a circuit board according to an embodiment of the present technical solution. 2 is a cross-sectional view of a double-sided copper clad laminate provided by an embodiment of the present technical solution. 3 is a cross-sectional view showing a first photoresist layer and a second photoresist layer formed on both sides of a double-sided copper clad laminate according to an embodiment of the present invention. 4 is a cross-sectional view of the first photoresist layer and the second photoresist layer after the first embodiment of the present invention. [0030] FIG. 5 is a cross-sectional view showing the etching of the first copper foil layer and the second copper foil layer according to an embodiment of the present invention. 6 is a cross-sectional view of the first photoresist layer and the second photoresist layer after the first embodiment of the present invention is removed. FIG. 7 is a cross-sectional view showing the formation of a plurality of via holes after laser-ablating an insulating layer of a double-sided copper clad plate according to an embodiment of the present invention. [0033] FIG. 8 is a cross-sectional view showing a plurality of through holes formed into a plurality of via holes according to an embodiment of the present disclosure. 099136851 Form No. A0101 Page 12 of 28 0992064361-0 201218885 [0034] [0037] [0037]
[0038] [0039] [0040] [0041] [0042] [0043] [0044] [0045] [0046] [0047] [0048] 圖9為本技術方案實施方式提供之在雙面覆銅板兩侧分別 形成第三光阻層與第四光阻層之後之剖視示意圖。 圖10為本技術方案實施方式提供之圖案化第三光阻層與 第四光阻層之後之刮視示意圖。 圖11為本技術方案實施方式提供之蝕刻第一銅箔層與第 二銅箔層之後形成導電線路之剖視示意圖。 圖12為本技術方案實施方式提供之去除第三光阻層與第 四光阻層之後之剖視示意圖。 【主要元件符號說明】 雙面覆銅板：10 第一銅箔層：11 絕緣層：13 第二銅箔層：12 第一表面：131 第二表面：132 第一孔：110 第二孔：120 第一光阻層：14 第二光阻層：15 第一開口 ·· 140 第二開口 ： 150 099136851 表單編號A0101 第丨3頁/共28頁 0992064361-0 [0049] 201218885 [0050] 第三孔：130 [0051] 通孔：100 [0052] 第一導電線路：111 [0053] 第二導電線路：121 [0054] 第三光阻層：17 [0055] 第四光阻層：18 [0056] 第三開口 ： 170 [0057] 第四開口 ： 180 [0058] 雙面電路板：20 0992064361-0 099136851 表單編號A0101 第14頁/共28頁[0048] [0048] [0048] FIG. 9 is a side view of a double-sided copper clad laminate provided by an embodiment of the present technical solution A schematic cross-sectional view after forming the third photoresist layer and the fourth photoresist layer, respectively. FIG. 10 is a schematic view showing the patterning of the third photoresist layer and the fourth photoresist layer provided by the embodiment of the present invention. Figure 11 is a cross-sectional view showing the formation of a conductive line after etching the first copper foil layer and the second copper foil layer according to an embodiment of the present invention. FIG. 12 is a cross-sectional view showing the third photoresist layer and the fourth photoresist layer after the embodiment of the present invention is removed. [Main component symbol description] Double-sided copper clad laminate: 10 First copper foil layer: 11 Insulation layer: 13 Second copper foil layer: 12 First surface: 131 Second surface: 132 First hole: 110 Second hole: 120 First photoresist layer: 14 Second photoresist layer: 15 First opening · · 140 Second opening: 150 099136851 Form number A0101 Page 3 / Total 28 page 0992064361-0 [0049] 201218885 [0050] Third hole :130 [0051] Through hole: 100 [0052] First conductive line: 111 [0053] Second conductive line: 121 [0054] Third photoresist layer: 17 [0055] Fourth photoresist layer: 18 [0056] Third opening: 170 [0057] Fourth opening: 180 [0058] Double-sided circuit board: 20 0992064361-0 099136851 Form number A0101 Page 14 of 28