201043107 六、發明說明： f發明所屬之技術領域】 本發明為-_表_料元件經由真空顯合技術 所進行之整合封裝結構，提供承載與結構保護的功能，並 確保訊號與能量的傳遞。 【先前技術】 隨著半導·業的高度發展，未來電子產品強調輕薄 短小、尚速、高腳數等特性，以導線架為基礎的傳統封震 ❹ 將漸不適用’在封職程上杨輯多挑戰，諸 如封裝材料的、封裝製程中金線數目的高密度集積 化’以及模流充填時所產生的金線偏移與薄形封裝勉曲變 ^/專問遞’都疋產業界目前所遭遇，而需投入研究的範嘴。 在習知的半導體晶片封裝方面，打線接合封裝(Wire B〇nding)或覆晶接合封裝(Flip-Chip)是一般常見的封裝技 術。 〇 打線接合封裝係將晶片直接黏貼於介電基板表面，採 用打線接合餘將⑼之賊與介電基絲面之焊塾㈣） 形成電性連接，應用壓模灌膠技術(M〇lding)將環氧樹脂材 料(Epoxy)加以封裴，以保護晶片避免受到化學或機械外力 的破壞，再藉由植球陣列（Ball Grid Array)技術提供介電 基板與外界裝置之電性連接。 至於覆晶封裝則是將錫鉛凸塊或錫球之金屬導體，應 用迴焊(Reflow)製程使金屬導體黏著於晶片接點表面，接著 將晶片上的金屬導體對應匹配放置於介電基板之焊墊上， 3 201043107 再經迴焊製程形成電性接合，接著採用底膠填充㈣扣測 Dispensing)餘’騎職體佈滿“與介電基板之間隙， 再藉由植球陣列技術提供介電基板與外界裝置之電性連 接。 在覆晶封裝底膠填充的製程中，因採單邊填膠方式所 以必須花費—段_才能讓封膠流體佈滿介f基板與覆晶 片之間隙。此外’晶片、介電基板、金屬導體和充填材料 的熱膨脹係數有相當大的差異性。 Ο 。其巾晶的鱗祕數大約為百萬分之2.3/度(23ppm/ C) ’ FR-4介電基板的熱膨脹係數則為百萬分之18 /度 (18ppm/°C)，銲錫凸塊的熱膨脹係數為百萬分之24/度 (24ppm/ C )，而環氧樹脂的膨脹係數為百萬分之7〇/度 (70ppm/C) °尤其是晶>{與介電基板的鱗祕數差異最 大’當溫度出現變化時’會產生不一致的熱膨脹效應而使 付整個封裝出現變形的現象，並且會在覆晶與基板的焊錫 》 連接上出現剪應力，一般銲錫熔點約在攝氏18〇〜4〇〇度之 間，容易達到其降服點而對整體封裝的結構產生破壞性。 另外，在傳統的打線接合封裝的製程中，於進行灌膠製程 後，有時會因為黏度強度不足而出現分層的現象。 目前在電路佈設方面，線路載板是經常使用的構裝元 件，該線路載板大多是印刷電路板或晶片載板等線路載 板。一般的線路載板主要是由多層圖案化線路層及多層介 電層交替疊合所構成，其中介電層配置於任二相鄰之圖案 化線路層之間，而這些圖案化線路層可藉由貫穿介電層之 4 201043107 鍍通孔道轉電錢*彼此電性連接。 Ο201043107 VI. Description of the Invention: The technical field to which the invention belongs is the integrated package structure of the -_ table material element through vacuum merging technology, providing the function of bearing and structure protection, and ensuring the transmission of signals and energy. [Prior Art] With the high development of the semi-conducting industry, the future electronic products emphasize the characteristics of light and thin, short speed, high number of feet, etc. The traditional sealed shock based on the lead frame will gradually become unsuitable. Yang Ji multi-challenge, such as packaging materials, high-density accumulation of the number of gold wires in the packaging process 'and the gold wire offset generated during the mold filling and the thin package distortion ^ / The current situation encountered in the world, but the need to invest in the mouth of research. Wire bonding packages or Flip-Chip are common packaging techniques for conventional semiconductor chip packaging. The tapping wire bonding package directly adheres the wafer to the surface of the dielectric substrate, and electrically connects the thief of (9) with the soldering enamel of the dielectric base surface (4) by wire bonding, and applies the mold filling technique (M〇lding). The epoxy material (Epoxy) is sealed to protect the wafer from chemical or mechanical external forces, and the dielectric connection between the dielectric substrate and the external device is provided by Ball Grid Array technology. As for the flip chip package, the tin-lead bump or the metal ball of the solder ball is applied to the surface of the wafer contact by a reflow process, and then the metal conductor on the wafer is matched and placed on the dielectric substrate. On the solder pad, 3 201043107 and then through the reflow process to form an electrical joint, and then use the underfill to fill (4) depreciation) the rest of the 'riding body is covered with the gap between the dielectric substrate, and then provide the dielectric through the ball array technology. The substrate is electrically connected to the external device. In the process of filling the flip-chip package, it is necessary to use a single-side filling method to allow the sealing fluid to fill the gap between the substrate and the substrate. 'The thermal expansion coefficients of wafers, dielectric substrates, metal conductors and filling materials are quite different. Ο The scale of the towel crystal is about 2.3/kWh (23ppm/C) 'FR-4 The thermal expansion coefficient of the electric substrate is 18/kWh (18ppm/°C), the thermal expansion coefficient of the solder bump is 24/kWh (24ppm/C), and the expansion coefficient of the epoxy resin is 100%. 7 万 / kW (70ppm / C) ° especially crystal & g t; {The difference in the number of scaly secrets with the dielectric substrate is the largest 'when the temperature changes' will produce an inconsistent thermal expansion effect, which will cause the entire package to be deformed, and will appear on the connection between the flip chip and the solder of the substrate. The stress, generally the melting point of the solder is between 18 〇 and 4 摄 degrees Celsius, which easily reaches the drop point and is destructive to the overall package structure. In addition, in the traditional wire bonding process, the glue filling process is performed. After that, sometimes there is delamination due to insufficient viscosity strength. Currently, in circuit layout, the line carrier is a commonly used component, and the line carrier is mostly a printed circuit board or a wafer carrier. The general circuit carrier is mainly composed of a plurality of patterned circuit layers and a plurality of dielectric layers alternately stacked, wherein the dielectric layer is disposed between any two adjacent patterned circuit layers, and the patterned circuit layers can be Electrically connected to each other by the through-dielectric layer 4 201043107 plated through-hole transfer money*.
由於線路舰具有佈線喊、組裝緊糾及良好的性 月b等優勢’因此線路載板已廣泛細於電子封裝結構中， 特別疋植_顺術的封裝體。當訊號在線路載板傳遞 時’可藉由被動元件(例如電阻、電容、電感等)消除雜訊以 及穩疋電路纽善訊麟輸的品質，另外在天線線路的佈 線方面’亦可藉由被動元件的設置作為電性阻抗匹配及頻 率調整之目的’但該_元件係設置在線路載板的表面， 使知線路载板體積增大而無法達觸小體積的目的。此 外’隨著電子產品功能性的多樣化，將使得線路載板的體 積變大，同樣地無法達到輕薄短小之目的。 【發明内容】 本發明整合表轉著型元件之難結構的主要目的在 於將⑻天元件封驗翻組化，藉由改變被動 =件值的大小，得_整頻率_的自由度以及性能，提 尚天線特H阻抗與系統端阻抗匹配狀 要求，並且―咖，修L= 俾增加印刷電路板之利用空間。 本發明之-欠要目的在於改善結構娜齡電基板之結 合強度，提料結構賴的功能，避免物理性質的破 壞和化學性質的他，_訊號與能量的傳遞，並發展出 -種全财_料_裝餘，且鱗低生產成本。 本發明之另-目的在_不同的晶片或已封裝完成的 邊層晶片或其他電子組件整合於同—封裝模組内（例如射 5 201043107 頻模組或其他整合型系統晶片）成為複合式的封裝體，提 供承載與結構保護的功能，確保訊號與能量的傳遞。 為達上揭目的，本發明係提供一種整合表面黏著型元 件之封裝結構，其包含：一介電基板；一設於介電基板上 表面的第一表面金屬層，該第一表面金屬層形成一預定之 線路圖案及有複數個焊墊；一設於介電基板下表面的第二 表面金屬層；複數個設於介電基板内部的鑛通孔道，用以 電性連接第一表面金屬層及第二表面金屬層；複數個黏著 ❹ 於第一表面金屬層表面的被動元件；以及一覆蓋於介電基 板上表面的封裝膠板，該封裝膠板密封第一表面金屬層及 其表面黏著的被動元件。 本發明進一步揭露一種整合表面黏著型元件之封裝結 構，其包含：一介電基板；一第一表面金屬層，係設於該 介電基板之上表面形成一預定之線路圖案以及有複數個焊 墊；一第二表面金屬層，係設置於該介電基板之下表面； 〇 複數個錢通孔道’設置於該介電基板内部，並電性連接該 第一表面金屬層及第二表面金屬層；複數個被動元件，係 黏著於第一表面金屬層之表面；一晶片，係設置於第一表 面金屬層表面，並具有複數個晶片接點；複數條金屬接線， 係搭接於該等晶片接點，並與第一表面金屬層的焊墊表面 連接；一封裝膠板，係覆蓋於該介電基板之上表面，用以 密封該第一表面金屬層、複數個被動元件、複數個金屬接 線及晶片；以及複數個錫球，係設置於第二表面金屬層之 表面。 6 201043107 該封裝結構可進-細封轉板上枝置—第三表面 金屬層，触鍍祕道貫通介懿板及縣·_，使 第-表面金屬層、第二表面金屬層與第三表面金屬層電性 連接。 本發明更進-步揭露_種整合表轉著型元件之封裝 結構’係由-介電基板、—設於介電基板上表面的第一表 面金屬層、-設於介電基板下表面的第二表面金屬層、複 數個設於介電基板内部連通的鍍通孔道、—黏著於第一表 面金屬層表面的電子組件以及一覆蓋於介電基板上表面的 封裝膠板所構成’該第—表面金麟具有—預定線路圖案 以及複數個焊塾’該鍍通孔道用以電性連接第一及第二表 面金屬層，該封裝膠板用以密封該第一表面金屬層及其表 面黏著的電子組件。 本發明再進—步揭露-觀合表轉著型元件之封裝 結構，係包含複數個介電基板；複數個表面金屬層，設置 =赫個；丨電基板之上表面及下表面；複數侧通孔道， 设置於該介f絲⑽麵各録面金屬層，使彼此電性 連接’ f子組件，雜著於表面金顧上；複數個封裝 ^板’係覆蓋於介電基板之表面，職包覆密封該表面金 屬^及其表雜著之轩組件。其中，該雜膠板亦可作 為多層介電基板_黏合層，達到多疊層封裝的結構體。 人上述介電基板採用由介電樹脂與玻璃纖維所構成的複 ，材料或介鶴轉_減_錄末所構成的複合材 料上述第一與第二表面金屬層之線路採用曝光、顯影與 7 201043107 确箱、電鑛、噴塗、印刷、網印燒結或其組合方式將 線路建構在介電基板表面，上述電子組件係為-個以上的 電子7G件、絲元件、被動元件、射麵組、積體電路晶 片組、曰曰片天線或其他表面黏著型元件之組合，上述晶片、 讀、模岐藉由表轉紐術將雜著於第—表面金屬 層之表面。 於一較佳實施例中，該介電基板的介電常數介於2至 被動元件係修m輯或其組合的 〇 任種構成，上述封s膠板採肖介電樹脂與陶莞材料 所構成之熱固性複合材料，喊线壓合餘_ press Lamination)加触域，使魏健均自麟祕介電基 板的上表面。 本發明最後揭露一種整合表面黏著型元件之封裝結 構，其應用於天線結構包含：一介電基板；一第一表面金 屬層，係設置於齡電基板上表面並形成—默之線路圖 〇 案；一第二表面金屬層，係設置於該介電基板之下表面； 複數個被動元件，係黏者於第一表面金屬層之表面；一晶 片’係設置於介電基板之上表面，並與第一表面金屬層電 性連接；一封裝膠板，係覆蓋於該介電基板之上表面，用 以包覆密封該第一表面金屬層及其表面黏著之複數個被動 元件與晶片；一第三表面金屬層，係設置於該封裝膠板之 上表面；以及複數個鑛通孔道。 其中一部分鍍通孔道設於該介電基板内部連通該第一 表面金屬層及第二表面金屬層，而另一部分鍍通孔道設於 8 201043107 該介電基板與封裝膠板内部 屬層，使彼此電性連接 面:::第三表面金 位置可電性連接—外界裝置或:===通孔道 或其他可導電結構。 1 4天線她效果的導線 _且化賴晶4场無航件封裝結權 、、、、匕，fc南天線特性阻抗與系統端阻抗匹配，同時増永 ^刷電路板之彻郎，並改紐構封 Ο Ο 合強度，以提供承载與結構保護的功能。 之、、。 【實施方式】 絲為便於更進-步對本發明之構造及其特徵有更深一 層明確、詳實_識鱗解，鱗條佳實補說明本發 明的新穎性及其他特點，並配合圖式詳細說明如下： 請配合參閱第1圖及第2圖，係本發明之第一較佳實 例’該整合表祕著型元件之封裝結構（励）包括有：一 介電基板（10a)、-第-表面金屬層(lla)、一第二表面金 屬層(12a)、複數個鍍通孔道（13a)、複數個被動元件（3〇)、 一封裝膠板（20a)。 該介電基板（10a)係採用介電樹脂與玻璃纖維所構成 之複合材料或介電樹脂與陶瓷板材或陶瓷粉末所構成的複 合材料，該介電基板(l〇a)的介電常數介於2至50之間。 該第一與第二表面金屬層（11a) (12a)之線路係採用 曝光、顯影與蝕刻銅箔、電鍍、喷塗、印刷、網印燒結或 其組合方式將線路建構在介電基板（l〇a)的上、下表面； 該第一表面金屬層（11a)係設置於該介電基板（l〇a)之上 9 201043107 表面形成一預定之線路圖案以及有複數個焊墊；該第二表 面金屬層（12a)係設置於該介電基板（1〇a)之下表面。 该等鍍通孔道(13a)貫通於該介電基板(1 〇a)内部與該第 表面金屬層（11a)及第二表面金屬層（12a)連接，讓該 第-表面金屬層（11a)及第二表面金屬層（12a)可藉由貫 穿w電基板(i〇a)的鍍通孔道（1如）彼此電性連接。 該被動元件（30)藉由表面黏著技術將其黏著於第一 表面金屬層（lla)之絲，胁㈣或綱之電性連接， ㈣被動讀（30)係採用電阻、電容或電感或其中任兩 者之組合’具有低成本取得、鮮化規格的優點。 該封裝膠板（2〇a)係覆蓋於該介電基板（1〇a)之上表 面’以包覆密封該第-表面金屬層〇la)及其表面黏著之 被動元件（30) ’該封裝膠板（2〇a)係採用介電樹脂與陶 材料’該雖雜（2⑻係以 真空熱壓合製程加熱與加壓，使其軟化並均勾地流動於介 〇 電基板(1〇a)之上表面’當封裝膠板（20a)持續地吸收能量 後會產生聚合反應’而能均勻地黏合固化封裝該介電基板 (l〇a)表面上的第-表面金屬層（m)、被動元件（3〇)， 且藉由真空熱壓合製程能達到受熱均句、受塵均句、穩定 、流動’降低溫差所造成各材質熱膨脹效應而產生整體封裝 出現麵曲變形的現象。藉由封震膠板（2〇a)的保護，可避 免物理性質的破壞和化學性質的侵#，碟保訊號與能量的 傳遞，使其發揮功能。 明參閱第3圖所示，在習知印刷電路板(200)的天線電 201043107 路佈線示意圖中，藉由設置數個被動元件（3〇)來達到天 線電性阻抗匹配及頻率調整之目的，惟限定之 (30)係設置於習知天線（40)周圍的線路佈線面積上， 其缺點係降低電路基板(50)佈線的靈活性，及不符合無線通 訊裝置輕薄短小的趨勢。 請參閱第4圖所示，在印刷電路板(3〇〇)整合表面黏著 型元件之封裝結構的天線電路佈線示意圖中，藉由減少設 置於整合奸元狀封裝天線（41)職之祕佈線面積， 〇 進而增加電路基板（51)佈線的靈活性，達到無線通訊裝 置輕薄短小之目的。 請配合參閱第5圖及第6圖，係本發明之第二較佳實 例，該整合表面黏著型元件之封裝結構(4〇〇)包括有：一介 電基板（10b)、一第一表面金屬層（llb)、一第二表面金 屬層（12b)、一第三表面金屬層（丨物）、複數個鍍通孔道 (13b)、複數個被動元件（3〇)、一晶片（6〇)、複數個金 〇 屬接線（61)、一封裝膠板（2〇b)以及複數個錫球（63)。 該介電基板（10b)係採用介電樹脂與玻璃纖維所構成 之複合材料或或介電樹脂與陶瓷板材或陶瓷粉末所構成的 複合材料’該介電基板(10b)的介電常數介於2至50之間。 該第一與第二表面金屬層(11b) (12b)線路係採用曝 光、顯影與截刻銅箔、電鍍、喷塗、印刷、網印燒結或其 組合方式將線路建構在介電基板（1〇b)的上、下表面；該 第一表面金屬層（lib)係將複數個金屬片設於該介電基板 (10b)之上表面形成一預定之線路圖案以及複數個焊墊； 201043107 該第二表面金屬層（12b)係設置於該介電基板（1〇b)之 下表面。 «亥專鍍通孔道(13b)貫通於該介電基板(1 〇b)内部與該第 一表面金屬層（lib)及第二表面金屬層（12b)連接，讓 該第一表面金屬層（lib)及第二表面金屬層（12b)可藉 由貫穿介電基板(l〇b)的錢通孔道（13b)彼此電性連接。 該被動元件（30)藉由表面黏著技術將其黏著於第一 表面金屬層（lib)之表面，用於串聯或並聯之電性連接， 該被動元件（30)雜用f阻、電容或賴或其中任兩者 之組合，具有低成本取得、標準化規格的優點。 該晶片（6G)係設置於第—表面金屬層（m)的上表 面，並具有複數個晶片接點（62)，而於一實施例中，該晶 片（60)採用銀膠或表面黏著技術使其黏貼於第一表面金 屬層（lib)的上表面。 該金屬接線（61)採用金線或銘線之材料，該金屬接 線（61)係連線搭接於晶片接點（62)與第一表面金屬層 (Ub)之焊墊表面，採用打線接合製程將晶片接點（62) 與”電基板（l〇b)的第一表面金屬層⑽）焊塾進行鲜 接而使彼此電性連接。 該封裝膠板（2%)係覆蓋於該介電基板（1〇b)之上 表面’肋包密封該第—表面金屬層（lib)及其表面黏 著之複數個被動元件⑽、金屬接線(61)與；⑽，該 封裝膠板（20b)係採用介電樹脂與陶兗材料所構成之熱固 性複合材料；_獅板⑽）_真空難合製程加熱 12 201043107 與加壓，使其軟化並均勻地流動於介電基板(1〇b)之上表 面，當封裝膠板（20b)持續地吸收能量後會產生聚合反應， 而能均勻地黏合固化封裝該介電基板（1〇b)上表面的第一 表面金屬層（lib)、被動元件（30)、晶片（60)及金屬接 線（61) ’且藉由真空熱壓合製程能達到受熱均勻、受壓均 勻、穩定流動，降低溫差所造成各材質熱膨脹效應而產生 整體封裝翹曲變形的現象。藉由封裝膠板（2〇b)的保護， 可避免物理性質的破壞和化學性質的侵蝕，確保訊號與能 量的傳遞，使其發揮功能。 該錫球（63)係設置於第二表面金屬層（12b)之下表 面，藉由植球陣列技術將錫球（63)陣列銲接成形於第二 表面金屬層（12b)之焊墊表面，作為介電基板（1〇b)與 外界裝置電性連接之介面。 上述整合表面黏著型元件之封裝結構(400)進一步於封 裝膠板(20b)上方設置—第三表面金屬層⑽），並由部份鐘 〇 通孔道(13b)貫通於該介電基板(10b)及封裝膠板（20b)内 部，使該第-表面金屬層（llb)、第二表面金屬層（12b) 與第三表面金屬層(14b)電性連接，其中該第三表面金屬層 (14b)用以將晶片(6〇)運作時產生的熱量傳輸至該第三表面 金屬層(14b)，幫助晶片(60)快速散熱。 請配合參閱第7圖及第8圖，係本發明之第三較佳實 例，該整合表面黏著型元件之封裝結構(5〇〇)，其包括有： 一介電基板（10c)、一第一表面金屬層（llc)、一第二表面 金屬層（12c)、複數個鍍通孔道（13c)、電子組件（％)、 13 201043107 一封裝膠板（20)。 該介電基板（l〇C)係採用介電樹脂與玻璃纖維所構成 之複合材料或介電樹脂與陶瓷板材或陶瓷粉末所構成的複 合材料’該介電基板(10e)的介電常數介於2至50之間。 該第一與第二表面金屬層Ulc) (12c)之線路係採用 曝光、顯影與蝕刻銅箔、電鍍、喷塗、印刷、網印燒結或 其組合方式將線路建構在介電基板（10c)的表面；該第一 ❹ 表面金屬層（HO係設置於齡電基板（1Ge)之上表面； 該第二表面金屬層（12c)係設置於該介電基板（l〇c)之下 表面。 該等鑛通孔道(13c)貫通於該介電基板(1〇c)内部與該第 -表面金屬層（lie)及第二表面金屬層〇2e)連接，讓該 第-表面金屬層（lle)及第二表面金屬層（i2e)可藉由貫 穿介電基板(10c)的鑛通孔道（以）彼此電性連接。 及電子組件（35)藉由表面轉技娜其黏著於第一 表面金屬層（11c)之表Φ彼此電性連接，而於一實施例中， 該電子組件（35)可叫複數_子元件、主鶴元件、 =模組、積體電路晶片組、晶片天線或其他表面黏著型 凡件之組合。 〜封裝膠板（2Ge)倾胁該介電基板（㈣之上表 包覆密封該第—表面金屬層⑽）及其表面黏著 陶害^件（35) ’該封襄膠板（2〇c)係採用介電樹脂與 之細性複合材料；祕—實施例中，該 _板（2〇C)係以真空熱壓合製程加熱與加壓，使其軟 201043107 化並均勻地流動於介電基板(10)之上表面，當封裝膠板 (20c)持續地吸收能量後會產生聚合反應，而能均勻地黏 合固化封裝該介電基板（l〇c)上表面的第一表面金屬層 (11c)、電子組件（35) ’且藉由真空熱壓合製程能達到受 熱均勻、受壓均勻、穩定流動，降低溫差所造成各材質熱 膨脹效應而產生整體封裝翹曲變形的現象，並藉由封裝膠 板（20c)的保護，可避免物理性質的破壞和化學性質的侵 蝕，確保訊號與能量的傳遞，使其發揮功能。 凊配合參閱第9圖，係本發明之第四較佳實例，如圖 所示，本發明整合表面黏著型元件之封裝結構(600)，其包 括有：複數個介電基板（1〇)、複數個表面金屬層(15)、複 數個鍍通孔道（13 )、電子組件（35 )、複數個封裝膠板(2〇 )。 該厂電基板（10)係採用介電樹脂、玻璃纖維所構成 之複合材料或介電樹脂與陶瓷板材或陶瓷粉末所構成的複 合材料’該介電基板(10)的介電常數介於2至5〇之間。 #該表面金屬層（15)之線路係採用曝光、顯影與蝕刻 _ '電鍍、喷塗、印刷、網印燒結或其組合方式將線路 建構在介電基板（1G)的表面；該表面金屬層（15)係設 置於·電基板（1G)之上表面及下表面。 該等鍍通孔道(13)貫通於該介電基板(1〇)及封裝膠板 (2〇)内部，讓該表面金屬層（15)可藉由貫穿介電基板⑽ 的鍍通孔道（13)彼此電性連接。 錢子崎（35)藉域轉紐娜錄著於表面 金屬層（15)之表面彼此電性連接，而於—實施例中，該 15 201043107 ΖΓ(35)可以為複數個電子元件、主被動元件、射 龍電路⑼組、^场辅縣_著型元 =_板（20)係覆蓋於該介電基板⑽之表面， 养=密封該表面金屬層（15)與其表轉著之電子組 ㈠’言亥封裝膠板（20)係採用介電樹脂與陶竟材料所 、的熱固性複合材料；而於一實施例中，該封裝膠板⑽ ❹ Ο 系乂真工熱塵合製程加熱與加遷，使其軟化並均勻地流動 =丨電基板(10)之上表面，當封裝膠板（20)持續地吸收能 里後會產生聚合反應，而能均勻地黏合固化封裝該介電基 板（1〇)之表面金屬層（15)、電子組件（35)，且藉由真 空^屋合製程能達到受熱均勻、受屋均勻、穩定流動，降 低溫差所造成各材質熱膨脹效應而產生整體封裝翹曲變形 的現象’並藉由封裝膠板（2〇)的保護，可避免物理性質 的破壞和化學性質的侵蚀，確保訊號與能量的傳遞，使其 發揮功能。 此外，該封裝膠板（20)亦可作為多層介電基板（1〇) 間的黏合層，達到多疊層封裝的結構體。 6青配合參閱第10圖，係本發明之第五較佳實例，該整 合表面黏著型元件之天線封裝結構（700)，其包括有：一 介電基板（lGd)、-第-表面金屬層（lld)、—第二表面 金屬層（12d)、複數個鐘通孔道（i3d)、複數個被動元件 (30)、一晶片（60)、一封裝膠板（2〇d)以及一第三表面 金屬層(14d)。 201043107 該介電基板（i〇d)係採用介電樹脂與玻璃纖維所構成 之複合材料或介電樹脂與陶瓷板材或陶瓷粉末所構成的複 合材料’該介電基板（HM)的介電常數介於2至5〇之間。 該第一表面金屬層(lid)線路係採用曝光、顯影與蝕刻 銅箔、電鍍、喷塗、印刷、網印燒結或其組合方式將線路 建構在介電基板（l〇d)的上表面；於圖示一較佳實施例中， 該第一表面金屬層（lid)設為一方型迴旋狀的線路圖案， 並於中央位置設為一特定的線路圖案。 〇 該第二表面金屬層(12d)線路同樣係採用曝光、顯影與 蝕刻銅箔、電鍍、喷塗、印刷、網印燒結或其組合方式將 線路建構在介電基板（l〇d)的下表面。 該等鑛通孔道(13d)部分貫通於該介電基板(丨〇d)内部， 與該第一表面金屬層（lid)及第二表面金屬層（12d)連 接，讓該第一表面金屬層（lid)及第二表面金屬層（12d) 可藉由貫穿介電基板(1(M)的鑛通孔道（i3d)彼此電性連 Q 接’而该等鍍通孔道另一部分貫通於該介電基板(10d) 及封裝膠板（20d)内部，與第一、第二及第三表面金屬層 (lld)(12d)(14d)連接，讓該第一與第二及第三表面金屬層 (lid) (12d) (14d)可藉由貫穿介電基板(10d)及封裝膠板 (20d)的鍍通孔道（13d)彼此電性連接。於圖示一較佳 實施例’該锻通孔道(13d)於中央位置貫通於該介電基板 (10d)内部，以及該鍍通孔道(13d)於側邊位貫通於該介電基 板(10d)及封裝膠板（20d)内部。 該被動元件（30)藉由表面黏著技術將其黏著於第一 17 201043107 表面金屬層（lid)之表面，用於串聯或並聯之電性連接， 該被動元件（30)係採用電阻、電容或電感或其中任兩者 之組合，具有低成本取得、標準化規格的優點。 該晶片（60)係設置於介電基板（1〇d)上表面與第一 表面金屬層（lid)電性連接；於—較佳實施例中，該晶片 (60)係採用銀膠或表面黏著技術使其黏貼於該介電基板 (l〇d)的中央位置。 該封裝膠板（20d)係覆蓋於該介電基板（1〇d)之上 表面，用以包覆密封該第一表面金屬層（nd)及其表面黏 著之複數個被動元件（30)與晶片（6〇)，該封裝膠板（2〇d) 係採用介電樹脂與陶瓷材料所構成之熱固性複合材料，並 以真空熱壓合製程加熱、加壓使其軟化並均勻地流動於介 電基板(10d)之上表面，當封裝膠板（2〇d)持續地吸收能量 後會產生聚合反應，而能均勻地黏合固化封裝該介電基板 (l〇d)上表面的第一表面金屬層（Ud)、被動元件（3〇) 及晶片（60) ’且藉由真空熱壓合製程能達到受熱均勻、受 壓均句、穩定流動，降低溫差所造成各材質熱膨脹效應而 產生整體封裝麵曲變形的現象。藉由封裝膠板（2〇d)的保 護，可避免物理性質的破壞和化學性質的侵蝕，確保訊號 與能量的傳遞，使其發揮功能。 5玄第二表面金屬層(14d)設置於該封裝膠板（2〇d)上表 面’作為與外界襄置電性連接的介面，於圖示一較佳實施 例中，該第三表面金屬層(14d)係採用曝光、顯影與蝕刻銅 箔、電鍍、喷塗、印刷、網印燒結或其組合方式建構於該 201043107 封褒膠板（2Gd)上表面形成1定的線路_，並於雜 通孔道_位置與外界裝置電性連接；於—較佳實= 中，該鍍通孔道⑽）電性連接一導線(圖未示）’藉以增加 天線輻射效果。 胃θ 、綜上所述’本發明整合表面黏著型元件之封裝結構透 過晶片、天絲路與被動元件封裝結職組化，藉由改變 =動元件錢大小，得關整鮮範_自由度以及性 〇 此’提高天線雜阻抗與魏雜抗随，同時減少佔用 印刷電路板面積，以縮小整體的體積，俾增加印刷電路板 之利用空間，並改善結構封膠與介電基板之結合強度，提 供承載與結構保護的功能，避免物理性質的破壞和化學性 質的知钮’此外’將不同的晶片或已封裝完成的疊層晶片 或其他電子組件整合於同一封裝模組内成為複合式的封裝 體，確保訊號與能量的傳遞》 以上所舉實施例僅用於方便說明本發明並非加以限 〇 制，在不離本發明精神範疇，熟悉此一行業技藝人士所可 作之各種簡易變形與修飾，均仍應含括於以下申請專利範 圍中。 【圖式簡單說明】 第1圖係為本發明第一較佳實施例的組合示意圖； 第2圖係為本發明第一較佳實施例的側面剖視圖； 第3圖係為習知印刷電路板的天線電路佈線示意圖； 第4圖係為本發明的天線電路佈線示意圖； 第5圖係為本發明第二較佳實施例的組合示意圖； 201043107 第6圖係為本發明第二較佳實施例的侧面剖視圖； 第7圖係為本發明第三較佳實施例的組合示意圖； 第8圖係為本發明第三較佳實施例的側面剖視圖； 第9圖係為本發明第四較佳實施例多層疊構的剖視 圖；以及 第10圖係為本發明第五較佳實施例的組合示意圖。 【主要元件符號說明】 介電基板（10) (10a) (l〇b)(10c)(10d) 第一表面金屬層（11 ) (lla)(llb)(llc)(lld) 第二表面金屬層（12) (12a)(12b)(12c)(12d) 鍍通孔道（13) (13a)(13b)(13c)(13d) 第三表面金屬層 (14b)(14d) 表面金屬層(15) 被動元件（30) 電子組件（35) Ο 封裝膠板（20) (20a) (20b) (20c)(20d) 習知天線(40) 整合電子元件之封裝天線 (41) 電路基板(50)(51) 晶片（60 ) 金屬接線（61) 晶片接點（62 ) 錫球（63) 封裝結構 (100)(400)(500)(600)(700) 印刷電路板(200)(300) 20Because the line ship has the advantages of wiring shouting, assembly tightness and good performance month b, the line carrier board has been widely used in the electronic package structure, especially the package of the Shunshu. When the signal is transmitted on the line carrier board, the passive components (such as resistors, capacitors, inductors, etc.) can be used to eliminate the noise and the quality of the circuit, and the wiring of the antenna line can also be used. The passive component is set for the purpose of electrical impedance matching and frequency adjustment. However, the component is placed on the surface of the line carrier, so that the volume of the line carrier is increased and the volume cannot be reached. In addition, as the functionality of electronic products is diversified, the volume of the line carrier will be increased, and the same purpose cannot be achieved. SUMMARY OF THE INVENTION The main purpose of the difficult structure of the integrated table-turning component of the present invention is to turn over the (8) day component seal, and by changing the size of the passive = component value, the degree of freedom and performance of the _ whole frequency _ is obtained. The antenna's special H-impedance and system-side impedance matching requirements are required, and “coffee, repair L=” increases the space for the printed circuit board. The purpose of the present invention is to improve the bonding strength of the structure nano-electrical substrate, the function of the material extraction structure, to avoid the destruction of physical properties and the chemical properties of him, the transmission of signals and energy, and to develop a kind of full wealth. _ material _ spare, and scale production costs. Another object of the present invention is to integrate a different wafer or a packaged edge wafer or other electronic component into a same package (for example, a 5201043107 frequency module or other integrated system chip). The package provides load and structure protection to ensure signal and energy transfer. In order to achieve the above object, the present invention provides a package structure for integrating a surface-adhesive component, comprising: a dielectric substrate; a first surface metal layer disposed on an upper surface of the dielectric substrate, the first surface metal layer being formed a predetermined circuit pattern and a plurality of pads; a second surface metal layer disposed on the lower surface of the dielectric substrate; and a plurality of metal via holes disposed inside the dielectric substrate for electrically connecting the first surface metal layer And a second surface metal layer; a plurality of passive components adhered to the surface of the first surface metal layer; and a sealing rubber plate covering the upper surface of the dielectric substrate, the sealing rubber plate sealing the first surface metal layer and the surface adhesion thereof Passive component. The invention further discloses a package structure for integrating a surface-adhesive component, comprising: a dielectric substrate; a first surface metal layer disposed on the upper surface of the dielectric substrate to form a predetermined circuit pattern and having a plurality of soldering a second surface metal layer disposed on a lower surface of the dielectric substrate; a plurality of money vias disposed inside the dielectric substrate and electrically connecting the first surface metal layer and the second surface metal a plurality of passive components attached to a surface of the first surface metal layer; a wafer disposed on the surface of the first surface metal layer and having a plurality of wafer contacts; a plurality of metal wires connected to the first surface a wafer contact and is connected to the surface of the pad of the first surface metal layer; a package rubber plate covering the upper surface of the dielectric substrate for sealing the first surface metal layer, the plurality of passive components, and the plurality of The metal wiring and the wafer; and the plurality of solder balls are disposed on the surface of the second surface metal layer. 6 201043107 The package structure can be in-finely sealed on the rotating plate - the third surface metal layer, the puncture secret passage through the dielectric plate and the county _, the first surface metal layer, the second surface metal layer and the third surface The metal layer is electrically connected. The present invention further discloses that the package structure of the integrated table-switching component is a dielectric substrate, a first surface metal layer disposed on the upper surface of the dielectric substrate, and a lower surface of the dielectric substrate. a second surface metal layer, a plurality of plated through holes provided in the interior of the dielectric substrate, an electronic component adhered to the surface of the first surface metal layer, and an encapsulant plate covering the upper surface of the dielectric substrate - the surface Jinlin has - a predetermined circuit pattern and a plurality of soldering holes ' electrically connected to the first and second surface metal layers, the sealing rubber plate is used to seal the first surface metal layer and its surface adhesion Electronic components. The present invention further discloses a package structure of a turn-on type component, which comprises a plurality of dielectric substrates; a plurality of surface metal layers, which are arranged in a range of Hz; an upper surface and a lower surface of the enamel substrate; and a plurality of sides The through-holes are disposed on the metal layers of the recording surface of the f-wire (10), so as to electrically connect the 'f sub-assemblies to each other, and are mixed on the surface of the surface; the plurality of package boards are covered on the surface of the dielectric substrate. The job covers the surface of the metal and its surface. Wherein, the miscellaneous rubber sheet can also be used as a multi-layer dielectric substrate_adhesive layer to achieve a multi-layer package structure. The above dielectric substrate is made of a dielectric resin and a glass fiber, and the material or the composite material composed of the first and second surface metal layers is exposed, developed and 7 201043107 The box, electric ore, spray coating, printing, screen printing sintering or a combination thereof is constructed on the surface of the dielectric substrate, and the above electronic components are more than one electronic 7G piece, a wire element, a passive element, a face group, A combination of an integrated circuit chipset, a striated antenna or other surface-adhesive component, wherein the wafer, read, and die are hybridized to the surface of the first surface metal layer by surface transfer. In a preferred embodiment, the dielectric substrate has a dielectric constant of 2 to a passive component, or a combination thereof, and the sealing plate is made of a dielectric resin and a ceramic material. The thermosetting composite material is composed of _ press Lamination) plus the contact area, so that Wei Jianjun is the upper surface of the substrate. The invention finally discloses a package structure for integrating a surface-adhesive component, wherein the antenna structure comprises: a dielectric substrate; a first surface metal layer is disposed on the upper surface of the age-old substrate and forms a silent circuit diagram a second surface metal layer is disposed on the lower surface of the dielectric substrate; a plurality of passive components are adhered to the surface of the first surface metal layer; and a wafer is disposed on the upper surface of the dielectric substrate, and Electrically connecting with the first surface metal layer; a sealing rubber plate covering the upper surface of the dielectric substrate for covering and sealing the first surface metal layer and a plurality of passive components and wafers adhered to the surface; The third surface metal layer is disposed on the upper surface of the encapsulant sheet; and a plurality of mine through holes. a part of the plated through hole is disposed in the inner portion of the dielectric substrate to communicate with the first surface metal layer and the second surface metal layer, and another portion of the plated through hole is disposed on the layer of the dielectric substrate and the inner side of the package rubber plate to make each other Electrical connection surface::: The third surface gold position can be electrically connected - external device or: == = through hole or other conductive structure. 1 4 antennas her effect of the wire _ and the Lai crystal 4 field no-satellite package binding right,,,, f, fc South antenna characteristic impedance and system end impedance matching, while 増 Yong ^ brush circuit board of the lang, and change the button The structure is combined with strength to provide load and structural protection. ,,. [Embodiment] The wire has a deeper and more detailed and detailed description of the structure and the features of the present invention for facilitating further advancement, and the scales are well complemented to illustrate the novelty and other features of the present invention, and are described in detail in conjunction with the drawings. As follows: Please refer to FIG. 1 and FIG. 2, which is a first preferred embodiment of the present invention. The package structure (excited) of the integrated watch type component includes: a dielectric substrate (10a), - a surface metal layer (lla), a second surface metal layer (12a), a plurality of plated through holes (13a), a plurality of passive components (3〇), and a sealing rubber plate (20a). The dielectric substrate (10a) is a composite material composed of a dielectric resin and glass fibers or a composite material composed of a dielectric resin and a ceramic plate or ceramic powder, and a dielectric constant of the dielectric substrate (10a) Between 2 and 50. The lines of the first and second surface metal layers (11a) (12a) are formed on the dielectric substrate by exposure, development and etching of copper foil, electroplating, spraying, printing, screen printing sintering or a combination thereof. The first surface metal layer (11a) is disposed on the surface of the dielectric substrate (10a) 9 201043107 to form a predetermined circuit pattern and a plurality of pads; The two surface metal layers (12a) are disposed on the lower surface of the dielectric substrate (1〇a). The plated through holes (13a) are connected to the first surface metal layer (11a) and the second surface metal layer (12a) through the dielectric substrate (1a) to allow the first surface metal layer (11a) And the second surface metal layer (12a) can be electrically connected to each other by a plated through hole (1) that penetrates the electrical substrate (i〇a). The passive component (30) is adhered to the wire of the first surface metal layer (lla) by a surface adhesion technique, the electrical connection of the threat (4) or the outline, and (4) the passive read (30) is a resistor, a capacitor or an inductor or The combination of the two 'has the advantages of low cost acquisition and freshening specifications. The encapsulant (2〇a) covers the surface of the dielectric substrate (1〇a) to cover the first surface metal layer 及其la and the surface of the passive component (30) The encapsulating rubber sheet (2〇a) is made of dielectric resin and ceramic material. The hybrid (2(8) is heated and pressurized by a vacuum thermocompression process to soften and flow uniformly on the dielectric substrate (1〇). a) the upper surface 'polymerization reaction occurs when the encapsulating rubber sheet (20a) continuously absorbs energy' and can uniformly bond and cure the first surface metal layer (m) on the surface of the dielectric substrate (10a) Passive components (3〇), and through the vacuum thermocompression process can achieve the phenomenon of heat distortion of the material caused by the heating of the uniform sentence, the dusty sentence, the stability, and the flow 'reducing the temperature difference, resulting in the deformation of the whole package. By protecting the rubber sheet (2〇a), physical damage and chemical intrusion can be avoided, and the transmission of the signal and energy can be made to function. See Figure 3 for details. Know the printed circuit board (200) antenna power 201043107 road wiring diagram, by setting the number Passive components (3〇) to achieve the purpose of antenna electrical impedance matching and frequency adjustment, but the limited (30) is set on the wiring area around the conventional antenna (40), the disadvantage is to reduce the circuit substrate (50 The flexibility of wiring and the tendency to be light, thin and short in the wireless communication device. Please refer to Figure 4 for the wiring diagram of the antenna circuit in the package structure of the printed circuit board (3〇〇) integrated surface-adhesive component. By reducing the wiring area installed in the integrated antenna package antenna (41), and increasing the flexibility of the circuit board (51) wiring, the wireless communication device is light and short. Please refer to Figure 5 and Figure 6. A second preferred embodiment of the present invention, the package structure (4〇〇) of the integrated surface mount component includes: a dielectric substrate (10b), a first surface metal layer (11b), and a second a surface metal layer (12b), a third surface metal layer (smoke), a plurality of plated through holes (13b), a plurality of passive components (3 turns), a wafer (6 turns), and a plurality of metal wires ( 61), a package of rubber sheets (2 〇b) and a plurality of solder balls (63). The dielectric substrate (10b) is a composite material composed of a dielectric resin and glass fibers or a composite material composed of a dielectric resin and a ceramic plate or ceramic powder. The dielectric substrate (10b) has a dielectric constant of between 2 and 50. The first and second surface metal layers (11b) (12b) are exposed, developed and cut copper foil, plated, sprayed, Printing, screen printing, or a combination thereof, the wires are formed on the upper and lower surfaces of the dielectric substrate (1〇b); the first surface metal layer (lib) is provided with a plurality of metal sheets on the dielectric substrate (10b) The upper surface forms a predetermined line pattern and a plurality of pads; 201043107 The second surface metal layer (12b) is disposed on a surface below the dielectric substrate (1〇b). a plurality of plated through holes (13b) are connected to the first surface metal layer (lib) and the second surface metal layer (12b) through the dielectric substrate (1b) to allow the first surface metal layer (13b) The lib) and the second surface metal layer (12b) are electrically connected to each other by a money via (13b) penetrating through the dielectric substrate (10b). The passive component (30) is adhered to the surface of the first surface metal layer (lib) by surface adhesion technology for electrical connection in series or in parallel. The passive component (30) is misused with f resistance, capacitance or Or a combination of both, with the advantages of low cost acquisition and standardized specifications. The wafer (6G) is disposed on the upper surface of the first surface metal layer (m) and has a plurality of wafer contacts (62). In an embodiment, the wafer (60) is formed by silver paste or surface adhesion technology. It is adhered to the upper surface of the first surface metal layer (lib). The metal wire (61) is made of a gold wire or a wire of a wire, and the wire (61) is connected to the surface of the pad (62) and the surface of the first surface metal layer (Ub) by wire bonding. The process solders the wafer contacts (62) and the first surface metal layer (10) of the "electric substrate (10)) to be electrically connected to each other. The package rubber board (2%) is covered by the dielectric layer. a surface of the electric substrate (1〇b) ribbed to seal the first surface metal layer (lib) and a plurality of passive components (10) adhered to the surface thereof, metal wirings (61) and (10), the sealing rubber sheet (20b) It is a thermosetting composite material composed of dielectric resin and ceramic materials; _ shi board (10)) _ vacuum difficult process heating 12 201043107 and pressurization, softening and evenly flowing on the dielectric substrate (1〇b) On the upper surface, when the encapsulating rubber sheet (20b) continuously absorbs energy, a polymerization reaction occurs, and the first surface metal layer (lib) and the passive component which encapsulate the upper surface of the dielectric substrate (1〇b) can be uniformly bonded and cured. (30), wafer (60) and metal wiring (61) 'and can be achieved by vacuum thermocompression bonding process The heat is uniform, the pressure is uniform, and the flow is stable, which reduces the thermal expansion effect of each material caused by the temperature difference and causes the warpage deformation of the whole package. By the protection of the sealing rubber sheet (2〇b), the physical property damage and chemical properties can be avoided. The erosion ensures the transmission of signals and energy to make it function. The solder ball (63) is placed on the lower surface of the second surface metal layer (12b), and the solder ball array (63) is soldered by the ball placement array technology. Forming on the surface of the pad of the second surface metal layer (12b) as an interface for electrically connecting the dielectric substrate (1〇b) to the external device. The package structure (400) of the integrated surface-adhesive component is further applied to the package rubber plate. (20b) disposed above - a third surface metal layer (10)), and a portion of the clock hole (13b) penetrates through the dielectric substrate (10b) and the encapsulant sheet (20b) to make the first surface metal layer (llb), the second surface metal layer (12b) is electrically connected to the third surface metal layer (14b), wherein the third surface metal layer (14b) is used to transfer heat generated by the operation of the wafer (6〇) to The third surface metal layer (14b), the help wafer ( 60) rapid heat dissipation. Referring to FIG. 7 and FIG. 8 , a third preferred embodiment of the present invention, the package structure (5〇〇) of the integrated surface mount component includes: a dielectric substrate ( 10c), a first surface metal layer (llc), a second surface metal layer (12c), a plurality of plated through holes (13c), an electronic component (%), 13 201043107, a package rubber plate (20). The electric substrate (l〇C) is a composite material composed of a dielectric resin and glass fiber or a composite material composed of a dielectric resin and a ceramic plate or ceramic powder. The dielectric substrate (10e) has a dielectric constant of 2 Between 50. The lines of the first and second surface metal layers Ulc) (12c) are formed on the dielectric substrate (10c) by exposure, development and etching of copper foil, electroplating, spraying, printing, screen printing sintering or a combination thereof. The first surface metal layer (HO is disposed on the upper surface of the ageing substrate (1Ge); the second surface metal layer (12c) is disposed on the lower surface of the dielectric substrate (10c). The mineral vias (13c) are connected to the first surface metal layer (lie) and the second surface metal layer (2e) through the dielectric substrate (1c) to allow the first surface metal layer (lle) And the second surface metal layer (i2e) may be electrically connected to each other by a metal via hole penetrating through the dielectric substrate (10c). And the electronic component (35) is electrically connected to each other by a surface transfer technology adhered to the surface Φ of the first surface metal layer (11c), and in an embodiment, the electronic component (35) may be called a plurality of sub-components , main crane components, = modules, integrated circuit chipsets, wafer antennas or other combinations of surface-adhesive parts. ~Package rubber sheet (2Ge) threatens the dielectric substrate ((4) over the surface of the surface to seal the first surface metal layer (10)) and its surface adhesion ceramics (35) 'The sealing rubber sheet (2〇c The dielectric resin and the fine composite material are used; in the embodiment, the _ plate (2〇C) is heated and pressurized by a vacuum thermocompression process to make the soft 201043107 and uniformly flow through the medium. The upper surface of the electric substrate (10) generates a polymerization reaction when the encapsulating sheet (20c) continuously absorbs energy, and uniformly bonds and cures the first surface metal layer encapsulating the upper surface of the dielectric substrate (10c). (11c), electronic component (35)' and through the vacuum thermocompression process can achieve uniform heating, uniform pressure, stable flow, reduce the thermal expansion effect of each material caused by the temperature difference, resulting in the overall package warp deformation phenomenon, and borrow Protected by the encapsulating sheet (20c), physical properties and chemical attack can be avoided, ensuring the transmission of signals and energy to function. Referring to FIG. 9 , which is a fourth preferred embodiment of the present invention, as shown, the package structure ( 600 ) of the integrated surface mount component of the present invention includes: a plurality of dielectric substrates (1 〇), A plurality of surface metal layers (15), a plurality of plated through holes (13), an electronic component (35), and a plurality of package rubber plates (2 turns). The electrical substrate (10) of the plant is a composite material composed of a dielectric resin or a glass fiber or a composite material of a dielectric resin and a ceramic plate or ceramic powder. The dielectric constant of the dielectric substrate (10) is between 2 Between 5 。. The surface of the surface metal layer (15) is formed on the surface of the dielectric substrate (1G) by exposure, development and etching _ 'plating, spraying, printing, screen printing sintering or a combination thereof; the surface metal layer (15) is provided on the upper surface and the lower surface of the electric substrate (1G). The plated through holes (13) penetrate through the dielectric substrate (1〇) and the inside of the encapsulating plate (2〇), so that the surface metal layer (15) can pass through the plated through holes (13) penetrating the dielectric substrate (10). ) Electrically connected to each other. Qian Ziqi (35) borrowed from Nunar to record the surface of the surface metal layer (15) electrically connected to each other, and in the embodiment, the 15 201043107 ΖΓ (35) can be a plurality of electronic components, active and passive The component, the shooting dragon circuit (9) group, the ^ field auxiliary county _ bearing type element = _ board (20) covering the surface of the dielectric substrate (10), raising the sealing surface metal layer (15) and its rotating electronic group (1) The Yanhai package rubber sheet (20) is a thermosetting composite material using a dielectric resin and a ceramic material; and in one embodiment, the package rubber sheet (10) is 乂 Ο 乂 乂 乂 乂 乂 乂 乂Adding, softening and evenly flowing = the upper surface of the electric substrate (10), when the encapsulating rubber sheet (20) continuously absorbs energy, a polymerization reaction occurs, and the dielectric substrate can be uniformly bonded and cured. The surface metal layer (15) and the electronic component (35) of (1〇), and the vacuum encapsulation process can achieve uniform heating, uniform and stable flow, and reduce the thermal expansion effect of each material caused by the temperature difference to produce an overall package. The phenomenon of warpage deformation is protected by a rubber sheet (2〇), Avoid erosion damage and chemical properties of the physical nature of the signal and ensure delivery of energy to make it function. In addition, the encapsulating sheet (20) can also be used as an adhesive layer between the multilayer dielectric substrates (1) to achieve a multi-layer package structure. Referring to FIG. 10, a fifth preferred embodiment of the present invention, the antenna package structure (700) of the integrated surface mount component includes: a dielectric substrate (lGd), a - surface-surface metal layer (lld), a second surface metal layer (12d), a plurality of clock vias (i3d), a plurality of passive components (30), a wafer (60), a package rubber board (2〇d), and a third Surface metal layer (14d). 201043107 The dielectric substrate (i〇d) is a composite material composed of a dielectric resin and glass fiber or a composite material composed of a dielectric resin and a ceramic plate or ceramic powder. The dielectric constant of the dielectric substrate (HM) Between 2 and 5 。. The first surface metal layer (lid) line is formed on the upper surface of the dielectric substrate (l〇d) by exposure, development and etching of copper foil, electroplating, spraying, printing, screen printing sintering or a combination thereof; In a preferred embodiment of the invention, the first surface metal layer (lid) is formed as a one-side convoluted line pattern and is set to a specific line pattern at a central position. The second surface metal layer (12d) line is also formed under the dielectric substrate (l〇d) by exposure, development and etching of copper foil, electroplating, spraying, printing, screen printing sintering or a combination thereof. surface. The mineral vias (13d) partially penetrate the interior of the dielectric substrate (丨〇d), and are connected to the first surface metal layer (lid) and the second surface metal layer (12d) to allow the first surface metal layer The (lid) and the second surface metal layer (12d) may be electrically connected to each other through a through-hole (i3d) of the dielectric substrate (1(M)), and another portion of the plated through-holes penetrates through the medium Inside the electric substrate (10d) and the encapsulating plate (20d), the first, second and third surface metal layers (11d) (12d) (14d) are connected to the first and second and third surface metal layers (lid) (12d) (14d) can be electrically connected to each other by a plated through hole (13d) penetrating through the dielectric substrate (10d) and the encapsulating plate (20d). The tunnel (13d) penetrates the inside of the dielectric substrate (10d) at a central position, and the plated through hole (13d) penetrates through the dielectric substrate (10d) and the encapsulant plate (20d) at a side position. The component (30) is adhered to the surface of the first 17 201043107 surface metal layer by a surface adhesion technique for electrical connection in series or in parallel. The passive component (30) is used. A resistor, a capacitor or an inductor or a combination of the two has the advantage of being obtained at a low cost and standardized. The wafer (60) is disposed on the upper surface of the dielectric substrate (1〇d) and the first surface metal layer (lid) Electrically connected; in the preferred embodiment, the wafer (60) is adhered to the central position of the dielectric substrate (10d) by means of silver glue or surface adhesion technology. Covering the upper surface of the dielectric substrate (1〇d) for covering and sealing the first surface metal layer (nd) and the plurality of passive components (30) and the wafer (6〇) adhered to the surface, the package The rubber sheet (2〇d) is a thermosetting composite material composed of a dielectric resin and a ceramic material, and is heated and pressurized by a vacuum thermocompression process to soften and uniformly flow on the surface of the dielectric substrate (10d). When the encapsulating rubber sheet (2〇d) continuously absorbs energy, a polymerization reaction occurs, and the first surface metal layer (Ud) and the passive component which encapsulate the upper surface of the dielectric substrate (1〇d) can be uniformly bonded and cured. (3〇) and wafer (60)' and can be heated by vacuum thermocompression bonding process Uniform, pressurized, stable flow, reduce the thermal expansion effect of each material caused by the temperature difference and produce a distortion of the overall package surface. By the protection of the encapsulation sheet (2〇d), the physical properties can be avoided and the chemical properties can be avoided. Erosion, to ensure the transmission of signals and energy, to make it function. 5 Xuan second surface metal layer (14d) is placed on the upper surface of the encapsulation board (2〇d) as an interface electrically connected to the outside, In a preferred embodiment, the third surface metal layer (14d) is formed on the 201043107 sealant by exposure, development and etching of copper foil, electroplating, spraying, printing, screen printing sintering or a combination thereof. The upper surface of the plate (2Gd) forms a fixed line _, and is electrically connected to the external device at the position of the hetero-passage _ position; in the case of the better, the plated through-hole (10) is electrically connected to a wire (not shown) ) ' to increase the antenna radiation effect. The stomach θ, in summary, the package structure of the integrated surface-adhesive component of the present invention is packaged through the wafer, the Tencel road and the passive component package, and by changing the size of the mobile component, the degree of freedom is determined. And the nature of this 'increased antenna impurity impedance and Wei miscellaneous resistance, while reducing the occupation of printed circuit board area, to reduce the overall volume, increase the use of printed circuit board space, and improve the bonding strength of structural sealant and dielectric substrate Provides the functions of bearing and structure protection, avoiding the destruction of physical properties and the chemical properties of the button. In addition, the different wafers or packaged laminated wafers or other electronic components are integrated into the same package module to become a composite type. Encapsulation, ensuring the transmission of signals and energy. The above embodiments are only used to facilitate the description of the present invention and are not limited thereto, and are not limited to the spirit of the present invention, and are familiar with various simple deformations and modifications that can be made by those skilled in the art. , should still be included in the scope of the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic sectional view showing a first preferred embodiment of the present invention; Fig. 2 is a side sectional view showing a first preferred embodiment of the present invention; and Fig. 3 is a conventional printed circuit board. 4 is a schematic diagram of a wiring of an antenna circuit of the present invention; FIG. 5 is a schematic diagram of a combination of a second preferred embodiment of the present invention; 201043107 FIG. 6 is a second preferred embodiment of the present invention 7 is a schematic sectional view of a third preferred embodiment of the present invention; FIG. 8 is a side cross-sectional view showing a third preferred embodiment of the present invention; and FIG. 9 is a fourth preferred embodiment of the present invention. A cross-sectional view of a multi-layered structure; and a tenth view of the fifth preferred embodiment of the present invention. [Description of main component symbols] Dielectric substrate (10) (10a) (10〇b) (10c) (10d) First surface metal layer (11) (lla) (llb) (llc) (lld) Second surface metal Layer (12) (12a) (12b) (12c) (12d) Plated through hole (13) (13a) (13b) (13c) (13d) Third surface metal layer (14b) (14d) Surface metal layer (15 Passive Components (30) Electronic Components (35) 封装 Package Rubber Board (20) (20a) (20b) (20c) (20d) Conventional Antenna (40) Packaged Antenna with Integrated Electronic Components (41) Circuit Board (50) (51) Wafer (60) Metal Wiring (61) Wafer Junction (62) Tin Ball (63) Package Structure (100) (400) (500) (600) (700) Printed Circuit Board (200) (300) 20