TW201009971A - Needle track inspection device, detecting device and needle track checking procedure - Google Patents

Needle track inspection device, detecting device and needle track checking procedure Download PDF

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TW201009971A
TW201009971A TW098117151A TW98117151A TW201009971A TW 201009971 A TW201009971 A TW 201009971A TW 098117151 A TW098117151 A TW 098117151A TW 98117151 A TW98117151 A TW 98117151A TW 201009971 A TW201009971 A TW 201009971A
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Taiwan
Prior art keywords
pattern
stitch
level
gray scale
electrode pad
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TW098117151A
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Chinese (zh)
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TWI483325B (en
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Yasutoshi Umehara
Makoto Tsukishima
Isao Kouno
Satoshi Sano
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Tokyo Electron Ltd
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/2851Testing of integrated circuits [IC]
    • G01R31/2886Features relating to contacting the IC under test, e.g. probe heads; chucks
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/302Contactless testing
    • G01R31/308Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
    • G01R31/311Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation of integrated circuits
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T7/00Image analysis
    • G06T7/0002Inspection of images, e.g. flaw detection
    • G06T7/0004Industrial image inspection

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Theoretical Computer Science (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

The invention provides a needle track inspection device, a detecting device with the same and a needle track checking procedure, capable of automatically detecting whether a basal layer of an electrode pad is exposed at the high precision. The needle track inspection device comprises a needle track region withdrawing part (50) for withdrawing the needle track region (13) from camera shooting data (D1), wherein the camera shooting data (D1) being obtained by a camera (72) for shooting an electrode pad (2), a greyscale grade data obtaining part (51) for obtaining the greyscale pattern corresponding to the pixel grey level and the pixel position on a center line (P) extending in the length direction of the needle track region for the needle track region (13), and a deep dug judging part (53) for judging whether the basal layer (6); is exposed based on the obtained greyscale pattern and the reference pattern when the basal layer (6) is exposed out of the needle track (10).

Description

201009971 六、發明說明: 【發明所屬之技術領域】 本發明,例如係有關於針對使用探針而進行了檢查後 之基板,來將電極墊片之基底層的露出之有無等的露出狀 況自動地檢測出來之針跡檢査裝置、及針跡檢查方法、以 及具備有針跡檢查裝置之探針裝置、還有記憶有針跡檢査 方法之實行程式的記憶媒體。 【先前技術】 於先前技術中,作爲對於被形成在半導體之基板上的 1C晶片之電性特性作測定的裝置,係使用有探針裝置。 探針裝置,係爲具備有將基板作載置且可在3維方向上作 自由移動之平台、以及探針卡,並經由進行使探針卡之探 針與基板上之被連接於配線圖案的電極墊片作接觸之所謂 的探針測試,而進行電性測定之裝置。 ^ 作爲探頭,一般係使用探針,並爲了將電極墊片之表 面的自然氧化膜作切削,而設爲施加有過驅動(指在使探 針與電極墊片相接觸後,再更進而使電極墊片上升一事) 。而,當探針係爲橫針的情況時,在施加過驅動時,由於 探針係橫向滑動,因此,係形成有縱長之針跡,就算是在 探針爲垂直針的情況時,亦會有爲了確保確實的接觸,而 使基板平台作橫向移動,並形成有縱長之針跡的情況。 故而,在探針測試後,係將電極墊片之針跡檢測出來 ,並對於在電極墊片上是否存在有針跡一事作掌握,而當 -5- 201009971 不存在有針跡時,則判斷其係爲測定不良。進而,當探針 較預定而更深地刺入電極墊片中並使電極墊片之基底層露 出的情況時,則由於裝置之信賴性係降低,因此,對於該 些之電極墊片,係有必要作爲不良來處理,又,若是發生 有此種深挖掘,則基底層之切削殘渣會附著在探針上,並 成爲污染的重要原因。故而,在針跡之檢測中,係有必要 迅速地檢測出露出的有無。 關於上述電極墊片之針跡檢查,係在將基板從探針裝 @ 置而搬出後,由作業者對於該當基板而使用金屬顯微鏡等 來進行。然而,從一枚的基板,係被製造出有多數的(例 如1 000個)晶片,而在1個的晶片上,係被形成有複數 例如10個的電極墊片,因此,進行針跡檢査之電極墊片 的數量,係成爲龐大的數量。故而,在先前之針跡檢查作 業中,係耗費非常長的時間,並且,係有必要準備金屬顯 微鏡。 相對於此種問題,係存在有:經由CCD攝像機等來 © 對晶圓W作攝像,並在控制部處對該攝像資料作解析, 而進行針跡檢査的針跡檢查裝置。例如,在專利文獻1中 ,係記載有:藉由攝像機來對於被形成在晶圓上之晶片作 攝像,並進行二値化,將形成的針跡形狀與其他之針跡的 形狀作比較,藉由此,而以恆常成爲適當之過驅動量的方 式來對於接觸位置作調整之探針。又,在專利文獻2中, 係記載有:藉由CCD攝像機來對於被形成在電極墊片上 之探針檢查後的針跡作攝像,並藉由將針跡之長軸方向的 -6 - 201009971 長度與預先所規定了的長軸之規格値作比較,來對於過驅 動量作調整之晶圓探針裝置。 又,在專利文獻3中,係記載有:事先取得測定針爲 非接觸之狀態下的墊片表面之畫像資料,並取得測定針接 觸後之墊片表面的畫像資料,而藉由對兩畫像作比較,來 將針跡以外之墊片的污漬等除外,並判定針跡的位置之針 跡檢測方法。又,在專利文獻4中,係記載有:在對墊片 • 作攝像並檢測出墊片上之針跡時,對墊片上之某一區域作 特定,並確認在該區域內是否被檢測出有針跡,當確認有 針跡的情況時,則判定探針測試係爲良好,而其之外的情 況,則判定係爲探針測試不良,而將探針測試之結果判定 作了高速化的針跡讀取裝置。 然而,在上述之各裝置中,作爲攝像手段,由於係使 用單色攝像機,因此,例如於圖17中所示一般,若是對 基板作攝像,則係將電極墊片100之資料作爲單色畫像而 ® 取得。此時,在電極墊片1〇〇之中央處,係被形成有橢圓 形之針跡110,於其中央部處,經由探針之將電極墊片 100刺破一事,基底之銅係露出,並形成露出區域111, 又,由於探針係從一個方向而傾斜地穿刺,因此,在針跡 110之一端側處,係被形成有堆積成弧狀之電極墊片100 的切削屑,並被形成有該切削屑之陰影部112。 而,當將此畫像作二値化並進行判定的情況時,灰階 準位爲高之露出區域111和切削屑之陰影部112以及在針 跡110處之邊緣部ll〇a的陰影部係變黑,而其他之區域 -7- 201009971 係變白。因此,當利用先前技術之各裝置而對露出區域 111作判定的情況時,如圖18中所示一般’會從圖18(a )之單色畫像而取得圖18(b)中所示之二値化畫像,而 無法對於切削屑之陰影部112與露出區域111作判別。故 而,會有將露出區域111誤辨識爲切削屑之陰影部112並 將被形成有露出區域111之晶片判定爲良品、或是相反的 將切削屑之陰影部112誤辨識爲露出區域111並將良品之 晶片判定爲不良品的問題,藉由控制部來判別在電極墊片 0 100處是否被形成有露出區域111 一事,係爲困難。 由於切削屑係在探針測試後才被形成,因此,就算是 特別適用專利文獻3之針跡檢測方法,亦無法作除去,而 在其他文獻中,亦並未記載有進行切削屑與針跡之判別的 記載,因此,在先前技術之各裝置中,藉由控制部來判別 在墊片1〇〇處是否被形成有露出區域111 一事,係爲困難 〇[Technical Field] The present invention relates to, for example, a substrate that has been inspected using a probe, and automatically exposes the exposed state of the underlying layer of the electrode pad. The detected stitch inspection device, the stitch inspection method, the probe device including the stitch inspection device, and the memory medium in which the execution program of the stitch inspection method is stored. [Prior Art] In the prior art, as a device for measuring the electrical characteristics of a 1C wafer formed on a substrate of a semiconductor, a probe device was used. The probe device includes a platform for placing the substrate and being movable in the three-dimensional direction, and a probe card, and the probe of the probe card and the substrate are connected to the wiring pattern. The electrode pad is used as a so-called probe test for contact, and a device for performing electrical measurement. ^ As a probe, a probe is generally used, and in order to cut the natural oxide film on the surface of the electrode pad, an overdrive is applied (after the probe is brought into contact with the electrode pad, and then further The electrode gasket rises). However, when the probe is a horizontal needle, when the overdrive is applied, since the probe slides laterally, a longitudinal stitch is formed, even when the probe is a vertical needle. There is a case where the substrate platform is laterally moved in order to ensure a sure contact, and a longitudinal stitch is formed. Therefore, after the probe test, the stitches of the electrode pads are detected, and it is known whether there is a stitch on the electrode pads, and when there is no stitch on -5 - 201009971, it is judged. It is a poor measurement. Further, when the probe penetrates the electrode pad deeper than the predetermined one and exposes the base layer of the electrode pad, since the reliability of the device is lowered, the electrode pad is attached to the electrode pad. It is necessary to treat it as a defect, and if such deep excavation occurs, the cutting residue of the base layer adheres to the probe and becomes an important cause of contamination. Therefore, in the detection of stitches, it is necessary to quickly detect the presence or absence of exposure. The stitch inspection of the electrode pad is carried out by the operator using a metal microscope or the like after the substrate is carried out from the probe. However, a plurality of (for example, 1 000) wafers are manufactured from one substrate, and a plurality of, for example, 10 electrode pads are formed on one wafer, and therefore, stitch inspection is performed. The number of electrode pads is a huge amount. Therefore, in the previous stitch inspection work, it takes a very long time, and it is necessary to prepare a metal microscope. In response to such a problem, there is a stitch inspection device that performs imaging inspection by imaging a wafer W via a CCD camera or the like, and analyzing the image data at a control unit. For example, Patent Document 1 describes that a wafer formed on a wafer is imaged by a camera and binarized, and the formed stitch shape is compared with the shape of another stitch. By this, the probe for adjusting the contact position is always used as a suitable overdrive amount. Further, in Patent Document 2, it is described that a stitch which is inspected by a probe formed on an electrode pad is imaged by a CCD camera, and by the direction of the long axis of the stitch -6 - 201009971 The length of the long-axis specification is compared with the pre-specified long-axis specification to adjust the over-driving amount of the wafer probe device. Further, Patent Document 3 describes that the image data of the surface of the spacer in the state in which the measuring needle is not in contact is obtained in advance, and the image data of the surface of the spacer after the contact of the measuring needle is obtained, and the portrait image is obtained by the pair of portraits. For comparison, it is necessary to exclude the stains of the spacers other than the stitches, and to determine the stitch detection method of the position of the stitches. Further, in Patent Document 4, it is described that when the spacer is photographed and the stitch on the spacer is detected, an area on the spacer is specified, and it is confirmed whether or not the area is detected in the area. If there is a stitch, if the stitch is confirmed, the probe test system is judged to be good, and in the case other than the test, the probe test is poor, and the result of the probe test is determined to be high speed. The stitch reading device. However, in each of the above-described devices, since a monochrome camera is used as the imaging means, for example, as shown in FIG. 17, in general, if the substrate is imaged, the material of the electrode pad 100 is used as a monochrome image. And the ® is obtained. At this time, at the center of the electrode pad 1 ,, an elliptical stitch 110 is formed, and at the central portion thereof, the electrode pad 100 is pierced through the probe, and the copper of the base is exposed. Further, the exposed region 111 is formed, and since the probe is punctured obliquely from one direction, at one end side of the stitch 110, chips which are formed by the electrode pads 100 stacked in an arc shape are formed and formed. There is a shadow portion 112 of the chip. On the other hand, when the image is binarized and judged, the gray scale level is the high exposed area 111 and the shadow portion 112 of the chip and the shadow portion of the edge portion lla at the stitch 110. It turns black, while the other areas -7- 201009971 are white. Therefore, when the exposed area 111 is judged by using the respective devices of the prior art, as shown in Fig. 18, generally, the monochrome image of Fig. 18(a) is obtained as shown in Fig. 18(b). The image is not dimmed, and the shadow portion 112 and the exposed region 111 of the chip cannot be discriminated. Therefore, the exposed portion 111 may be mistakenly recognized as the shadow portion 112 of the chip and the wafer on which the exposed region 111 is formed may be determined as a good product, or the shadow portion 112 of the chip may be mistakenly recognized as the exposed region 111 and The wafer of the good product is judged to be a defective product, and it is difficult for the control unit to determine whether or not the exposed region 111 is formed at the electrode pad 0100. Since the cutting chips are formed after the probe test, even if it is particularly suitable for the stitch detecting method of Patent Document 3, it cannot be removed, and in other documents, the cutting chips and stitches are not described. Since the description of the discrimination is made, it is difficult for the control unit to determine whether or not the exposed region 111 is formed at the spacer 1〇〇 by the control unit.

[專利文獻1]日本特開平05-36765號公報(段落號碼 G 0026 ' 0028 ) [專利文獻2]日本特開平07-29946號公報(段落號碼 0006、0008 ) [專利文獻3]日本特開2002-3 1 8263號公報(段落號 碼 0020 、 0021) [專利文獻4]日本特開2005-45194號公報(段落號碼 0104〜0106 ) -8- 201009971 【發明內容】 [發明所欲解決之課題] 本發明,係爲有鑑於此種事態而進行者,其目的,係 在於提供一種:針對使用探針而進行了檢查後之基板,而 能夠自動地且高精確度地來檢測出電極墊片之基底層的露 出之有無等的露出狀態之針跡檢查裝置、和具備有該裝置 之探針裝置、和針跡檢查方法,以及記憶有該檢查方法之 ® 實行程式的記憶媒體。 [用以解決課題之手段] 本發明之針跡檢查裝置,係爲一種在使探針接觸被檢 查基板上之電極墊片並進行了電性測定後,對被形成在前 述電極墊片上之針跡作攝像,並對於電極墊片之基底層的 露出之有無作檢查的針跡檢查裝置,其特徵爲,具備有: 對電極墊片作攝像之攝像手段;和從藉由此攝像手段所得 ® 到之畫像資料來將針跡區域之畫像資料抽出之手段;和對 於藉由此手段所得到之針跡區域的畫像資料,而取得將在 針跡區域之寬幅方向的中央位置處而朝向該當針跡區域之 長度方向延伸之線上的像素之位置與像素之灰階準位作了 對應的灰階圖案之手段;和根據藉由此手段所得到之灰階 圖案、和因應於當基底層從針跡露出時的前述灰階圖案所 決定了的基準圖案,來判定基底層是否露出之判定手段。 又,係具備有對於前述灰階準位圖案進行用以使峰値 鈍化之濾波處理之手段。並且,係具備有:將前述灰階準 -9 - 201009971 位圖案,藉由對應於該當灰階準位圖案之臨限値或是預先 所制訂了的臨限値來進行二値化,並作成由灰階準位較臨 限値而更低之低準位區域與由灰階準位較臨限値而更高之 高準位區所成的二値化圖案之手段,前述判定手段,係將 以「低準位區域」、「高準位區域」、「低準位區域」 之順序而並排之圖案作爲基準圖案,當灰階準位圖案係包 含有此基準圖案時,則判定基底層係爲露出。又,亦可爲 以下之構成:具備有:在前述二値化圖案中之各低準位區 ® 域全體處,分配邏輯「1」以及邏輯「〇」之其中一方,並 在各高準位區域全體處,分配邏輯「1」以及邏輯「〇」之 另外一方,而將前述二値化圖案變換爲由邏輯「1」以及 邏輯「〇」之組合所成的邏輯圖案之手段,前述邏輯圖案 ,係爲由邏輯「1」以及邏輯「〇」的組合所成之邏輯圖案 ,前述判定手段,係對兩者之邏輯圖案作比較,而判定基 底層是否露出。 又,較理想,對應於前述灰階準位圖案之臨限値,係 ® 爲該當灰階準位圖案之灰階準位的平均値。又,當在前述 灰階準位圖案中,存在有2處之灰階準位爲較預先所設定 了的臨限値更低之低準位區域的情況時,則當較接近於切 削開始位置之低準位區域的長度爲預先所設定了的長度以 下時,將其作爲高準位區域來處理。而,本發明之探針裝 置,係爲將基板載置於探針卡與載置台上,並使探針卡之 探針與基板上之晶片的電極墊片相接觸,而進行晶片之電 性測定的探針裝置,其特徵爲:具備有上述之各針跡檢查 -10- 201009971 lf+* 裝置。 本發明之針跡檢查方法,係爲在使探針接觸被檢查基 板上之電極墊片並進行了電性測定後,對被形成在前述電 極墊片上之針跡作攝像,並對於電極墊片之基底層的露出 之有無作檢查的針跡檢查方法,其特徵爲,包含有:藉由 攝像手段而對電極墊片作攝像之工程;和從藉由此攝像手 段所得到之畫像資料來將針跡區域之畫像資料抽出之工程 β :和對於所得到之針跡區域的畫像資料,而取得將在針跡 區域之寬幅方向的中央位置處而朝向該當針跡區域之長度 方向延伸之線上的像素之位置與像素之灰階準位作了對應 的灰階圖案之工程;和根據所得到之灰階圖案、和因應於 當基底層從針跡而露出時的前述灰階圖案所決定了的基準 圖案,來判定基底層是否露出之工程。 而,本發明之記憶媒體,係爲儲存有在針跡檢查裝置 中所被使用之電腦程式的記憶媒體,該針跡檢查裝置,係 ^ 在使探針接觸被檢查基板上之電極墊片並進行了電性測定 後,對被形成在前述電極墊片上之針跡作攝像,並對於電 極墊片之基底層的露出之有無作檢査,該記憶媒體,其特 徵爲:前述電腦程式,係以實行上述各針跡檢査方法的方 式,而被構成步驟群。 [發明效果] 若藉由本發明,則在進行針跡檢測時,係攝像墊片以 及其之週邊區域的畫像資料,並取得針跡之位置與針跡區 -11 - 201009971 域,同時,取得該針跡區域之長度方向的中心線,再取得 使中心線上的像素之位置與像素之灰階準位作了對應的灰 階圖案。而後,藉由判定手段,來根據灰階圖案、以及因 應於當基底層從針跡而露出時的前述灰階圖案所決定的基 準圖案,而判斷基底層是否露出。藉由此,在本發明中, 係能夠將墊片之深控掘所致的基底層6之露出自動且迅速 地以良好精確度而確實地檢測出來,且亦能夠將作業員之 負擔大幅的減輕。又,由於係能夠在探針裝置內來進行針 〇 跡的檢查,而不需要如同先前技術一般地進行作業員所致 之將基板搬送至金屬顯微鏡的作業區域內之作業,因此, 係能夠更進而對於探針之異常或是過驅動的異常等迅速地 作掌握。 【實施方式】 [第1實施形態] 圖1係爲對於被組入有本發明之實施形態的針跡檢查 裝置之探針裝置作展示的圖。此探針裝置係具備有底板 20,在此底板20之上,係將第1平台21以能夠在平行延 伸於X方向上之第1導引軌21a上作移動的方式而被支持 之狀態下來作積載,並經由與此第1平台21作軸通之未 圖示的滾珠螺桿與馬達,而成爲能夠朝向圖示之X方向 來移動。又,在第1平台21處,係與此第1平台21同態 樣地,而將第2平台22以能夠在與X以及Z方向相正交 之未圖示之Y方向上作移動的方式來作積載,在第2平 -12- 201009971 台22上,係被積載有能夠藉由未圖示之馬達而在圖示Z 方向上作移動之第3平台23。 在第3平台23之移動體處,係具備有將Z軸作爲旋 轉中心而能夠作微量的旋轉(可在0方向上自由地作微少 量、例如左右各1度之移動)之身爲載置台的吸盤頂部 24。故而,在此探針裝置中,將第1、第2、第3平台21 、22、23以及吸盤頂部24作爲驅動部,而成爲能夠將晶 ® 圓W在Χ、Υ、Ζ、0方向上作移動。 又,在吸盤頂部24之上方,係在相當於探針裝置之 外裝體的頂部之頭部平板30處,經由插入環31而被配設 有探針卡32。探針卡32,係於上面側處,具備有被電性 連接於未圖示之測試頭處的電極群,於下面側處,被與該 當電極群分別作電性連接之探針(例如朝向斜下方延伸之 由金屬線所成的探針33),係對應於晶片1之電極墊片2 (參考後述之圖2)的配列而被設置。另外,作爲探針33 W ,係可爲相對於晶圓W之表面而垂質地延伸之垂直針( 線材探針),亦可爲被形成在可撓曲之薄膜上的金突塊電 極等。 在第3平台23處,係被設置有固定板23a,在此固 定板23a處,係被積載有身爲攝像手段之下攝像機70, 該下攝像機70,係將用以將探針33之針尖擴大拍攝之高 倍率的光學系70a與CCD攝像機70b作組合所構成。又 ,在固定板23a處,係以相鄰接於下攝像機70的方式, 而被積載有用以對於探針3 3之配列而涵蓋廣範圍地作攝 -13- 201009971 影之低倍率攝像機71,並被設置有藉由進退機構26而能 夠在相對於下攝像機70之合焦面而與光軸相交叉的方向 上作進退之目標物27。 在吸盤頂部24與探針卡32之間的區域處,與下攝像 機70爲相同構成之上攝像機(攝像手段)72,係被積載 於可沿著未圖示之導引構件而自由移動地被支持之攝像機 搬送部34處,目標物27,係以能夠藉由下攝像機70以 及上攝像機72來作畫像辨識的方式而被構成,例如,係 參 在透明之玻璃板上,被形成有對位用之被攝體。又,在探 針裝置之外裝體上,係被設置有當經由上攝像機72來將 晶圓W作攝像時而對晶圓W作照明的例如由藍色發光二 極體所成之照明手段2 8。 又,在探針裝置處,係被設置有用以對上述各構件之 驅動等作控制的控制部4,並具備有CPU40、ROM ( Read Only Memory ) 41、RAM ( Random Access Memory ) 42、 輸入部43、畫面等之顯示部44、探針探查用程式45、針 ® 跡檢査用程式46等,此些之各裝置,係以能夠經由匯流 排47來進行資料或命令之授受的形態而被作連接。而, 此控制部4,係經由被連接於探針裝置之控制器與被連接 於控制器之個人電腦所構成。探針探查用程式45,係爲 用以對探針裝置作控制並進行探針測試之命令群,並對於 第1〜第3平台21〜23以及吸盤頂部24作驅動控制,來控 制被載置之晶圓W的位置,並進行探針測試。 針跡檢査用程式46,係爲用以對經由上攝像機72所 -14- 201009971 取得之晶圓W的攝像資料進行處理,並對於探針測試後 之電極墊片2的針跡進行檢測檢查之命令群。在針跡檢查 用程式46中,係具備有:對應於本發明之從畫像資料而 抽出針跡區域之畫像資料的手段之針跡區域抽出部50、 和對應於本發明之取得灰階圖案的手段之灰階準位資料取 得部51、和對應於本發明之作成二値化圖案的手段之二 値化處理部52、和對應於本發明的判定手段之深挖掘判 β 定部53。針跡區域抽出部50,係爲對灰階資料作處理並 抽出針跡區域之命令群。灰階準位資料取得部52,係爲 取得針跡區域之長軸方向的中心線,同時取得其中心線上 之像素的圖案之命令群。二値化處理部52,係爲在由圖 案來形成二値化圖案的同時,將二値化圖案之像素的値連 續了特定値以上之區域置換爲邏輯値區域之命令群。深挖 掘判定部54,係爲從二値化圖案之形狀來對於在針跡處 之基底層的露出區域之有無作判定的命令群。而,在本實 ® 施形態中,係藉由此針跡檢查用程式46和上攝像機72以 及照明手段28,而構成針跡檢查裝置。 接著,針對上述實施形態之作用作說明。首先,依據 探針探査用程式45,來進行對於身爲被檢查基板之晶圓 W的探針測試。於圖2、3中,展示此晶圓W之晶片(1C 晶片)1處的電極墊片2的配置部分之略解圖。在晶圓w 處,係被形成有複數之成爲半導體晶片之原型的晶片 在1個的晶片1之上面,係被形成有複數之作爲電極之例 如由鋁(A1)所成的電極墊片2(在圖2中,爲了便利, -15- 201009971 係爲10個)。此電極墊片2,係被形成在基底層6之上 面,該基底層6,係爲在藉由半導體之例如矽(Si )所形 成的基台5上所成膜之例如由銅(Cu)所成者。 在探針測試中’係藉由上攝像機72來對晶圓W之電 極墊片2作攝像,同時,藉由下攝像機70來對於探針卡 32之探針33的針尖作攝像,並求取出在各攝像時之藉由 吸盤頂部24的驅動系或者是線性尺度所特定出的X、γ、 Z方向之座標位置,再將晶圓W移動至根據此 等座標位 參 置所求取出之接觸位置處。而後,使探針33與晶圓W上 之電極墊片2相接觸,並藉由經由探針卡32所連接的測 試頭而被作了連接之未圖示的測試機,來測定各晶片1之 電性特性。若是探針測試結束,則係進行在電極墊片2處 之針跡的檢査。[Patent Document 1] Japanese Laid-Open Patent Publication No. H05-36765 (Patent No. JP-A No. 07-29946) (Patent No. 0006, 0008) [Patent Document 3] JP-A-2002 Japanese Patent Laid-Open Publication No. 2005-45194 (paragraph No. 0104 to 0106) -8-201009971 [Summary of the Invention] [Problems to be Solved by the Invention] The present invention has been made in view of such a situation, and an object thereof is to provide a substrate which is inspected using a probe, and which can detect the substrate of the electrode pad automatically and with high precision. A stitch inspection device for exposing the exposed state of the layer, a probe device including the device, a stitch inspection method, and a memory medium in which the program of the inspection method is stored. [Means for Solving the Problem] The stitch inspection device of the present invention is an electrode pad formed on the substrate to be inspected and electrically measured, and then formed on the electrode pad. A stitch inspection device for photographing and detecting whether or not the base layer of the electrode pad is exposed is characterized by: an image pickup means for imaging the electrode pad; and obtaining from the image pickup means ® means to extract the image data of the stitching area; and to obtain the image data of the stitching area obtained by this means, and to obtain the center position in the wide direction of the stitching area a means for grayscale pattern corresponding to the position of the pixel on the line extending in the longitudinal direction of the stitching region and the grayscale level of the pixel; and the grayscale pattern obtained by the means, and the corresponding base layer The determination means for determining whether or not the underlayer is exposed is determined from the reference pattern determined by the gray scale pattern when the stitch is exposed. Further, there is provided means for performing filtering processing for passivating the peak enthalpy to the gray scale alignment pattern. Further, the method is characterized in that: the gray scale quasi-9 - 201009971 bit pattern is selected, and the binarization corresponding to the gray scale level pattern or the pre-defined threshold is used to perform the dimming process. The means for determining the divergence pattern formed by the gray level level being lower than the threshold level and the lower level area being higher than the gray level level and the higher high level area, the foregoing determining means A pattern in which the "low-level area", the "high-level area", and the "low-level area" are arranged side by side is used as a reference pattern, and when the gray-scale level pattern includes the reference pattern, the basal layer is determined. It is exposed. Further, a configuration may be adopted in which one of the logical "1" and the logical "〇" is assigned to all of the low-level areas of the binary pattern, and each of the high-levels is at a high level. In the entire area, the other one of the logical "1" and the logical "〇" is assigned, and the above-described binary pattern is converted into a logical pattern formed by a combination of logical "1" and logical "〇", and the logical pattern is It is a logical pattern formed by a combination of logical "1" and logical "〇", and the determination means compares the logical patterns of the two to determine whether or not the underlying layer is exposed. Moreover, it is preferable that the threshold 对应 corresponding to the gray scale level pattern is the average 値 of the gray scale level of the gray scale level pattern. Further, when in the gray scale alignment pattern, there are cases where the gray level of the two places is a lower level than the preset threshold ,, when it is closer to the cutting start position When the length of the low-level area is equal to or less than the length set in advance, it is handled as a high-level area. In the probe device of the present invention, the substrate is placed on the probe card and the mounting table, and the probe of the probe card is brought into contact with the electrode pad of the wafer on the substrate to perform electrical properties of the wafer. The probe device to be measured is characterized in that it has the above-mentioned respective stitch inspection-10-201009971 lf+* device. In the stitch inspection method of the present invention, after the probe is brought into contact with the electrode pad on the substrate to be inspected and electrically measured, the stitch formed on the electrode pad is imaged, and the electrode pad is applied. A method for inspecting the presence or absence of inspection of the base layer of the sheet, characterized in that it comprises: an image capturing operation of the electrode pad by means of an image pickup means; and image data obtained by the image capturing means The project β for extracting the image data of the stitch region and the image data of the obtained stitch region are obtained at a central position in the wide direction of the stitch region and extending toward the length of the stitch region. The position of the pixel on the line corresponds to the gray scale pattern of the pixel, and is determined according to the gray scale pattern obtained, and according to the gray scale pattern when the base layer is exposed from the stitch The reference pattern is used to determine whether or not the base layer is exposed. Further, the memory medium of the present invention is a memory medium storing a computer program used in the stitch inspection device, and the stitch inspection device is configured to contact the electrode pad on the substrate to be inspected and After performing the electrical measurement, the stitches formed on the electrode pads are imaged, and the presence or absence of the exposure of the base layer of the electrode pads is examined. The memory medium is characterized in that the computer program is The steps are grouped by performing the above-described stitch inspection methods. [Effect of the Invention] According to the present invention, when the stitch detection is performed, the image data of the image pickup pad and the peripheral region thereof are captured, and the position of the stitch and the stitch area -11 - 201009971 are acquired, and the stitching area is obtained. The center line in the longitudinal direction of the stitching area is obtained in a gray scale pattern corresponding to the position of the pixel on the center line and the gray scale level of the pixel. Then, by the determination means, it is judged whether or not the underlayer is exposed based on the gray scale pattern and the reference pattern determined in accordance with the gray scale pattern when the base layer is exposed from the stitch. Therefore, in the present invention, the exposure of the underlying layer 6 due to the deep excavation of the spacer can be reliably and quickly detected with good accuracy, and the burden on the operator can be greatly increased. Reduced. Further, since it is possible to perform the inspection of the stitches in the probe device, it is not necessary to carry out the work of transporting the substrate into the work area of the metal microscope by the operator as in the prior art. Furthermore, it is possible to quickly grasp the abnormality of the probe or the abnormality of the overdrive. [Embodiment] [First Embodiment] Fig. 1 is a view showing a probe device in which a stitch inspection device according to an embodiment of the present invention is incorporated. The probe device includes a bottom plate 20 on which the first stage 21 is supported so as to be movable on the first guide rail 21a extending in the X direction in parallel. As a stowage, the ball screw and the motor (not shown) that are axially coupled to the first stage 21 are moved in the X direction shown in the drawing. Further, the first stage 21 is in the same manner as the first stage 21, and the second stage 22 is moved in the Y direction (not shown) orthogonal to the X and Z directions. For the stowage, on the second plane -12-201009971, the third platform 23 that can be moved in the Z direction by the motor (not shown) is stowed. In the moving body of the third stage 23, the Z-axis is used as a center of rotation and can be rotated a small amount (a small amount can be freely moved in the 0 direction, for example, 1 degree left and right). The top of the suction cup 24. Therefore, in the probe device, the first, second, and third stages 21, 22, and 23 and the top portion 24 of the chuck are used as the driving portions, so that the crystal W is in the direction of Χ, Υ, Ζ, and 0. Make a move. Further, above the top portion 24 of the chuck, a probe card 32 is disposed via the insertion ring 31 at a head flat plate 30 corresponding to the top of the outer casing of the probe device. The probe card 32 is provided on the upper side, and is provided with an electrode group electrically connected to a test head (not shown), and a probe electrically connected to the electrode group at the lower side (for example, facing The probe 33) made of a metal wire extending obliquely downward is provided corresponding to the arrangement of the electrode pads 2 of the wafer 1 (refer to FIG. 2 described later). Further, the probe 33 W may be a vertical needle (wire probe) that extends vertically with respect to the surface of the wafer W, or may be a gold bump electrode formed on a flexible film. At the third platform 23, a fixing plate 23a is provided, and at this fixing plate 23a, a camera 70 under the imaging means is stacked, and the lower camera 70 is used to set the tip of the probe 33. The optical system 70a that enlarges the high magnification of the imaging is combined with the CCD camera 70b. Further, at the fixing plate 23a, the low-magnification camera 71 for covering the wide range of the shooting -13-201009971 is widely carried out in such a manner as to be adjacent to the lower camera 70. Further, an object 27 that can advance and retreat in a direction intersecting the optical axis with respect to the focal plane of the lower camera 70 by the advancing and retracting mechanism 26 is provided. In the region between the top 24 of the chuck and the probe card 32, the upper camera (image pickup means) 72 is configured to be mounted on the lower camera 70 so as to be movably movable along the guide member (not shown). In the supported camera transport unit 34, the object 27 is configured to be image-receivable by the lower camera 70 and the upper camera 72, and is formed, for example, on a transparent glass plate to be aligned. Use the subject. Further, in the external package of the probe device, an illumination means such as a blue light-emitting diode that illuminates the wafer W when the wafer W is imaged via the upper camera 72 is provided. 2 8. Further, the probe device is provided with a control unit 4 for controlling the driving of the above-described respective members, and includes a CPU 40, a ROM (Read Only Memory) 41, a RAM (Random Access Memory) 42, and an input unit. 43. A display unit 44 such as a screen, a probe search program 45, a needle test program 46, and the like, and each of these devices is configured to be capable of transmitting data or commands via the bus bar 47. connection. The control unit 4 is constituted by a controller connected to the probe device and a personal computer connected to the controller. The probe detecting program 45 is a command group for controlling the probe device and performing probe testing, and controls driving the first to third stages 21 to 23 and the top 24 of the chuck to be mounted. The position of the wafer W and probe testing. The stitch inspection program 46 is for processing the image data of the wafer W obtained by the upper camera 72-14-201009971, and detecting and checking the stitch of the electrode pad 2 after the probe test. Command group. In the stitch inspection program 46, the stitch region extracting portion 50 corresponding to the image data of the stitch region is extracted from the image data of the present invention, and the grayscale pattern corresponding to the present invention is obtained. The gray scale level data acquisition unit 51 of the means, the binary processing unit 52 corresponding to the means for creating the binary pattern of the present invention, and the deep excavation determination unit 53 corresponding to the determination means of the present invention. The stitch area extracting portion 50 is a command group for processing the gray scale data and extracting the stitch area. The gray scale level data acquisition unit 52 is a command group that acquires the center line of the long-axis direction of the stitch region and acquires the pattern of the pixels on the center line. The binarization processing unit 52 is a command group in which a region of a pixel of the binarized pattern is successively replaced with a region equal to or larger than a predetermined region, and a logical region is formed while forming a binarized pattern. The deep excavation determining unit 54 is a command group for determining the presence or absence of the exposed area of the underlying layer at the stitching from the shape of the dichroic pattern. In the present embodiment, the stitch inspection program 46, the upper camera 72, and the illumination means 28 are used to form the stitch inspection device. Next, the action of the above embodiment will be described. First, a probe test for the wafer W which is the substrate to be inspected is performed in accordance with the probe detecting program 45. In Figs. 2 and 3, a schematic view of a configuration portion of the electrode pad 2 at the wafer 1 (1C wafer) 1 of this wafer W is shown. At the wafer w, a wafer in which a plurality of prototypes of a semiconductor wafer are formed is formed on one wafer 1, and a plurality of electrode pads 2, for example, made of aluminum (A1), are formed as electrodes. (In Figure 2, for convenience, -15- 201009971 is 10). The electrode pad 2 is formed on the underlying layer 6, which is formed on a substrate 5 formed of, for example, germanium (Si) by a semiconductor, for example, copper (Cu). The person who made it. In the probe test, the electrode pad 2 of the wafer W is imaged by the upper camera 72, and the tip of the probe 33 of the probe card 32 is imaged by the lower camera 70, and is taken out. At the time of each imaging, by the driving system of the top 24 of the chuck or the coordinate position of the X, γ, and Z directions specified by the linear scale, the wafer W is moved to the contact for taking out according to the coordinates of the coordinates. Location. Then, the probe 33 is brought into contact with the electrode pad 2 on the wafer W, and each of the wafers 1 is measured by a tester (not shown) connected via a test head connected to the probe card 32. Electrical characteristics. If the probe test is completed, the stitching at the electrode pad 2 is checked.

接著,針對針跡之檢查作說明。以下之一連串的動作 ,係根據針跡檢查用程式46而進行。如圖4之流程圖中 所示一般,首先,藉由照明手段28,來對探針測試後之 G 晶圓W作照明,並藉由上攝像機72來作攝像,而將晶圓 W上之畫像作爲攝像資料D1來取得(步驟S1)。 接著,從攝像資料D1來進行電極墊片2之檢測。在 攝像資料D1處,由於電極墊片2部分之光的反射量係爲 大’因此,灰階準位係全體性地變高。而後,對於攝像資 料D1之所有的像素,在畫面上作掃描並取得將像素之座 標位置與其之灰階準位作了對應的資料,而記憶在 RAM42中,並在檢測出灰階準位爲高之連續之區域的同 -16- 201009971 時,將區域之圖示χ軸方向以及γ軸方向之端部的座標 檢測出來,而檢測出將此端部作了連接之矩形。 若是檢測出了矩形,則將預先所作了記憶的電極墊片 2之匹配樣模Τ1讀出,並與該矩形作比較(步驟S2)。 圖5係展示此種一連串之處理的示意圖。D1係爲攝像資 料,Τ1係爲匹配樣模。而後,當匹配樣模Τ1與所檢測出 之矩形的一致率成爲了規定値(例如90% )以上的情況時 # ,則判定所檢測出了矩形係爲電極墊片2之區域,相反的 ,當在規定値以下的情況時,係重新進行檢測(步驟S3 )° 若是反覆進行步驟S2、S3,而結束了對於攝像資料 D1之全區域處的電極墊片2之檢測,則係將電極墊片2 之畫像切出,並對該畫像進行一定之處理,而取得針跡 10之Χ-Υ平面上的位於最外側之像素的座標位置,並根 據此座標位置,來取得與針跡10相一致、例如與針跡10 ® 之外周側相接之矩形狀的針跡區域13,以及其之位置座 標’再將該資料記憶在RAM42中(步驟S4 )。而後,反 覆進行步驟S3、S4,而將全部的電極墊片2之每一者的 針跡區域1 3以及其之座標位置檢測出來,並將該資料記 憶在RAM42中。另外,在本實施形態中,係在作爲上述 之處理而取得針跡區域13時,將電極墊片2之畫像根據 預先所制訂了的臨限値而進行二値化,並對二値化後之像 素作探索,而進行處理。另外,爲了參考,將進行上述處 理時之電極墊片2的實際之灰階畫像於圖6中作展示。此 -17- 201009971 種針跡區域13之檢測,係藉由針跡區域抽出部50來實行 〇 在檢測出了所有的針跡區域1 3後,首先,如圖7 ( ^ )中所示一般,從攝像資料D1來將對應於針跡區域13 之區域、例如將針跡區域13與其之外周40像素量的資料 切出(步驟S5),同時,取得針跡區域13之長度方向的 中心線P、和中心線P之起點P1以及終點P 2之位置座標 (步驟S6)。而後,如圖7(b)中所示一般,取得中心 . 線P上之像素的灰階準位與位置座標之資料,並取得以灰 階準位作爲橫軸且以像素數作爲縱軸之圖案(圖案資料) 14(步驟S7)。另外,在本實施形態中,起點P1以及終 點P2,係分別被設定在從中心線P與外接矩形1 3之交點 起而朝向外側來離開了一定之距離(例如30像素)的位 置處。 在生成了圖案14後,將圖案14之像素的灰階準位作 合計,並求取出於圖7(b)中以1點鍊線來作展示之灰 @ 階準位的平均値hi,而將此平均値hi作爲臨限値,來將 圖案14二値化。藉由此,而取得圖7(c)中所示一般之 方形波狀的二値化圖案(二値化圖案資料)15,並將此資 料記憶在RAM42中(步驟S8)。而後,反覆進行步驟 S 5 ~S 8,並取得所有之針跡區域13的每一者之二値化圖案 15,而將該資料記憶在RAM42中。 在對於後續之動作作詳述之前,先對於其之槪要以及 目的作簡單的敘述。圖8係爲針跡10之模式圖,在此針 -18- 201009971 跡10處,係被形成有露出區域11。在此針跡10之中心 線P的區域上’爲了便利,而分配符號da、db、dc、dd 、de。db係爲電極墊片2之存在有切削屑的區域’ dd係 爲對應於露出區域11之區域’ da係爲電極墊片2之表面 ,dc、de係爲電極墊片2之被切削面(鋁部分)。在圖7 之二値化圖案15中,係將此些之區域da~de附加有對應 地作表示。 〇 於此,若是探針33係爲橫針(從探針卡32而朝向斜 下方來延伸之針),則在各晶片1之電極塾片2的每一者 中,係可以得知其係被朝向何一方向而被切削。又,就算 是探針33係爲垂直針,在接觸時,亦由於使晶圓平台20 作微量移動之方向係爲已知,因此,係可以得知在電極墊 片2之每一者中係被朝向何一方向而作切削。亦即是,在 控制部4側,由於係能夠掌握到成爲針跡1 0之檢查對象 的電極墊片2係爲何一晶片之何一電極墊片2,因此,係 ® 能夠得知探針3 3之切削方向。故而,當沿著中心線p而 取得像素之灰階準位時,係能夠得知相對於針跡10之成 爲掃描開始點的起點P 1係在哪一側。 而後,當在針跡1〇處被形成有露出區域11的情況時 ’若是從起點P1起朝向終點P2而將二値化圖案15讀出 ’則針跡10之外的電極墊片2之表面係爲明亮,接著, 在身爲電極墊片2之切削屑的鋁之切削屑的陰影部12之 部位係變暗。進而,由於露出區域11之前後係爲明亮, 因此’若是對明亮之區域全體分配邏輯「1」,並對陰暗 -19- 201009971 的區域全體分配邏輯「〇」’則係成爲被形成有「1、〇、1 、〇、1」之邏輯圖案。故而’藉由將此邏輯圖案作爲露出 區域11之有無的判定用基準圖案,而與在各電極墊片2 處所取得了的邏輯圖案作比較,成爲能夠判定露出區域 11之有無。另外,若是能夠在經驗上而對針跡10處之露 出區域11的發生範圍作掌握,則二値化圖案15係並不需 要一直取得至終點P2之位置,在此例中,係設爲將二値 化圖案15取得至較針跡10之長度方向的中點而更靠終點 @ P2之位置P3 (以下,稱爲中間點P3 )爲止。 根據此種觀點,具體上,係進行如同下述一般之步驟 。在取得了所有的二値化圖案1 5之後,例如從起點P 1起 而一次一像素地對像素之値作檢査,並對於計算像素數之 計數器作加算,在到達了將像素之値作替換的變更位置時 ,將計數器之値記憶在RAM42之記憶區域中,同時,將 計數器初期化,反覆進行此,而求取出在二値化圖案15 之「1」之群、「〇」之群的各別之長度。而後,進行對於 〇 各「1」或是「〇」之區域的長度是否並未超出預先所設定 之臨限値一事作確認之處理。在本實施形態中,係爲了將 被形成在墊片2或是針跡10處之傷痕或者是照明手段28 等之影響排除,而在區域中設定有長度之臨限値,並經由 將此臨限値與各區域之長度作比較,來進行確認處理。而 後,針對長度超出了臨限値之區域,係將該區域之邏輯値 反轉,而針對臨限値內之區域,係分配邏輯「1」或是邏 輯「〇」(步驟S9 )。亦即是,在如圖7 ( c )中所示般之 -20- 201009971 邏輯「1」連續並排的區域全體處分配邏輯「1」(在白色 像素群全體區域處分配邏輯「1」),並在邏輯「〇」連續 並排之區域全體處分配邏輯「〇」(在黑色像素群全體區 域處分配邏輯「〇」)。故而,圖7(C)之二値化圖案, 係作爲邏輯圖案「1、0、1、〇、1」而被表現。另外’本 實施形態之臨限値,例如若是將被切出之中心線P上的像 素之長度設爲L ( pixel ),則區域da、de之臨限値係爲 ❿ 0.05L-0.2L ( pixel ),區域 db、dc之臨限値係爲 0.02L 〜0.1L (pixel),區域 dd 之臨限値係爲 0.1L~0.3L ( pixel ) 。 經由進行此處理,能夠消除下述般之事態。例如,當 在圖9中所示之底部處由於探針33而被形成有傷痕lla ,並藉由此傷痕11a之陰影而如圖10中所示般地產生了 dd爲非常短之二値化圖案15a的情況時,在未進行上述 之確認處理的狀態下,二値化圖案15a之區域的排列、亦 • 即是邏輯圖案,係成爲「1、〇、1、〇、1」。因此’在對 應於二値化圖案15a之針跡10處,係會被誤辨識爲被形 成有露出區域11。相對於此,若是對於二値化圖案15a 而進行上述之確認處理,則區域dd之長度,由於係落在 所設定之臨限値的範圍之外,因此,針對此區域,係將邏 輯準位反轉並與區域dc、de —體化’而邏輯圖案係成爲 「1、0、1、1、1」,而不會有被誤辨識之虞。 將如此這般所得到之邏輯圖案,與身爲在針跡處 被形成有露出區域11時的邏輯圖案之基準邏輯圖案作比 -21 - 201009971 較,若是一致,則判定在所對應之針跡1 〇處係被形成有 露出區域11,若是不一致,則判定係並不存在有露出區 域11(並非爲深挖掘)(步驟S10)。與圖7(a)所示 之針跡區域13相對應的邏輯圖案,由於係爲「1、〇、1、 0、1」,因此,在所對應之針跡10處,係判定被形成有 露出區域11,並將該判定結果與墊片2附加有對應而記 憶在RAM42中(步驟S11)。相對於此,當邏輯圖案並 未成爲「1、〇、1、〇、1」的情況時,則判定在該電極墊 〇 片2處係並未被形成有露出區域11,並將該結果與該當 電極墊片2附加有對應而記憶在RAM42中(步驟S12) 〇 而後,從RAM42來將與各電極墊片2相對應之針跡 10的檢查結果讀出,並針對包含有被形成有銅之露出區 域11的電極墊片2之晶片1,將該針跡10係爲深挖掘等 之資訊,附加在該晶片1而記憶在RAM42中。若是針對 在取得了此種資訊後之處理的其中一例作敘述,則針對被 @ 判斷爲深挖掘之電極墊片2,係亦可使作業員將該電極墊 片2之畫像顯示在顯示部處,並由作業員來對於該深控掘 之判斷是否爲合適一事作確認,而若是最終係被判斷爲深 控掘,則將包含該電極墊片2之晶片1作爲不良品來處理 。又,不用說,亦可並不進行此種作業員之確認。亦可將 針跡檢査之結果,例如與晶圓W上之晶片1的位置相附 加對應而顯示在顯示部處,並例如在各晶片1處,進行對 應於該結果之顏色分配等。 -22- 201009971 另外,在本實施形態中’係分別由針跡區域抽出部 5〇來進行與步驟S2〜步驟S4相對應之工程’由灰階準位 資料取得部51來進行與步驟S5〜步驟S7相對應之工程, 由二値化處理部52來進行與步驟S8相對應之工程’並由 深挖掘判定部53來進行與步驟S9~步驟S12相對應之工 程。 以上所述之本實施形態的探針裝置,係在進行針跡 Φ 10之檢測時,取得電極墊片2以及其週邊之晶圓W的攝 像資料D1,而取得針跡10之位置與針跡區域13,同時 ,取得針跡區域13之長度方向的中心線P,並產生使中 心線P上之像素的位置與像素的灰階準位作了對應之圖案 14。而後,由此灰階的圖案14來經由二値化圖案15而取 得邏輯圖案,並將該邏輯圖案,與因應於當存在有露出區 域11時之灰階準位所求取出的圖案14作比較,藉由此, 而判定針跡10之露出區域11的有無。故而,能夠將探針 • 33所致之墊片2的深挖掘(一直挖掘到了基底層6處的 狀態)自動且迅速地以高精確度而確實的檢測出來,且亦 能夠將作業員之負擔大幅度的減輕。又,由於係能夠在探 針裝置內來進行針跡1〇的檢査,而不需要如同先前技術 般地進行作業員所致之將晶圓W搬送至金屬顯微鏡的作 業區域內之作業,因此,係能夠更進而對於探針之異常或 是過驅動的異常等迅速地作掌握。 另外,本發明由於係爲在取得針跡區域之長度方向的 中心軸與其之位置座標的同時,亦取得使中心軸上之像素 -23- 201009971 的灰階準位與座標位置作了對應之圖案,並由該圖案之形 狀,來對於在針跡處是否被形成有露出區域一事作判定者 ,因此,電極墊片之材質與基底層之材質,係並非爲分別 被限定爲銅、鋁者,只要因應於所使用之各材質,來對於 圖案之形狀的判定基準作變更即可。於此,本發明之針跡 檢測裝置,係並不被限定於組合於探針裝置中地作設置, 而亦可作爲獨立運行式(stand alone )來構成。又,用以 取得灰階圖案之線,係並不被限定於針跡10之中心線, 參 就算是從中心而偏離,只要是能夠得到本實施形態之效果 的線’亦即是,只要是在針跡區域之寬幅方向中央位置處 而在長度方向上作延伸的線即可。 又’在本實施形態中,雖係取得使從中心點P上之起 點1起直到中間點3爲止的像素與灰階準位作了對應之圖 案14’並進行露出區域11之檢查,但是,作爲本發明之 實施形態,亦可設爲:當在圖案14中而無法檢測出露出 區域U的情況時,將從終點2起直到終點P3爲止之像素 ® 抽出’並產生圖案,且以該圖案爲基準,來進行露出區域 11之再檢測,若藉由此實施形態’則就算是露出區域n 係被形成於終點P2側的情況時,亦能夠將露出區域11檢 測出來。不用說,亦可針對中心線P上之全部的像素來形 成圖案14,並進行判定。 又,在本實施形態中,雖係從攝像資料D1來產生對 應於針跡區域13之中心線P的圖案14,丨日是,作爲本發 明之實施形態,亦可先將攝像資料D1以預先所設定了的 -24- 201009971 臨限値來進行二値化,並從該二値化資料來取得針跡 13之中心線P1i的像素,再取得二値化圖案ι5,而 判定。又’雖係經由對於二値化圖案15之區域的値 列係成爲「1、〇、1、〇、丨」一事作確認,而對於被 有露出區域η —事作判定,但是,作爲本發明之實 態’係亦可經由對於圖7 ( c )中所示之區域db、dc 之値的排列係成爲「〇、1、〇」一事作確認,來對於 ® 成有露出區域11 一事作判定。進而,如同前述一般 此例中’雖係針對各電極墊片2之每一者,而對於 10之切削方向作掌握,但是,亦可設爲並不對該方 掌握’而取得灰階圖案,並對於在最終所得到之邏輯 中是否被包含有「0、1、0」一事作確認》 又’在本實施形態中,作爲照明手段28,係使 視野照明,並對晶圓W作照明而取得攝像資料D 1, ,作爲本發明之實施形態,爲了從攝像資料D1來將 ® W上之陰影或是傷痕等的影響降低,亦可將明視野照 暗視野照明作組合來構成照明手段。又,在本實施形 ,作爲針跡區域,係將與針跡10相對應之矩形狀的 區域1 3檢測出來,但是,作爲本發明之實施形態, 區域係亦可爲與針跡10相對應之橢圓形。又,在本 形態中,當對晶圓w作攝像時,係藉由用以對電極墊 與探針33之接觸位置作決定的上攝像機72而作了攝 但是,作爲本發明之實施形態,例如係亦可在裝置外 等處另外設置用以檢測出針跡之專用的攝像機單元, 區域 進行 的排 形成 施形 、dd 被形 ,在 針跡 向作 圖案 用明 但是 晶圓 明與 態中 針跡 針跡 實施 片2 像, 裝部 並緊 -25- 201009971 接在探針測試之後而對晶圓W作攝像並進行針跡檢查。 [第2實施形態] 針對本發明之第2實施形態,一面參考圖11以及14 ,一面作說明。圖11中所示之第2實施形態的探針裝置 ,係在針跡檢查用程式46中,具備有身爲進行本發明之 濾波處理之手段的濾波處理部54。濾波處理部54,係在 圖12所示之流程圖的步驟S5之工程中,對於攝像資料 參 D1而進行使攝像資料D1之陰暗部分與明亮部分間的邊界 線成爲不鮮明之濾波處理,而將攝像資料D1變換爲修正 攝像資料D3。而後,在本實施形態中,係從修正攝像資 料D3來產生圖案14。另外,在圖12所示之流程圖中, 在步驟S1~S4處,係進行與第1實施形態之步驟S1〜步驟 S4相同的處理,在步驟S6〜S13中,係進行與第1實施形 態之步驟S5〜步驟S12相同之處理。 在此探針裝置中,藉由具備有濾波處理部54,係成 〇 爲能夠得到在以下之圖1 3、1 4中所說明之作用。如圖1 3 (a)中所示一般,當在針跡處並不存在有露出區域而僅 被形成有傷痕的情況時,若是由此攝像資料D1來取得針 跡區域13,並如同上述一般地而取得圖案14,則係取得 如同圖13(b)中所示之圖案14。在此圖案14處,係由 於傷痕之陰影的影響,而形成有3個場所之較灰階準位之 平均値hi更低之區域,亦即是對應於電極墊片2之切削 屑的陰影之區域81和對應於針跡的傷痕之區域82、83, -26- 201009971 因此,若是從此圖案14而取得二値化圖案15,並從二値 化圖案15而取得邏輯圖案,則係會有邏輯圖案與基準圖 案相一致的情況。而,當傷痕之伸長方向爲與中心線P相 同的情況時,由於傷痕之陰影與中心線P間之重合距離係 變長,因此,會有對應於傷痕之區域82的長度落入至臨 限値之範圍內的事態,就算是進行了第1實施形態之確認 處理,邏輯圖案亦會與基準圖案相一致,而有無法將傷痕 Φ 之影響完全除去並誤判定爲係存在有露出區域之虞。 相對於此,在本實施形態中,就算是對於如圖1 3中 所示般之針跡的攝像資料D1,亦能夠將傷痕的影響除去 ,並判定爲無露出區域。在本實施形態中,係如同圖14 (a)中所示一般,經由濾波處理部54而將攝像資料D1 變換爲修正攝像資料D3。此修正攝像資料D3,由於係將 寬幅爲狹窄之傷痕的陰影之陰暗部分與明亮部分間的邊界 線作了不明瞭化,因此,陰影之陰暗的像素係與明亮之像 ^ 素交織,而陰影之部分係全體性的變亮,相反的,明亮的 部分係變暗。另一方面,在切削屑之陰影部或是露出區域 等之陰暗像素之面積爲廣的區域處,就算是將明亮之部分 與陰暗之部分的邊界線作了不明瞭化,亦由於陰暗之部分 的寬幅係爲廣,因此,對於該部分,陰暗係被作保持。故 而’在修正攝像資料D3中,被形成有傷痕之部分的明亮 度與周I圍的明亮度之間的差異係變小。 因此,若是取得中心線P之圖案14,則如圖1 4 ( b ) 中所示一般,較灰階準位之平均値hi更低之場所,係成 -27- 201009971 爲僅有對應於切削屑之陰影部的區域80’就算是如圖14 (c)中所示一般而取得二値化圖案15’並從此二値化圖 案15而取得了邏輯圖案,邏輯準位被作爲「〇」而處理之 區域,亦係僅有1個,因此,邏輯圖案與基準圖案係成爲 不一致,並被判定爲並未被形成有露出區域11。在此種 實施形態中,係亦可從修正攝像資料D3來取得使針跡區 域13之中心線上的像素與灰階準位作了對應之圖案14, 並進行例如與第1實施形態相同之處理。進而’就算是在 β 由於電極墊片2與探針33之材質的組合,而造成在電極 墊片2處容易被附加有深的傷痕的情況時,亦能夠不使檢 査精確度降低地而進行露出區域11之檢測檢查。又,作 爲本發明之濾波處理,係亦可爲經由1〇點平均法等來對 於圖案14進行濾波處理之態樣。 [實施例] 針對爲了對本發明之效果作確認所進行了的實驗作說 © 明。首先,作爲第1實驗,使用第1實施形態之探針裝置 ,並針對圖15中所示之4個的電極墊片2 a〜2b而進行了 在針跡10處是否被形成有露出區域11之檢測。另外,在 此4個的電極墊片2a〜2b中,係使用了 :於電極墊片2a 、2b處,係被形成有露出區域11,而在電極墊片2c、2d 處,係未被形成有露出區域11者。 第1實驗之結果,係產生了圖16中所示之圖案 14a~ 14b。對應於電極墊片2a、2b之圖案 14a、14b,係 -28- 201009971 在像素之値爲高的區域之間,被形成有2個場所的像素値 爲低之區域,由於灰階準位之平均値hi係成爲約120左 右,因此,就算是取得二値化圖案,此區域亦係成爲像素 之値爲「0」的區域,而其他部分係成爲「1」的區域。因 此,邏輯圖案係與基準圖案相一致,而得知在墊片2a、 2b處係被形成有露出區域11。另一方面,在與電極墊片 2c、2d相對應之圖案14c、14d處,係僅被形成有1個場 • 所的像素値爲低之區域,就算是在二値化圖案中,亦係成 爲僅被形成有1個場所的像素之値爲「〇」的區域。因此 ,由於邏輯圖案係成爲與基準圖案不一致,故而得知在墊 片2c、2d處係並未被形成有露出區域11。藉由此,而能 夠確認到:在本實施形態之探針裝置中,係能夠經由針跡 檢查用程式46而自動地將露出區域11之有無檢測出來。 接著,作爲第2實驗,使用第1實施形態之探針裝置 ,並對晶圓W作攝像而取得攝像資料D1。而後,藉由金 ® 靥顯微鏡來對晶圓W作目視,並產生將露出區域11之像 素置換爲「〇」且將其以外之像素置換爲「1」而作了二値 化之畫像,亦即是產生人類藉由眼睛所作成的所謂之 Ground Truth畫像(以下,單純稱爲GT畫像),再從其 中而將例如49個的電極墊片2作爲樣本而選擇出來。而 後,將GT畫像之檢測結果,與相對於樣本之攝像資料 D1的針跡檢查用程式46之檢測結果作比較,而對於在針 跡檢查用程式46中的露出區域11之檢測精確度作了調査 。另外,在實驗中,在作爲樣本而使用了的49個的電極 -29- 201009971 墊片2中,係在28個的電極墊片2處被形成有約20/zm 直徑之露出區域11。於表1中,展示此第2實驗之結果 〇 在第2實驗中,如以下之表1中所示一般,在被形成 有露出區域11之28個的電極墊片2之中,針對27個, 係判定其被形成有露出區域11,僅有針對1個的電極墊 片2而判定其係並未被形成有露出區域11。另一方面, 針對並未被檢測出露出區域11之21個的電極墊片2,係 @ 全部將其判定爲並未被檢測出有露出區域11»亦即是, 針跡檢査程式之檢測精確度,其露出區域11之檢測率係 爲96.5%,未被形成有露出區域11之電極墊片2的檢測 率係成爲1〇〇%,而可得知其之檢測精確度係爲非常高。 另外,在針對無法檢測出露出區域11之電極墊片2作了 調查後,得知了其原因在於,在電極墊片2上係存在有傷 痕,而無法將針跡10之外接矩形13的形狀正確地作取得 之故。對於此問題,亦可設置第2實施形態之濾波處理部 ® 56,並經由在檢測出外接矩形13時進行濾波處理’而將 此問題解決。Next, the inspection of the stitch is explained. The following series of actions are performed in accordance with the stitch inspection program 46. As shown in the flow chart of FIG. 4, firstly, the G wafer W after the probe test is illuminated by the illumination means 28, and the upper camera 72 is used for imaging, and the wafer W is used. The image is acquired as the imaging data D1 (step S1). Next, the detection of the electrode pad 2 is performed from the image data D1. At the image data D1, since the amount of reflection of the light of the electrode pad 2 portion is large, the gray scale level becomes high overall. Then, for all the pixels of the image data D1, scan the screen and obtain the data corresponding to the coordinate position of the pixel and the gray scale level thereof, and store it in the RAM 42, and detect the gray scale level as In the same period of the high-level region, the coordinates of the end of the y-axis direction and the γ-axis direction of the region are detected, and the rectangle connecting the ends is detected. If a rectangle is detected, the matching pattern Τ1 of the electrode pad 2 which has been previously memorized is read and compared with the rectangle (step S2). Figure 5 is a schematic diagram showing such a series of processes. D1 is the camera material, and Τ1 is the matching model. Then, when the matching ratio between the matching pattern Τ1 and the detected rectangle becomes a predetermined value (for example, 90%) or more, it is determined that the rectangular region is the region of the electrode pad 2, and conversely, When the condition is less than or equal to 値, the detection is performed again (step S3). If the steps S2 and S3 are repeated, and the detection of the electrode pad 2 at the entire area of the image data D1 is completed, the electrode pad is used. The image of the sheet 2 is cut out, and the image is subjected to a certain processing, and the coordinate position of the outermost pixel on the Χ-Υ plane of the stitch 10 is obtained, and according to the coordinate position, the stitch 10 is obtained. The rectangular stitch region 13 which coincides with, for example, the outer peripheral side of the stitch 10®, and its position coordinate 'restore the data in the RAM 42 (step S4). Then, steps S3 and S4 are repeated, and the stitch area 13 of each of the electrode pads 2 and its coordinate position are detected, and the data is recorded in the RAM 42. Further, in the present embodiment, when the stitch region 13 is obtained as the above-described processing, the image of the electrode pad 2 is dimmed according to the threshold set in advance, and after the binarization The pixels are explored and processed. Further, for reference, the actual gray scale image of the electrode pad 2 at the time of the above processing is shown in Fig. 6. The detection of the -17-201009971 stitching area 13 is performed by the stitching area extracting portion 50. After all the stitching areas 13 are detected, first, as shown in Fig. 7 (^) From the image data D1, the region corresponding to the stitch region 13, for example, the stitch region 13 and the data of the outer circumference 40 pixels are cut out (step S5), and at the same time, the center line in the longitudinal direction of the stitch region 13 is obtained. P, and the position coordinates of the start point P1 and the end point P 2 of the center line P (step S6). Then, as shown in FIG. 7(b), the gray scale level and the position coordinate of the pixel on the center line P are obtained, and the gray scale level is taken as the horizontal axis and the number of pixels is taken as the vertical axis. Pattern (pattern data) 14 (step S7). Further, in the present embodiment, the start point P1 and the end point P2 are set at positions separated by a predetermined distance (for example, 30 pixels) from the intersection of the center line P and the circumscribed rectangle 1 3 toward the outside. After the pattern 14 is generated, the gray scale levels of the pixels of the pattern 14 are totaled, and the average 値hi of the gray @ order level displayed by the 1-point chain line in FIG. 7(b) is obtained. The average 値hi is used as a threshold to dim the pattern 14. Thereby, a general square wave-shaped binary pattern (secondary pattern data) 15 shown in Fig. 7(c) is obtained, and this information is memorized in the RAM 42 (step S8). Then, steps S 5 to S 8 are repeatedly performed, and the dichroic pattern 15 of each of all the stitch regions 13 is obtained, and the data is memorized in the RAM 42. Before making a detailed description of the subsequent actions, a brief description of its main purpose and purpose is given. Fig. 8 is a schematic view of the stitch 10 in which the exposed area 11 is formed at the stitch 10 - 201009971. On the area of the center line P of the stitch 10, the symbols da, db, dc, dd, and de are assigned for convenience. The db is the region where the chip is present in the electrode pad 2 ' dd is the region corresponding to the exposed region 11 ' da is the surface of the electrode pad 2 , and dc and de are the faces of the electrode pad 2 ( Aluminum part). In the bismuth pattern 15 of Fig. 7, the regions da~de are added to the corresponding regions. Here, if the probe 33 is a horizontal needle (a needle extending obliquely downward from the probe card 32), the system can be known in each of the electrode pads 2 of each wafer 1. It is cut in which direction it is directed. Moreover, even if the probe 33 is a vertical needle, since the direction in which the wafer platform 20 is slightly moved is known at the time of contact, it can be known that each of the electrode pads 2 is It is cut in which direction it is oriented. In other words, on the side of the control unit 4, it is possible to grasp the electrode pad 2 to be inspected by the stitch 10, and why the electrode pad 2 of the wafer is used. Therefore, the probe 3 can be known. 3 cutting direction. Therefore, when the gray scale level of the pixel is obtained along the center line p, it is possible to know on which side the starting point P 1 of the stitch start point is formed with respect to the stitch 10 . Then, when the exposed region 11 is formed at the stitch 1〇, 'If the binary pattern 15 is read from the starting point P1 toward the end point P2, the surface of the electrode pad 2 other than the stitch 10 is formed. It is bright, and then the portion of the shaded portion 12 of the aluminum chip which is the chip of the electrode pad 2 is darkened. Further, since the exposed area 11 is bright before and after, the logical "1" is assigned to all the bright areas, and the logical "〇" is assigned to the entire area of the dark -19-201009971. Logic pattern of 〇, 〇, 1, 〇, 1”. Therefore, by using this logical pattern as the determination reference pattern for the presence or absence of the exposed region 11, the logical pattern acquired at each electrode pad 2 is compared, and the presence or absence of the exposed region 11 can be determined. Further, if the range of occurrence of the exposed region 11 at the stitch 10 can be grasped empirically, the binary pattern 15 does not need to be always at the position to the end point P2. In this example, it is assumed that The binarized pattern 15 is obtained up to a midpoint in the longitudinal direction of the stitch 10 and further at a position P3 (hereinafter referred to as an intermediate point P3) of the end point @P2. According to this point of view, in particular, the following general steps are performed. After all the dimming patterns 15 have been obtained, for example, from the starting point P1, the pixels are checked one pixel at a time, and the counter for calculating the number of pixels is added, and the pixel is replaced. When the position is changed, the counter is stored in the memory area of the RAM 42, and the counter is initialized, and this is repeated, and the group of "1" in the binary pattern 15 and the group of "〇" are extracted. The length of each. Then, it is processed whether or not the length of each of the "1" or "〇" areas has not exceeded the threshold set in advance. In the present embodiment, in order to eliminate the influence of the flaw formed on the spacer 2 or the stitch 10 or the illumination means 28, etc., the threshold of the length is set in the area, and this is The limit is compared with the length of each area for confirmation processing. Then, for the area where the length exceeds the threshold, the logical 値 of the area is reversed, and for the area within the threshold, a logical "1" or a logical "〇" is assigned (step S9). In other words, as shown in FIG. 7(c), the logic "1" is logically "1" as shown in FIG. 7(c), and the logical "1" is assigned to the entire area of the area (the logical pixel "1" is allocated in the entire area of the white pixel group). The logical "〇" is assigned to the entire area of the logical "〇" side by side (the logical "〇" is assigned to the entire area of the black pixel group). Therefore, the binary pattern of Fig. 7(C) is expressed as a logical pattern "1, 0, 1, 〇, 1". In addition, in the threshold of the present embodiment, for example, if the length of the pixel on the cut center line P is L (pixel), the threshold of the area da and de is ❿ 0.05L-0.2L ( Pixel), the area db, dc is limited to 0.02L ~ 0.1L (pixel), and the area dd is 0.1L ~ 0.3L (pixel). By performing this processing, it is possible to eliminate the following state of affairs. For example, when the probe 33 is formed at the bottom shown in Fig. 9, the flaw 11a is formed, and by the shadow of the flaw 11a, as shown in Fig. 10, dd is generated to be very short. In the case of the pattern 15a, in the state where the above-described confirmation processing is not performed, the arrangement of the regions of the binary pattern 15a, that is, the logical pattern, is "1, 〇, 1, 〇, 1". Therefore, at the stitch 10 corresponding to the binary pattern 15a, it is erroneously recognized as being formed with the exposed region 11. On the other hand, if the above-described confirmation processing is performed on the binary pattern 15a, the length of the region dd is outside the range of the set threshold, and therefore, the logic level is set for this region. The inversion is combined with the regions dc and de, and the logical pattern is "1, 0, 1, 1, 1" without being misidentified. Comparing the logical pattern thus obtained with the reference logical pattern of the logical pattern when the exposed region 11 is formed at the stitching is compared with -21 to 201009971, and if it is identical, the corresponding stitch is determined. 1 The exposed area 11 is formed in the crucible, and if it is not uniform, it is judged that the exposed area 11 does not exist (not deep excavation) (step S10). Since the logical pattern corresponding to the stitch region 13 shown in FIG. 7(a) is "1, 〇, 1, 0, 1", at the corresponding stitch 10, it is determined that the pattern is formed. The area 11 is exposed, and the result of the determination is added to the pad 2 and stored in the RAM 42 (step S11). On the other hand, when the logic pattern does not become "1, 〇, 1, 〇, 1", it is determined that the exposed area 11 is not formed at the electrode pad 2, and the result is When the electrode pad 2 is attached and stored in the RAM 42 (step S12), the inspection result of the stitch 10 corresponding to each electrode pad 2 is read from the RAM 42, and the copper is formed to be included. The wafer 1 of the electrode pad 2 of the exposed region 11 is subjected to information such as deep excavation, and is attached to the wafer 1 and stored in the RAM 42. In the case of an example of the processing after the acquisition of such information, the electrode pad 2 judged to be deeply excavated by @ can also cause the operator to display the image of the electrode pad 2 on the display unit. And the operator confirms whether the judgment of the deep control is appropriate, and if it is judged to be the deep control, the wafer 1 including the electrode pad 2 is treated as a defective product. Moreover, needless to say, the confirmation of such an operator may not be performed. The result of the stitch inspection, for example, in association with the position of the wafer 1 on the wafer W, may be displayed on the display portion, and for example, at each wafer 1, color distribution corresponding to the result, and the like may be performed. -22-201009971 In the present embodiment, 'the process corresponding to steps S2 to S4 is performed by the stitch area extracting unit 5', respectively, and the gray scale level data acquiring unit 51 performs step S5~ In the project corresponding to step S7, the process corresponding to step S8 is performed by the binary processing unit 52, and the project corresponding to steps S9 to S12 is performed by the deep excavation determining unit 53. In the probe device of the present embodiment described above, when the stitch Φ 10 is detected, the image data D1 of the electrode pad 2 and the wafer W around the electrode pad 2 are obtained, and the position and stitch of the stitch 10 are obtained. At the same time, the region 13 is obtained with the center line P in the longitudinal direction of the stitch region 13, and a pattern 14 is formed in which the position of the pixel on the center line P corresponds to the gray scale level of the pixel. Then, the gray pattern 14 is used to obtain a logic pattern via the binary pattern 15, and the logic pattern is compared with the pattern 14 taken in response to the gray scale level when the exposed area 11 is present. Thereby, the presence or absence of the exposed area 11 of the stitch 10 is determined. Therefore, the deep excavation of the spacer 2 caused by the probe 33 (the state that has been excavated to the base layer 6) can be automatically and accurately detected with high accuracy, and the burden on the operator can also be Greatly reduced. Further, since it is possible to perform the inspection of the stitch 1 in the probe device, it is not necessary to perform the work of transporting the wafer W into the work area of the metal microscope by the operator as in the prior art. It is possible to quickly grasp the abnormality of the probe or the abnormality of the overdrive. In addition, the present invention obtains a pattern in which the gray-scale level of the pixel -23-201009971 on the central axis corresponds to the coordinate position while obtaining the coordinate of the central axis in the longitudinal direction of the stitch region. And the shape of the pattern is used to judge whether or not the exposed area is formed at the stitching. Therefore, the material of the electrode pad and the material of the base layer are not limited to copper or aluminum, respectively. It is only necessary to change the criterion for determining the shape of the pattern in accordance with each material used. Here, the stitch detecting device of the present invention is not limited to being incorporated in the probe device, but may be configured as a stand alone. Further, the line for obtaining the gray scale pattern is not limited to the center line of the stitch 10, and the reference is deviated from the center as long as it is a line which can obtain the effect of the embodiment, that is, as long as A line extending in the longitudinal direction at the center of the stitching area in the width direction may be used. In the present embodiment, the pattern 14' corresponding to the gray level is obtained from the starting point 1 from the center point P to the intermediate point 3, and the exposed area 11 is inspected. In the embodiment of the present invention, when the exposed area U cannot be detected in the pattern 14, the pixel ® is extracted from the end point 2 to the end point P3, and a pattern is generated and the pattern is generated. The re-detection of the exposed region 11 is performed on the basis of the reference. If the exposure region n is formed on the end point P2 side, the exposed region 11 can be detected. Needless to say, the pattern 14 can be formed for all the pixels on the center line P, and the determination can be made. Further, in the present embodiment, the pattern 14 corresponding to the center line P of the stitch region 13 is generated from the image data D1, and as an embodiment of the present invention, the image data D1 may be previously The set -24 - 201009971 is used to perform the second rounding, and the pixel of the center line P1i of the stitch 13 is obtained from the binary data, and the binary pattern ι5 is obtained, and it is determined. In addition, it is confirmed that the enthalpy system of the region of the binary pattern 15 is "1, 〇, 1, 〇, 丨", and the exposed region η is determined, but the present invention is The actual state can also be confirmed by the fact that the arrangement of the regions db and dc shown in Fig. 7 (c) is "〇, 1, 〇", and the occurrence of the exposed region 11 is determined. . Further, as in the above-described general example, although the cutting direction of 10 is grasped for each of the electrode pads 2, it is also possible to obtain a gray scale pattern without grasping the square. It is confirmed whether or not "0, 1, 0" is included in the logic finally obtained. In the present embodiment, as the illumination means 28, the field of view is illuminated and the wafer W is illuminated. As an embodiment of the present invention, in order to reduce the influence of shadows or scratches on the W on the image data D1, the imaging material D1 may be combined with a bright field illumination to form an illumination means. Further, in the present embodiment, as the stitch region, the rectangular region 13 corresponding to the stitch 10 is detected. However, as an embodiment of the present invention, the region may correspond to the stitch 10. Oval shape. Further, in the present embodiment, when the wafer w is imaged, it is taken by the upper camera 72 for determining the contact position of the electrode pad and the probe 33. However, as an embodiment of the present invention, For example, a dedicated camera unit for detecting stitches may be additionally provided outside the device, and the rows formed by the regions are shaped and dd shaped, and the stitches are patterned in the stitches, but the wafers are in the middle of the stitches. Trace stitching implements the image of the film 2, and the mounting portion is tightly pressed -25- 201009971. After the probe test, the wafer W is photographed and stitch inspection is performed. [Second Embodiment] A second embodiment of the present invention will be described with reference to Figs. 11 and 14 . The probe device according to the second embodiment shown in Fig. 11 is provided with a filter processing unit 54 which is a means for performing the filtering process of the present invention in the stitch inspection program 46. In the process of step S5 of the flowchart shown in FIG. 12, the filter processing unit 54 performs a filtering process for making the boundary line between the dark portion and the bright portion of the image data D1 unclear with respect to the image data D1. The image data D1 is converted into the corrected image data D3. Then, in the present embodiment, the pattern 14 is generated from the corrected imaging material D3. In addition, in the flowchart shown in FIG. 12, in steps S1 to S4, the same processing as steps S1 to S4 of the first embodiment is performed, and in steps S6 to S13, the first embodiment is performed. The processing of steps S5 to S12 is the same. In the probe device, the filter processing unit 54 is provided, and the action described in the following Figs. 13 and 14 can be obtained. As shown in Fig. 13 (a), when there is no exposed area at the stitching and only a flaw is formed, if the image data D1 is obtained from the image data D1, as in the above, When the pattern 14 is obtained in the ground, the pattern 14 as shown in Fig. 13(b) is obtained. At this pattern 14, due to the influence of the shadow of the flaw, an area having a lower average 値hi of the gray level of the three places, that is, a shadow corresponding to the chip of the electrode pad 2 is formed. The region 81 and the region corresponding to the scratch of the stitch 82, 83, -26- 201009971 Therefore, if the binary pattern 15 is obtained from the pattern 14 and the logic pattern is obtained from the binary pattern 15, there is logic The pattern is consistent with the reference pattern. On the other hand, when the direction in which the scar is elongated is the same as the center line P, since the coincidence distance between the shadow of the flaw and the center line P becomes long, the length of the region 82 corresponding to the flaw falls to the threshold. In the case of the ninth embodiment, even if the confirmation processing of the first embodiment is performed, the logic pattern is also matched with the reference pattern, and the influence of the flaw Φ cannot be completely removed, and it is erroneously determined that there is an exposed area. . On the other hand, in the present embodiment, even in the case of the image data D1 of the stitches as shown in Fig. 13, the influence of the flaw can be removed, and it is determined that there is no exposed area. In the present embodiment, as shown in FIG. 14(a), the image data D1 is converted into the corrected image data D3 via the filter processing unit 54. The corrected imaging data D3 is unclear because the boundary line between the dark portion and the bright portion of the shadow of the narrow flaw is unclear, and therefore, the dark pixel of the shadow is interlaced with the bright image. The part of the shadow is brightened by the whole, and on the contrary, the bright part is darkened. On the other hand, in the area where the area of the dark pixels such as the shadow portion or the exposed area of the chip is wide, even if the boundary line between the bright portion and the dark portion is made unclear, it is also due to the dark portion. The width is wide, so for this part, the darkness is maintained. Therefore, in the corrected imaging data D3, the difference between the brightness of the portion where the flaw is formed and the brightness of the circumference I is small. Therefore, if the pattern 14 of the center line P is obtained, as shown in FIG. 14(b), the place where the average 値hi of the gray level is lower is -27-201009971, which corresponds to only the cutting. The region 80' of the shaded portion of the shavings is obtained as shown in Fig. 14(c), and the logical pattern is obtained from the dimorphized pattern 15, and the logical level is regarded as "〇". There is only one area to be processed, and therefore, the logical pattern and the reference pattern are inconsistent, and it is determined that the exposed area 11 is not formed. In the above-described embodiment, the pattern 14 corresponding to the pixel on the center line of the stitch region 13 and the gray scale level can be obtained from the corrected image data D3, and the same processing as in the first embodiment can be performed. . Furthermore, even when β is easily attached to the electrode pad 2 due to the combination of the material of the electrode pad 2 and the probe 33, it is possible to perform the inspection without reducing the accuracy of the inspection. The inspection of the exposed area 11 is checked. Further, as the filtering processing of the present invention, the pattern 14 may be subjected to filtering processing via a one-point averaging method or the like. [Examples] Experiments conducted in order to confirm the effects of the present invention © Ming. First, as a first experiment, the probe device of the first embodiment was used, and whether or not the exposed region 11 was formed at the stitch 10 was performed for the four electrode pads 2a to 2b shown in FIG. Detection. Further, in the four electrode pads 2a to 2b, the exposed regions 11 are formed at the electrode pads 2a and 2b, and are not formed at the electrode pads 2c and 2d. There are exposed areas 11 . As a result of the first experiment, the patterns 14a to 14b shown in Fig. 16 were produced. Corresponding to the pattern 14a, 14b of the electrode pads 2a, 2b, between -28-201009971, between the areas where the pixels are high, the pixels 2 where the two places are formed are low, due to the gray level Since the average 値hi is about 120, even if a binary pattern is obtained, this area is a region where the pixel is "0", and the other portion is a region of "1". Therefore, the logic pattern coincides with the reference pattern, and it is known that the exposed regions 11 are formed at the spacers 2a, 2b. On the other hand, in the patterns 14c and 14d corresponding to the electrode pads 2c and 2d, only the area where the pixel 値 of one field is formed is low, even in the binary pattern, It is an area in which only pixels of one place are formed as "〇". Therefore, since the logic pattern does not coincide with the reference pattern, it is known that the exposed regions 11 are not formed at the pads 2c and 2d. As a result, it can be confirmed that in the probe device of the present embodiment, the presence or absence of the exposed region 11 can be automatically detected via the stitch inspection program 46. Next, as a second experiment, the probe device of the first embodiment was used, and the wafer W was imaged to obtain image data D1. Then, the wafer W is visually observed by a gold® 靥 microscope, and an image in which the pixels of the exposed region 11 are replaced with “〇” and the pixels other than the pixels are replaced by “1” is also obtained. That is, a so-called Ground Truth image (hereinafter, simply referred to as a GT image) made by a human eye is produced, and for example, 49 electrode pads 2 are selected as samples. Then, the detection result of the GT image is compared with the detection result of the stitch inspection program 46 with respect to the image data D1 of the sample, and the detection accuracy of the exposed region 11 in the stitch inspection program 46 is made. survey. Further, in the experiment, in the 49 electrodes -29-201009971 spacer 2 used as a sample, the exposed regions 11 having a diameter of about 20/zm were formed at the 28 electrode pads 2. In Table 1, the results of this second experiment are shown. In the second experiment, as shown in Table 1 below, among the 28 electrode pads 2 in which the exposed regions 11 are formed, 27 are used. It is determined that the exposed region 11 is formed, and it is determined that the exposed region 11 is not formed only for one of the electrode pads 2. On the other hand, for the electrode pads 2 in which 21 of the exposed regions 11 are not detected, it is determined that all of the electrode pads 2 are not detected to have the exposed regions 11», that is, the stitch inspection program is accurately detected. The detection rate of the exposed region 11 was 96.5%, and the detection rate of the electrode pad 2 not formed with the exposed region 11 was 1%, and the detection accuracy was found to be very high. Further, after investigating the electrode pad 2 in which the exposed region 11 could not be detected, it was found that the reason was that the electrode pad 2 had a flaw, and the stitch 10 could not be connected to the shape of the rectangle 13. Make it correctly. In order to solve this problem, the filter processing unit ® 56 of the second embodiment can be provided, and the problem can be solved by performing filtering processing ' when the circumscribed rectangle 13 is detected.

檢測出 露出部 未檢測出 露出部 檢測率 (%) 誤認率 (%) 有露出部 27 1 96.5 3.5 無露出部 0 2 1 1 00 0.0 -30- 201009971 【圖式簡單說明】 [圖1]本發明之實施形態之探針裝置的構成圖。 [圖2]本實施形態之晶圓W的平面圖。 [圖3]本實施形態之晶圓W的槪略剖面圖。 [圖4]對本實施形態之針跡檢查裝置的檢測處理程序 作說明之流程圖。 [圖5]對本實施形態之電極墊片的針跡檢測作說明之 • 說明圖。 [圖6]本實施形態之電極墊片的灰階畫像。 [圖7]針對露出區域之有無的判定作說明之第1說明 圖。 圖。 圖。 圖。 [圖8]針對露出區域之有無的判定作說明之第2說明 [圖9]針對露出區域之有無的判定作說明之第3說明 [圖10]針對露出區域之有無的判定作說明之第4說明 [圖11]本發明之第2實施形態之探針裝置的構成圖。 [圖12]對第2實施形態之針跡檢查裝置的檢測處理程 序作說明之流程圖。 [圖13]第2實施形態之針跡檢查方法的第1說明圖。 [圖14]第2實施形態之針跡檢查方法的第2說明圖。 [圖15]用以對於本發明之第1實驗作說明的說明圖。 [圖16]用以對於本發明之第1實驗的結果作說明之說 201009971 明圖。 [圖17]用以對於在先前技術之針跡檢查裝置中的課題 作說明之第1說明圖。 [圖18]用以對於在先前技術之針跡檢查裝置中的課題 作說明之第2說明圖。 【主要元件符號說明】 1 :晶片 ⑩ 2 :電極墊片 4 :控制部 6 :基底層 I 0 :針跡 II :露出區域 1 2 :切削屑之陰影部 1 3 :針跡區域 14、14a、14b、14c、14d:圖案(圖案資料) 〇 1 5、1 5 a :二値化圖案(二値化圖案資料) 2 〇 ·晶圓平台 2 8 :照明手段 3 2 :探針卡 33 :探針 45:探針探查用程式 46 :針跡檢查用程式 50:針跡區域抽出部 32- 201009971 5 1 :灰階準位資料取得部 5 2 :二値化處理部 53 :深控掘判定部 54 :濾波處理部 72 :上攝像機(攝像手段 D1 :攝像資料 D2 :二値化資料 ❹ D3 :修正攝像資料 w :晶圓 參Detection of the detection portion of the exposed portion is not detected. (%) Error rate (%) Exposed portion 27 1 96.5 3.5 No exposed portion 0 2 1 1 00 0.0 -30- 201009971 [Simplified illustration] [Fig. 1] A configuration diagram of a probe device according to an embodiment of the present invention. Fig. 2 is a plan view showing a wafer W of the present embodiment. Fig. 3 is a schematic cross-sectional view showing a wafer W of the present embodiment. Fig. 4 is a flow chart for explaining a detection processing procedure of the stitch inspection device of the embodiment. Fig. 5 is an explanatory view for explaining the stitch detection of the electrode pad of the embodiment. Fig. 6 is a gray scale image of the electrode pad of the embodiment. Fig. 7 is a first explanatory diagram for explaining the determination of the presence or absence of an exposed area. Figure. Figure. Figure. [Fig. 8] A second description of the determination of the presence or absence of the exposed area. [Fig. 9] A third description for the determination of the presence or absence of the exposed area. Fig. 10 shows the fourth determination of the presence or absence of the exposed area. [Fig. 11] A configuration diagram of a probe device according to a second embodiment of the present invention. Fig. 12 is a flow chart for explaining a detection processing procedure of the stitch inspection device of the second embodiment. Fig. 13 is a first explanatory diagram of a stitch inspection method according to a second embodiment. Fig. 14 is a second explanatory diagram of the stitch inspection method of the second embodiment. Fig. 15 is an explanatory view for explaining a first experiment of the present invention. [Fig. 16] A description of the results of the first experiment of the present invention 201009971. Fig. 17 is a first explanatory diagram for explaining a problem in the stitch inspection device of the prior art. Fig. 18 is a second explanatory diagram for explaining a problem in the stitch inspection device of the prior art. [Description of main component symbols] 1 : Wafer 10 2 : Electrode spacer 4 : Control portion 6 : Base layer I 0 : Stitch II : Exposure region 1 2 : Shadow portion of the chip 1 3 : Stitch region 14, 14a, 14b, 14c, 14d: pattern (pattern data) 〇1 5,1 5 a : two-division pattern (two-dimensional pattern data) 2 〇·wafer platform 2 8: illumination means 3 2 : probe card 33: probe Needle 45: Probe probe program 46: Stitch inspection program 50: Stitch area extraction unit 32 - 201009971 5 1 : Gray scale level data acquisition unit 5 2 : Binary processing unit 53 : Deep control determination unit 54 : Filter processing unit 72 : Upper camera (imaging means D1 : imaging data D2 : binary data ❹ D3 : corrected imaging data w : wafer reference

Claims (1)

201009971 七、申請專利範圍: 1·一種針跡檢查裝置,係在使探針接觸被檢査基板上 之電極墊片並進行了電性測定後,對被形成在前述電極墊 片上之針跡作攝像,並對於電極墊片之基底層的露出之有 無作檢查的針跡檢查裝置, 其特徵爲,具備有: 對電極墊片作攝像之攝像手段;和 從藉由此攝像手段所得到之畫像資料來將針跡區域之 ® 畫像資料抽出之手段;和 對於藉由此手段所得到之針跡區域的畫像資料,而取 得將在針跡區域之寬幅方向的中央位置處而朝向該當針跡 區域之長度方向延伸之線上的像素之位置與像素之灰階準 位作了對應的灰階圖案之手段;和 根據藉由此手段所得到之灰階圖案、和因應於當基底 層從針跡露出時之前述灰階圖案所決定了的基準圖案,來 判定基底層是否露出之判定手段。 @ 2.如申請專利範圍第1項所記載之針跡檢查裝置’其 中,係具備有對於前述灰階準位圖案而進行用以使峰値鈍 化的濾波處理之手段。 3 .如申請專利範圍第1項或第2項所記載之針跡檢査 裝置,其中,係具備有: 將前述灰階準位圖案,藉由對應於該當灰階準位圖案 之臨限値或是預先所制訂了的臨限値來進行二値化’並作 成由灰階準位較臨限値而更低之低準位區域與灰階準位較 -34- 201009971 臨限値而更高之高準位區域所成的二値化圖案之手段, 前述判定手段,係將以「低準位區域」、「高準位區 域」、「低準位區域」 之順序而並排之圖案作爲基準圖 案’當灰階準位圖案係包含有此基準圖案時,則判定基底 層係爲露出。 4. 如申請專利範圍第3項所記載之針跡檢查裝置,其 中,係具備有: 在前述二値化圖案中之各低準位區域全體處,分配邏 輯「1」以及邏輯「〇」之其中一方,並在各高準位區域全 體處,分配邏輯「1」以及邏輯「0」之另外一方,而將前 述二値化圖案變換爲由邏輯「1」以及邏輯「〇」之組合所 成的邏輯圖案之手段, 前述邏輯圖案,係爲由邏輯「1」以及邏輯「0」的組 合所成之邏輯圖案, 前述判定手段,係對兩者之邏輯圖案作比較,而判定 ® 基底層是否露出。 5. 如申請專利範圍第3項或第4項所記載之針跡檢査 裝置’其中,對應於前述灰階準位圖案之臨限値,係爲該 當灰階準位圖案之灰階準位的平均値。 6. 如申請專利範圍第3項乃至第5項中之任一項所記 載之針跡檢查裝置,其中,當在前述灰階準位圖案中,存 在有2處之灰階準位爲較預先所設定了的臨限値更低之低 準位區域的情況時,則當較接近於切削開始位置之低準位 區域的長度爲預先所設定了的長度以下時,將其作爲高準 -35- 201009971 位區域來處理。 7. —種探針裝置,係爲將基板載置於探針卡與載置台 上,並使探針卡之探針與基板上之晶片的電極墊片相接觸 ,而進行晶片之電性測定的探針裝置,其特徵爲: 具備有如申請專利範圍第1項乃至第6項中之任一項 所記載之針跡檢查裝置。 8. —種針跡檢查方法,係在使探針接觸被檢查基板上 之電極墊片並進行了電性測定後,對被形成在前述電極墊 0 片上之針跡作攝像,並對於電極墊片之基底層的露出之有 無作檢査的針跡檢查方法, 其特徵爲,包含有: 藉由攝像手段而對電極墊片作攝像之工程;和 從藉由此攝像手段所得到之畫像資料來將針跡區域之 畫像資料抽出之工程;和 對於所得到之針跡區域的畫像資料,取得將在針跡區 域之寬幅方向的中央位置處而朝向該當針跡區域之長度方 @ 向延伸之線上的像素之位置與像素之灰階準位作了對應的 灰階圖案之工程;和 根據所得到之灰階圖案、和因應於當基底層從針跡露 出時的前述灰階圖案所決定了的基準圖案,來判定基底層 是否露出之工程。 9. 如申請專利範圍第1項所記載之針跡檢查方法,其 中,係包含有對於前述灰階準位圖案而進行用以使峰値鈍 化的濾波處理之手段。 -36- 201009971 10.如申請專利範圍第8項或第9項所記載之針跡檢 査方法,其中,係包含有: 將前述灰階準位圖案,藉由對應於該當灰階準位圖案 之臨限値或是預先所制訂了的臨限値來進行二値化,並作 成由灰階準位較臨限値而更低之低準位區域與灰階準位較 臨限値而更高之高準位區所域成的二値化圖案之工程;和 藉由前述判定手段,而將以「低準位區域」、「高準 • 位區域」、「低準位區域」 之順序而並排之圖案作爲基 準圖案,當灰階準位圖案係包含有此基準圖案時,則判定 基底層係爲露出之工程。 1 1.如申請專利範圍第1 0項所記載之針跡檢査方法, 其中,係包含有: 在前述二値化圖案中之各低準位區域全體處,分配邏 輯「1」以及邏輯「0」之其中一方,同時,在各高準位區 域全體處,分配邏輯「1」以及邏輯「0」之另外一方,將 ® 前述二値化圖案變換爲由邏輯「1」以及邏輯「〇」之組合 所成的邏輯圖案之工程, 前述邏輯圖案,係爲由邏輯「1」以及邏輯「0」的組 合所成之邏輯圖案, 前述判定手段,係對兩者之邏輯圖案作比較,而判定 基底層是否露出。 12.如申請專利範圍第10項或第11項所記載之針跡 檢査方法,其中,對應於前述灰階準位圖案之臨限値,係 爲該當灰階準位圖案之灰階準位的平均値。 -37- 201009971 13. 如申請專利範圍第10項乃至第12項中之任一項 所記載之針跡檢査方法,其中,當在前述灰階準位圖案中 ,存在有2處之灰階準位爲較預先所設定了的臨限値更低 之低準位區域的情況時,則當較接近於切削開始位置之低 準位區域的長度爲預先所設定了的長度以下時,將其作爲 高準位區域來處理。 14. 一種記憶媒體,係爲儲存有在針跡檢査裝置中所 被使用之電腦程式的記憶媒體,該針跡檢查裝置,係在使 @ 探針接觸被檢査基板上之電極墊片並進行了電性測定後, 對被形成在前述電極墊片上之針跡作攝像,並對於電極墊 片之基底層的露出之有無作檢査, 該記憶媒體,其特徵爲: 前述電腦程式,係以實行如申請專利範圍第8項乃至 第13項中之任一項所記載之針跡檢查方法的方式,而被 構成步驟群。 -38-201009971 VII. Patent application scope: 1. A stitch inspection device is provided after the probe is placed on the electrode pad on the substrate to be inspected and electrically measured, and the stitch formed on the electrode pad is made. A stitch inspection device for imaging and detecting whether or not the base layer of the electrode pad is exposed is characterized by: an image pickup means for imaging the electrode pad; and an image obtained by the image pickup means The means for extracting the image data of the stitching area; and for the image data of the stitching area obtained by this means, obtaining the center position in the wide direction of the stitching area toward the stitching a method of grayscale pattern corresponding to the position of the pixel on the line extending in the length direction of the region and the grayscale level of the pixel; and according to the grayscale pattern obtained by the means, and corresponding to the substrate layer from the stitch The reference pattern determined by the gray scale pattern at the time of exposure is used to determine whether or not the underlayer is exposed. @ 2. The stitch inspection device according to the first aspect of the invention, wherein the stitching inspection device for the gray scale alignment pattern is provided for filtering the peaks. 3. The stitch inspection device according to the first or second aspect of the patent application, wherein the grayscale alignment pattern is provided by: the threshold corresponding to the grayscale alignment pattern or It is a pre-determined threshold to carry out the second rounding and is made lower by the gray level and lower than the low level and the gray level is higher than -34- 201009971 The means for determining the binary pattern formed by the high-level region is determined by using a pattern of "low-level region", "high-level region", and "low-level region" in the order of the two-dimensional pattern. Pattern 'When the gray scale alignment pattern includes this reference pattern, it is determined that the base layer is exposed. 4. The stitch inspection device according to the third aspect of the invention, wherein: the logic "1" and the logical "〇" are assigned to all of the low-level areas in the binary pattern. One of them assigns the other one of the logical "1" and the logical "0" to the entire high-level area, and converts the binary pattern into a combination of logical "1" and logical "〇". The logic pattern is a logic pattern formed by a combination of logic "1" and logic "0". The determination means compares the logical patterns of the two to determine whether the base layer is Exposed. 5. The stitch inspection device described in claim 3 or 4, wherein the threshold corresponding to the gray scale pattern is the gray scale level of the gray scale pattern Average 値. 6. The stitch inspection device according to any one of claims 3 to 5, wherein, in the gray scale alignment pattern, there are two gray scale levels which are more advanced. In the case where the threshold is set to a lower low level region, when the length of the low level region closer to the cutting start position is equal to or less than the previously set length, it is regarded as Micro Motion-35. - 201009971 bit area to handle. 7. A probe device for placing a substrate on a probe card and a mounting table, and contacting the probe of the probe card with an electrode pad of the wafer on the substrate to perform electrical measurement of the wafer The probe device is characterized in that the stitch inspection device according to any one of the first to sixth aspects of the invention is provided. 8. A stitch inspection method for photographing a stitch formed on the electrode pad 0 after the probe is brought into contact with the electrode pad on the substrate to be inspected, and for the electrode pad A method for inspecting the presence or absence of inspection of the base layer of the sheet, characterized in that it comprises: a project of imaging the electrode pad by means of an image pickup means; and the image data obtained by the image pickup means a process of extracting the image data of the stitching area; and obtaining the image data of the obtained stitching area at a central position in the width direction of the stitching area and extending toward the length of the stitching area @ The position of the pixel on the line corresponds to the gray scale pattern of the pixel; and according to the obtained gray scale pattern, and according to the gray scale pattern when the base layer is exposed from the stitch The reference pattern is used to determine whether the base layer is exposed or not. 9. The stitch inspection method according to the first aspect of the invention, wherein the method for filtering the peak 値 is performed on the gray scale pattern. -36- 201009971 10. The stitch inspection method according to Item 8 or Item 9 of the patent application, wherein the method includes: placing the gray scale level pattern by corresponding to the gray scale level pattern The threshold or the pre-determined threshold is used for the second round, and the low-level and gray-level levels are higher and lower than the gray level. The construction of the two-dimensional pattern formed by the high-level area; and by the above-mentioned judging means, the order of "low-level area", "high-order area", and "low-level area" will be The side-by-side pattern is used as a reference pattern, and when the gray-scale alignment pattern includes the reference pattern, it is determined that the base layer is an exposed project. 1 1. The stitch inspection method according to claim 10, wherein the method includes: assigning a logic "1" and a logic "0" to all of the low-level regions in the binary pattern. At the same time, the other one of the high-level areas is assigned the other one of the logical "1" and the logical "0", and the above-mentioned binary pattern is converted into the logical "1" and the logical "〇". In the engineering of the logical pattern formed by the combination, the logical pattern is a logical pattern formed by a combination of a logical "1" and a logical "0", and the determining means compares the logical patterns of the two to determine the base. Whether the layer is exposed. 12. The stitch inspection method according to claim 10, wherein the threshold corresponding to the gray scale level pattern is a gray scale level of the gray scale level pattern. Average 値. -37-201009971 13. The stitch inspection method according to any one of the above-mentioned claims, wherein, in the gray scale level pattern, there are two gray scales When the bit is a lower-level region lower than the preset threshold ,, when the length of the low-level region closer to the cutting start position is equal to or less than the previously set length, High level area to handle. A memory medium which is a memory medium storing a computer program used in a stitch inspection device, wherein the stitch inspection device is in contact with an electrode pad on a substrate to be inspected. After the electrical measurement, the stitch formed on the electrode pad is imaged, and the presence or absence of the exposure of the base layer of the electrode pad is examined. The memory medium is characterized in that: the computer program is implemented. A method of forming a stitch inspection method according to any one of claims 8 to 13 is constituted as a step group. -38-
TW098117151A 2008-05-23 2009-05-22 A stitch check device, a probe device and a stitch check method, and a memory medium TWI483325B (en)

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