TW200832732A - Roll-to-roll electroplating for photovoltaic film manufacturing - Google Patents

Roll-to-roll electroplating for photovoltaic film manufacturing Download PDF

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TW200832732A
TW200832732A TW096139256A TW96139256A TW200832732A TW 200832732 A TW200832732 A TW 200832732A TW 096139256 A TW096139256 A TW 096139256A TW 96139256 A TW96139256 A TW 96139256A TW 200832732 A TW200832732 A TW 200832732A
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Taiwan
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layer
unit
cleaning
plating
continuous flexible
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TW096139256A
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Chinese (zh)
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Bulent Basol
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Solopower Inc
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/0256Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by the material
    • H01L31/0264Inorganic materials
    • H01L31/032Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312
    • H01L31/0322Inorganic materials including, apart from doping materials or other impurities, only compounds not provided for in groups H01L31/0272 - H01L31/0312 comprising only AIBIIICVI chalcopyrite compounds, e.g. Cu In Se2, Cu Ga Se2, Cu In Ga Se2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D17/00Constructional parts, or assemblies thereof, of cells for electrolytic coating
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D21/00Processes for servicing or operating cells for electrolytic coating
    • C25D21/12Process control or regulation
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/10Electroplating with more than one layer of the same or of different metals
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • C25D5/50After-treatment of electroplated surfaces by heat-treatment
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/06Wires; Strips; Foils
    • C25D7/0614Strips or foils
    • C25D7/0635In radial cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0392Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate
    • H01L31/03926Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate
    • H01L31/03928Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate comprising a flexible substrate including AIBIIICVI compound, e.g. CIS, CIGS deposited on metal or polymer foils
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y30/00Nanotechnology for materials or surface science, e.g. nanocomposites
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/541CuInSe2 material PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Abstract

A roll to roll system for forming an absorber structure for solar cells on a flexible foil as the flexible foil is advanced through units of the system and by unwrapping from a supply spool and wrapping around a take-up spool. Surface of the flexible foil is first conditioned in a conditioning unit to form an activated surface. A precursor stack including copper, gallium and indium layers is electroplated onto the activated surface by utilizing separate electroplating units for each layers. The precursor layer is reacted with at least one of Se and S in an annealing unit of the system.

Description

200832732 九、發明說明: 【發明所屬之技術領域】 本發明是關於一種用於輻射偵測器與光電應用之 IBIIIAVIA化合物半導體薄膜的薄膜製備方法與設備。 【先前技術】 太陽能電池是一種可將陽光直接轉化為電力的光電裝 置,最普遍的太陽能電池材料為具有單晶或多晶晶圓形式 的矽,然而,利用矽基礎之太陽能電池所產生電力之成本 高於由較傳統方式所產生之電力的成本,因此從1970年代 早期開始,便投入心力來降低陸地使用之太陽能電池的成 本。一種降低太陽能電池成本的方法為發展低成本之薄膜 成長技術,其可在大面積基板上沉積太陽能電池特性吸收 體材料’並利用局產率、低成本的方法來生產這些裝置。 IBIIIAVIA族化合物半導體包括部分週期表中第18族 (Cu、Ag、Au )、IIIA 族(B、Al、Ga、Ιη、τΐ )與 VIA 族(0、S、Se、Te、Po)的材料或元素,對於薄膜太陽能 電池結構而言,其係絕佳的吸收體材料;特別是,Cu、In、 Ga、Se與S之化合物(一般稱之為CIGS(S)或 Cu (In ’ G a) ( S, S e) 2 或 Cul n 1-X G ax (S y S e 1 .y ) k,其中 〇< j, 〇SySl’而k約為2)已經被應用於太陽能電池结構中, 且可產生接近20%的轉換效率,而含有π ιΑ族元素八!及 /或VIA族元素Te的吸收體亦呈現同樣效果;因此,整體 而言’在太陽能電池應用上’含有i)IB族中的 5 200832732 族中In、Ga與A1至少其中之一以及iii)VIA族中S、Se 與Te至少其中之一的化合物最受矚目。 第1圖說明了傳統IBIIIAVIA族化合物光電電池(例 如Cu(In,Ga,Al)(S,Se,Te)2薄膜太陽能電池)的結構。裝置 10係製造於一基板Η (例如:玻璃板、金屬板(鋁或不銹 鋼)、絕緣箱或網、或導電箔或網)上,包含 Cu(In’Ga,Al)(S,Se,Te)2家族其中一種材料的吸收體薄膜 12係成長於一傳導層13上,傳導層13係預先沉積在基板 11上並作為對該裝置之電接觸。包含M〇、Ta、W、Ti與 不銹鋼等之各種傳導層已使用於第!圖所示之太陽能電池 結構;如果基板本身是經適當選擇之傳導材料,則可不需 使用傳導層13,這是因為基板u可接著作用為對裝置之 歐姆接觸。在成長了吸收體薄膜12之後,於該吸收體薄膜 上形成一穿透層14 ’例如CdS、ZnO或CdS/ZnO堆疊。輕 射15經由穿透層14進入裝置,在穿透層14上也沉積有金 屬網(圖中未示)以降低裝置的有效串聯電阻。應注意, 若基板是透明的,則亦可反轉第丨圖所示之結構,在這樣 的例子中光線係從太陽能電池的基板侧進入裝置。 在使用第IBIIIAVIA族化合.物吸收體之薄膜太陽能電 池中,電池效率與第ΙΒ/ΠΙΑ族之莫耳比例的函數強2相 關。如果在組成中有多於一種第ΙΙΙΑ族材料,這些第ΠΐΑ 族元素的相對量或莫耳比例也會影響其性質。對於200832732 IX. Description of the Invention: [Technical Field] The present invention relates to a method and an apparatus for preparing a film of an IBIIIAVIA compound semiconductor film for use in a radiation detector and a photovoltaic application. [Prior Art] A solar cell is an optoelectronic device that can directly convert sunlight into electricity. The most common solar cell material is germanium in the form of single crystal or polycrystalline wafer. However, the power generated by the solar cell based on germanium is used. The cost is higher than the cost of electricity generated by more traditional methods, so since the early 1970s, efforts have been made to reduce the cost of solar cells used on land. One way to reduce the cost of solar cells is to develop low cost film growth techniques that deposit solar cell characteristic absorber materials on large area substrates and produce these devices using local yield, low cost methods. The IBIIIAVIA compound semiconductor includes materials of Group 18 (Cu, Ag, Au), Group IIIA (B, Al, Ga, Ι, τΐ) and VIA (0, S, Se, Te, Po) in the periodic table or Element, which is an excellent absorber material for thin film solar cell structures; in particular, compounds of Cu, In, Ga, Se and S (generally referred to as CIGS(S) or Cu (In 'G a)) (S, S e) 2 or Cul n 1-XG ax (S y S e 1 .y ) k, where 〇< j, 〇SySl' and k is about 2) has been applied to the solar cell structure, and It can produce nearly 20% conversion efficiency, but contains π Α Α elemental element eight! And/or the absorber of the Group VIA element Te also exhibits the same effect; therefore, overall, 'in solar cell applications' contains i) at least one of the Groups 5, 2008, 327, 32 in the Group IB, and at least one of In, Ga and A1 and iii) Among the VIA families, compounds of at least one of S, Se and Te are the most noticeable. Fig. 1 illustrates the structure of a conventional IBIIIAVIA compound photovoltaic cell (e.g., Cu(In, Ga, Al)(S, Se, Te) 2 thin film solar cell). The device 10 is fabricated on a substrate (for example, a glass plate, a metal plate (aluminum or stainless steel), an insulating box or mesh, or a conductive foil or mesh), and contains Cu (In'Ga, Al) (S, Se, Te). The absorber film 12 of one of the 2 families is grown on a conductive layer 13 which is previously deposited on the substrate 11 and serves as an electrical contact to the device. Various conductive layers including M〇, Ta, W, Ti, and stainless steel have been used in the first! The solar cell structure shown in the drawing; if the substrate itself is a suitably selected conductive material, the conductive layer 13 may not be used because the substrate u can be used as an ohmic contact to the device. After the absorber film 12 is grown, a penetrating layer 14' such as a CdS, ZnO or CdS/ZnO stack is formed on the absorber film. The light radiation 15 enters the device via the penetrating layer 14, and a metal mesh (not shown) is also deposited on the penetrating layer 14 to reduce the effective series resistance of the device. It should be noted that if the substrate is transparent, the structure shown in Figure 亦可 can also be reversed. In such an example, the light enters the device from the substrate side of the solar cell. In a thin film solar cell using the IBIIIAVIA compound absorber, the battery efficiency is related to a strong 2 function of the ΙΒ/ΠΙΑ molar ratio. If there is more than one steroidal material in the composition, the relative amount or molar ratio of these steroidal elements will also affect its properties. for

Cu(In,Ga)(S,Se)2吸收體層而言,舉例而言,裝置的效率即 為Cu/(In + Ga)的莫耳比例的函數;此外,電池的一歧 二夏要 200832732For the Cu(In,Ga)(S,Se)2 absorber layer, for example, the efficiency of the device is a function of the molar ratio of Cu/(In + Ga); in addition, the battery is different.

參數(例如其開電路電壓、短路電流以及填充因子)亦隨 第IIIA族元素的莫耳比例(即Ga/(Ga+in)莫耳比例 化。一般而言,為求裝置性能良好,Ga/(Ga+In)莫¥比例 皆保持在約為或以下;另一方面,當Ga/(Ga+;{)莫耳 比例增加時,吸收體層的光學能隙會增加,且太陽能電池 的開電路電壓亦因而增加,而短路電流一般則會降低。對 於薄膜>儿積程序而言,控制組成中第IB/ΠΙΑ族成分莫耳 比例以及第IIIA族成分的莫耳比例都是很重要的,應注意 雖然化學式常寫為Cu(In,Ga)(S,Se)2,但該化合物的精確化 學式應為Cu(In,Ga)(S,Se)k’其中k 一般是接近2,但並非 精確為2。為簡化起見,以下繼續使用k值為2 ;應注意在 化學式中,Cu(X,Y)是代表X與Y分別從(X== 且γ = 100% )至(Χ= 100%且Υ= 〇% )之所有化學組成,舉例 而言,Cu(In,Ga)表示從Culn至CuGa的所有組成,同樣的, Cu(In,Ga)(S,Se)2 表示 Ga/(Ga+In)莫耳比例從 〇 到 1 且 Se/(Se + S)莫耳比例從0到1之化合物的所肴族群。 第一種用於成長Cii(In,Ga)Se2層的技術係共蒸鍍方 式,其涉及自個別的蒸鐘舟(boat)蒸鐘Cu、In、Ga與 Se至一加熱基板上’而各成分的沉積速率係小心加以監視 及控制。 另一種用於成長太陽能電池之Cu(In,Ga)(S,Se)2類型 化合物薄膜的技術為兩段式程序,其首先在一基板上沉積 Cu(In,Ga)(S,Se)2材料之至少兩種成分,然後於高溫退火程 序中與S及/或Se反應;例如對於CuInSe2成長而言,Cu 7 200832732Parameters (such as its open circuit voltage, short circuit current, and fill factor) are also proportional to the molar ratio of Group IIIA elements (ie, Ga/(Ga+in) moles. In general, for device performance, Ga/ (Ga+In) Mo ¥ ratio is kept at about or below; on the other hand, when the Ga/(Ga+;{) molar ratio increases, the optical energy gap of the absorber layer increases, and the open circuit voltage of the solar cell Therefore, the short-circuit current is generally reduced. For the film > integral program, it is important to control the composition of the IB/ΠΙΑ group molar ratio and the molar ratio of the IIIA component. Note that although the chemical formula is often written as Cu(In,Ga)(S,Se)2, the exact chemical formula of the compound should be Cu(In,Ga)(S,Se)k' where k is generally close to 2, but not precise. For the sake of simplicity, the following continues to use a k value of 2; it should be noted that in the chemical formula, Cu(X, Y) represents X and Y respectively from (X== and γ = 100%) to (Χ=100 All chemical compositions of % and Υ = 〇%), for example, Cu(In, Ga) represents all compositions from Culn to CuGa, and similarly, Cu(In, Ga (S, Se) 2 represents a group of foods in which the Ga/(Ga+In) molar ratio is from 〇 to 1 and the Se/(Se + S) molar ratio is from 0 to 1. The first type is used for growth. The technology of the Cii (In, Ga) Se2 layer is a co-evaporation method involving the evaporation of Cu, In, Ga and Se from a single steaming boat to a heating substrate. The deposition rate of each component is careful. Monitoring and control. Another technique for growing Cu(In,Ga)(S,Se)2 type compound thin films for solar cells is a two-stage process, which first deposits Cu(In,Ga) on a substrate ( At least two components of the S, Se) 2 material are then reacted with S and/or Se in a high temperature annealing procedure; for example, for CuInSe2 growth, Cu 7 200832732

與In之薄次層係首先沉積一基板上以形成一前驅物層,此 一堆疊前驅物層接著在較高溫度與Se反應,如果反應氣氛 含碌,則可成長出CuIn(S,Se)2層。在前驅物層中添加Ga,The thin sublayer with In is first deposited on a substrate to form a precursor layer, which then reacts with Se at a higher temperature, and if the reaction atmosphere is rich, CuIn(S, Se) can be grown. 2 layer. Add Ga to the precursor layer,

亦即使用 Cu/In/Ga 堆疊膜之前驅物,即可成長 Cu(Iii,Ga)(S,Se)2吸收體。其他的先前技術則包括了沉積 Cu-Se/In-Se、Cu-Se/Ga-Se 或 Cu-Se/In-Se/Ga-Se 堆疊並使 其反應以形成化合物。也可以使用混合之前驅物堆疊包括 化合物與元素次層,例如Cu/In-Se堆疊或Cu/In_Se/Ga-Se 堆疊,其中In-Se與Ga-Se分別代表In與Ga的硒化物。 在先前技術中也已使用濺鍍與蒸鍍技術來沉積含有金 屬別驅物堆愛中苐IB族與第ΙΠΑ族成分之次層;舉例而 言,在CuInSe2成長的例子中,在基板上依次自ClI與in 靶材濺鍍沉積Cu與In次層,然後以較高的溫度、在含以 氣體的存在下加熱所得之堆疊前驅物膜,如美國專利us 4,798,660中所述。近年來,美國專利us 6,〇48,442揭露 了一種包括電鍍沉積一堆疊之前驅物膜以於一金屬反向電 極上形成一 Cu-Ga/In堆疊的方法,該前驅物膜含有Cu_Ga 合金次層以及In次層,然後使此一前驅物堆疊膜與及 s其中之一反應,以形成化合物吸收體層。美國專利us 6,〇92,669說明了以濺鍍為基礎用於產生這種吸收體層的 設備與方法。 美國專利US 4,581,108中說明了一種方法,其使用電 >儿積方式來製備金屬前驅物。在此方法中,首先在其板上 電沉積一 Cu次層,接著電沉積一 ϊη次層,並於含有以 s 200832732 之反應氣氛中加熱所沉積之Cu/In前驅物堆疊《這個技術 需要非常高的平板電流密度,其導致不均勻性以及對基板 接合之問題,其如參考文獻(Kapur等人之“Low cost Thin Film Chalcopyrite Solar Cells9% Proceedings of 18th IEEE Photovoltaic Specialists Conf·,1985,p. 1429; “Low cost Methods for the Production of Semiconductor Films for CIS/CdS Solar Cells’’,Solar Cells,vol. 21,p. 65, 1987 )That is, a Cu (Iii, Ga) (S, Se) 2 absorber can be grown by using a Cu/In/Ga stacked film precursor. Other prior art involves depositing a Cu-Se/In-Se, Cu-Se/Ga-Se or Cu-Se/In-Se/Ga-Se stack and reacting it to form a compound. It is also possible to use a mixed precursor stack comprising a compound and an elemental sublayer, such as a Cu/In-Se stack or a Cu/In_Se/Ga-Se stack, wherein In-Se and Ga-Se represent selenides of In and Ga, respectively. Sputtering and evaporation techniques have also been used in the prior art to deposit sublayers containing bismuth IB and bismuth components of the metal clumps; for example, in the case of CuInSe2 growth, sequentially on the substrate The Cu and In sublayers are deposited from the ClI and in targets by sputtering, and then the resulting stacked precursor film is heated at a higher temperature in the presence of a gas, as described in U.S. Patent 4,798,660. In recent years, U.S. Patent No. 6,48,442 discloses a method of electroplating a stacked precursor film to form a Cu-Ga/In stack on a metal counter electrode, the precursor film comprising a Cu_Ga alloy sublayer. And the In sublayer, and then reacting the precursor stack film with one of the s to form a compound absorber layer. U.S. Patent No. 6,92,669 describes an apparatus and method for producing such an absorber layer based on sputtering. A method is described in U.S. Patent No. 4,581,108, which is incorporated herein by reference. In this method, a Cu sublayer is first electrodeposited on the plate, followed by electrodeposition of a ϊn sublayer, and heating of the deposited Cu/In precursor stack in a reaction atmosphere containing s 200832732. High plate current density, which causes non-uniformities and problems with substrate bonding, as described in the reference (Kapur et al., "Low cost Thin Film Chalcopyrite Solar Cells 9% Proceedings of 18th IEEE Photovoltaic Specialists Conf., 1985, p. 1429". "Low cost Methods for the Production of Semiconductor Films for CIS/CdS Solar Cells'', Solar Cells, vol. 21, p. 65, 1987)

所說明者。 以上簡要回顧說明了目前亟需發展高產量、低成本的 技術來製造薄膜太陽能電池與模組。 【發明内容】 本發明提供了 一種用於形成太陽能電池吸收體之^繞 式系統,其在可撓箔前進通過該捲繞式系統的處理單元時^ 連續處理可撓箔的表面。 本發明之一構想在於提供一種用於形成太陽能1池< 吸收體結構的系統,其於連續可撓工件前進通遇金 w ,糸統之單 元時在連續可撓工件的前表面上形成吸收體結播. —,該系統 包括一調理單元以調理該連續可撓工件的前表Λ %甸,以形成 活化表面部分。 該系統更包括一第一電鍍單元,用於形成—< t ^ 前驅物堆 疊之一第一層,其在該連續可撓工件前進通過兮链 ^ 、硪第一電鍍 單元時,藉由在該連續可撓工件之該等活化表而-、 吗那分上電 鍍一金屬而形成,其中該金屬係屬於週期表上篦 印ΐβ族與第 9 200832732 ΠΙΑ族其中之一。該系統之一第一清潔單元係用於清潔沉 積在該第一電鏡單元中的該第一層❽ 該系統更包括一第二電鍍單元,用於形成該前驅物堆 疊之一第二層,其在該連續可撓工件前進通過該第二電鍍 單元且該第一層係在該第一電鍍單元中被持續電鍍至該連 續可撓工件表面上之下一個活化表面部分時,藉由將另一 金屬電至該第一層上而形成,其中讓另一金屬屬於週期表 上第ΙΒ族與第ΠΙΑ族中之一,且該第_層與該第二層不 同。該系統的一第二清潔單元係用於清潔沉積在該第二電 鍍單元中的該第二層。 該系統更包括一第三電鍍單元,用於形成一第三層, 其在該連續寸撓工件前進通過該第一、第二與第三電錢單 元、而該第二層係在該第二電鍍單元中被持續電鍍至該第 一層(其被電鐘在該可撓工件表面的下一個活化部分)且該 第一層係在該第一第一電鍍單元中被持續電鍍在該可撓工 件表面之下一個活化部分時,藉由電鍍屬於第Ι]Β族與第 ΠΙΑ族其中之一的一金屬至該第二層上,以得該前驅物堆 疊。第三層與第一及第二層不同。該系統還包括一移動組 件,用於托持並線性移動該連續可撓工件通過該系統之單 元,其中該移動組件包括一饋送饋送捲軸與一拾取捲軸, 該饋送捲軸用以展開並提供該連續可撓工件之未處理部分 至該系統中,而該拾取捲轴係用以接收並纏繞已處理部分。 【實施方式】 10Described. The above brief review illustrates the current need to develop high-volume, low-cost technologies for the manufacture of thin-film solar cells and modules. SUMMARY OF THE INVENTION The present invention provides a winding system for forming a solar cell absorber that continuously treats the surface of the flexible foil as the flexible foil advances through the processing unit of the roll-up system. SUMMARY OF THE INVENTION One idea of the present invention is to provide a system for forming a solar cell 1 < absorber structure that forms an absorption on the front surface of a continuous flexible workpiece as the continuous flexible workpiece advances through the unit of the gold w, the system Body Sowing. The system includes a conditioning unit to condition the front surface of the continuous flexible workpiece to form an activated surface portion. The system further includes a first plating unit for forming a first layer of one of the < t ^ precursor stacks, wherein the continuous flexible workpiece advances through the 兮 chain and the first plating unit by The activation tables of the continuous flexible workpiece are formed by electroplating a metal, wherein the metal belongs to one of the ΐ ΐ 族 族 and the ninth 200832732 周期 family on the periodic table. a first cleaning unit of the system for cleaning the first layer deposited in the first electron microscope unit. The system further includes a second plating unit for forming a second layer of the precursor stack, As the continuous flexible workpiece advances through the second plating unit and the first layer is continuously plated in the first plating unit to the next active surface portion of the continuous flexible workpiece surface, by A metal is formed on the first layer, wherein the other metal belongs to one of the third and third groups of the periodic table, and the first layer is different from the second layer. A second cleaning unit of the system is for cleaning the second layer deposited in the second electroplating unit. The system further includes a third plating unit for forming a third layer that advances through the first, second, and third money units while the second layer is attached to the second layer Electroplating unit is continuously plated to the first layer (which is next to the active portion of the flexible workpiece surface by the electric clock) and the first layer is continuously plated in the first first plating unit at the flexible When the active portion is under the surface of the workpiece, the precursor is stacked by electroplating a metal belonging to one of the first and third groups to the second layer. The third layer is different from the first and second layers. The system also includes a moving assembly for holding and linearly moving the unit of the continuous flexible workpiece through the system, wherein the moving assembly includes a feed feed spool and a pick-up spool for unwinding and providing the continuous The unprocessed portion of the workpiece is flexibly threaded into the system, and the pick-up spool is used to receive and wind the processed portion. [Embodiment] 10

200832732 本發明提供了 一種低成本、高產量之兩段 來製造用於太陽能電池之CIGS ( S )類型吸收j 第2圖示意性說明了本發明之程序與工具 例;在此實施例中,係使用捲繞式處理技術, 工件22 (例如具有一可撓基板與一接觸層之可 上電沉積一第IB族材料(較佳為Cu )與一第 (較隹為In與Ga至少其中之一)。工具1 9具 軸20與一回復捲軸21,該可撓箔基質22係自‘ 輊由一系列的電鍍單元23而導向回復捲轴21 23包括至少一第IB族材料電鍍單元以及至少. 材料電鍍單元;在每個電鍍單元23之後,較佳 單元24A、24B。在各個電鍍程序之後,該等 濕電鍍表面,且因而避免電鍍單元23中電鍍電 液的交叉污染。舉例而言,在一電鍍單元中以 電塗佈該基質22的一區段後,該區段會通過-其中在該區段上之Cu鍍液的化學殘留物會被 該區段係移動至第ΙΠΑ族電鍍單元(例如Ga 中。應注意的是,在潤濕步驟後也可乾燥該區 一般而言,在已鍍製材料層進入另一電鍍液時 其表面維持濕潤。需要在工具1 9末端提供一 元25,以確保含有電鍍之第iB族與第IIIA族 箔基質22在被捲至回復捲轴21上之前,係完 燥*»為了避免破壞電鍍層,可從包裝捲軸27饋 26至回復捲軸21上含有電鍍之第IB族材料 式程序,用 g層。 的具體實施 在連續可撓 撓箔基質) 111A族材料 有一供應捲 供應捲軸20 。處理單元 一第ΠΙΑ族 為具有清潔 清潔單元潤 解液或電鍍 Cu電鍍或 •清潔單元, 洗出,然後 電鍍單元) 段;然而, ,較佳為使 潤濕/乾燥單 材料的可撓 *全清潔與乾 丨入一包裝板 與第ΙΙΙΑ族200832732 The present invention provides a low cost, high throughput two segment for the manufacture of CIGS (S) type absorption for solar cells. Figure 2 is a schematic illustration of the program and tool of the present invention; in this embodiment, Using a winding process, the workpiece 22 (for example, having a flexible substrate and a contact layer can be electrodeposited with a Group IB material (preferably Cu) and a first (more than In and Ga at least) a) a tool 9 having a shaft 20 and a return spool 21, the flexible foil substrate 22 being guided from a series of plating units 23 to the return spool 21 23 comprising at least one Group IB material plating unit and at least A material plating unit; after each plating unit 23, preferred units 24A, 24B. After each plating process, the wet plating surfaces, and thus the cross-contamination of the electroplating electro-fluid in the plating unit 23 is avoided. After electrocoating a section of the substrate 22 in a plating unit, the section passes - wherein the chemical residue of the Cu bath on the section is moved by the section to the third group plating Unit (such as Ga. should pay attention to The zone can also be dried after the wetting step. Generally, the surface of the plated material remains wet when it enters another plating solution. A unitary 25 is required at the end of the tool 19 to ensure that the iB group containing the plating is provided. In contrast to the Group IIIA foil substrate 22, before it is wound onto the recovery reel 21, it is dried*»to avoid damage to the plating layer, and can be fed from the packaging reel 27 to the recovery reel 21 containing the electroplated Group IB material program. The g-layer is embodied in a continuous flexible foil substrate. The 111A family material has a supply roll supply reel 20. The treatment unit is a genus with a clean cleaning unit repellent or electroplated Cu plating or • cleaning unit, washing And then electroplating unit); however, it is preferred to make the wet/dry single material flexible* fully cleaned and dry into a packaging board with the Dai family

II 200832732 材料之可撓箔基質22的膜層之間’其中該包裝板26可為 紙張或薄聚合板。 第5圖所示之流程圖100提供了本發明之捲繞式系統 之具體實施例的示例程序流程。最初,如方塊1 〇 1所示, 於連績可繞基板上形成一接觸層以形成·一連續可繞工件, 在該工件上利用本發明之系統來建構本發明之前驅物堆 疊。其次,如方塊102所示,在一表面活化步驟中,接觸 層的表面係經調理以形成一活化表面供後續電沉積程序使 用。如方塊103所示,在電沉積之前對經調理之接觸層的 表面加以清潔’例如以清潔溶液加以潤濕,以移除接觸層 表面上可能的化學殘留物與顆粒。 應注意的是表面活化步驟是非常重要的,這是因為表 面上的電沉積效率係根據表面上沉積之材料的本質而定, 而活化表面係一種具有電化學活性之材料表面,因而可以 有效率地加以電鍍;如果表面呈現電化·學惰性,則電沉積 效率一般會較低且接合性較差。然而,在一活性或活化之 表面上’電’儿積效率會更高且更為一致;一致的電沉積效 ^會使電沉積之材料的厚度一致。在本發明中,cms類型 吸收體層是利用前驅物堆疊(例如Cu/Ga/In或 堆螢)而形成’在堆疊中這些層的厚度需要被緊密控制, 才能進而㈣Cu/(In+Gam Ga/(In + Ga)的料比例為一般 小於1,其對於產生之吸收體的品質以及製造於這種吸收 體上之太陽能電池的性能是非常重要的。cu/(In+Ga)之一 般目標比例介於0·"·95的範圍内;在捲繞式系統中,在 12 200832732 接觸層上沉積有一第一層(例如Cu層)’接觸層係以不同. 時間長度暴露至大氣,其端視捲軸的位置而定。舉例而言, 若可撓工件以2 ft/min的速度移動,則在5000 ft長的捲輪 中,在滾轴開始處的接觸層係於數分鐘内以銅塗佈之,^ 在捲軸末端的接觸層部分則在4 1小時之後才加以塗佈;接 觸層暴露時間上的改變會因氧化、暴露至化學煙氣等因素 而產生接觸層調理之差異。在接觸層上Cu層的鍍製致率 ^ 會因其在捲軸開始處與在捲軸末端處而不同’這種欵率差 異會接著導致可撓工件整體上的Cu層厚度不同,並導致II 200832732 Between the layers of the flexible foil substrate 22 of the material' wherein the packaging sheet 26 can be a paper or thin polymeric sheet. The flowchart 100 shown in Figure 5 provides an exemplary program flow for a particular embodiment of the roll-to-roll system of the present invention. Initially, as shown in block 1 〇 1, a contact layer can be formed on the substrate to form a continuous wrapable workpiece on which the system of the present invention is constructed using the system of the present invention. Next, as shown in block 102, in a surface activation step, the surface of the contact layer is conditioned to form an activated surface for subsequent electrodeposition procedures. As shown in block 103, the surface of the conditioned contact layer is cleaned prior to electrodeposition, e.g., wetted with a cleaning solution to remove possible chemical residues and particles from the surface of the contact layer. It should be noted that the surface activation step is very important because the electrodeposition efficiency on the surface depends on the nature of the material deposited on the surface, and the activation surface is an electrochemically active material surface, which is efficient. Electroplating is performed; if the surface exhibits electro-chemical inertness, the electrodeposition efficiency is generally low and the bondability is poor. However, the 'electron' efficiency on a surface that is active or activated will be higher and more consistent; consistent electrodeposition will result in uniform thickness of the electrodeposited material. In the present invention, the cms-type absorber layer is formed by using a precursor stack (for example, Cu/Ga/In or stack). 'The thickness of these layers in the stack needs to be tightly controlled to further (4) Cu/(In+Gam Ga/ The ratio of (In + Ga) is generally less than 1, which is very important for the quality of the resulting absorber and the performance of the solar cell fabricated on such an absorber. The general target ratio of cu/(In+Ga) In the range of 0·"·95; in the wound system, a first layer (such as a Cu layer) is deposited on the contact layer of 12 200832732. The contact layer is different. The length of time is exposed to the atmosphere, and the end thereof Depending on the position of the reel. For example, if the flexible workpiece moves at 2 ft/min, in a 5000 ft long reel, the contact layer at the beginning of the roller is coated with copper within a few minutes. The contact layer at the end of the reel is coated after 41 hours; the change in exposure time of the contact layer will cause contact layer conditioning differences due to oxidation, exposure to chemical fumes, etc. The plating rate of the Cu layer on the layer will be due to its At the beginning and at the end of the spool is different 'Xin this rate difference may then result in different overall thickness of the Cu layer flexible workpiece, and cause

Cu/(In+Ga)莫耳比例改變,因此降低製程產率,而無法以 , 高產率來製造高效率之太陽能電池。在電沉積第一層於接 觸層上之前,藉由使用活化腔室與活化程序步驟即可確保 在整個捲軸上,接觸層上之第一層的電沉積效率為—致, 並確保能產生一致的Cu/(In+Ga)之比例。 當執行一後續電鍍程序而將第一金屬層(例如鋼 電鍍至活化表面上時,本發明之調理程序使得電錢效慶a 心年高 φ 於90% ;舉例而言,藉由陰離子調理程序而形成於接觸層 " 上的活化表面可為後續的電鍍程序(例如銅電鍍)帶$ _ • 於90%的電鍍效率,然而,若表面屬電化學惰性,則電參 效率會降低,低於90%、甚至低至20-50%。 方塊1 04至1 08說明了用於形成本發a月之前驅物堆疊 的程序序列。如方塊104所示,在一第一電沉積步驟中, 一 IB族材料(例如銅)可電沉積於經調理且清潔之接觸層 表面上,在此步驟後,執行一清潔步驟以清潔電沉積之第 13 200832732The Cu/(In+Ga) molar ratio is changed, thus reducing the process yield, and it is impossible to manufacture a high-efficiency solar cell with high yield. By electrodepositing the first layer on the contact layer, it is ensured that the electrodeposition efficiency of the first layer on the contact layer is uniform throughout the reel by using the activation chamber and the activation procedure step, and that uniformity is ensured. The ratio of Cu/(In+Ga). When a subsequent electroplating procedure is performed to plate a first metal layer (e.g., steel onto an activated surface, the conditioning process of the present invention results in a 90% increase in heart rate; for example, by an anionic conditioning procedure The activated surface formed on the contact layer can be used for subsequent plating procedures (such as copper plating) with a plating efficiency of 90%. However, if the surface is electrochemically inert, the efficiency of the electrical reference is lowered and low. 90%, or even as low as 20-50%. Blocks 104 to 108 illustrate the sequence of programs used to form the stack of precursors prior to the month of the present invention. As shown in block 104, in a first electrodeposition step, A Group IB material (eg, copper) can be electrodeposited on the surface of the conditioned and cleaned contact layer. After this step, a cleaning step is performed to clean the electrodeposition of the 13th 200832.

IB族材料表面,如方塊1〇5所示。如方塊106所示,在一 第二電沉積步驟中,一第一 IIIA族材料(例如鎵)係電沉、 積於經清潔之第IB族材料層表面上,在此步驟後,執行一 清潔程序以清潔電沉積之第一 ΙΠΑ族材料層的表面,如方 塊107所示。如方塊108所不’在一第三電沉積步驟中, 一第二IIIA族材料(例如銦)係電沉積於經清潔之第一 ΠΙΑ 族材料層的表面上,而完成了前驅物堆疊。在下一步驟中 清潔及乾燥此前驅物堆璧,如方塊1 0 9所不;此前驅物堆 疊在第VIA族材料(例如氣相傳送之硒與硫)的存在下進 行反應,以形成一吸收體,如方塊110所示。 或者是,僅對方塊108中的前驅物層加以清潔而不乾 燥,如方塊111所示,以電沉積一第VIA族材料至該前驅 物堆疊上,如方塊11 2所示。在電沉積程序之後,具有第 VIA族材料層之前驅物堆疊係經清潔,如方塊113,敢反 應形成吸收體,如方塊114。在反應期間,可視需要導入 其他的第VIA族材料以形成吸收體。 本發明之捲繞式程序提供了數項優勢。電沉積是一種 對表面靈敏度高之程序,電鍍層中的缺陷大部分是來自其 所鐘製之表面;因此,在電鍍程序中最好是使基板處理最 少化’欲進行鍍製之表面需避免實質接觸、顆粒等,因其 後續會在沉積於此表面上的膜層中造成缺陷。電鍍層的鍍 製效率及厚度均勻性也受到欲鍍製表面的條件影響,舉例 而言,相較於在暴露至空氣、化學氣體、或一般之外部環 境達不同時間的表面進行電沉積,在一化學活性、新鮮表 14 200832732 面上進行Cu、Ga或In之電沉積是一種更為可重複之程 序。在捲繞式程序中,所有沉積都是在一控制環境中完成 (關於捲輛之細節未示於圖中),且沉積之間的時間係最小 化’不像批次程序中需要數個負載及卸載步驟來在_基質 上沉積一材料堆疊。在本發明之捲繞式程序中,係於基質 之區段上錢製一種材料(例如銅);在鐘製與水洗步騾之 後’此一錢製之材料的表面是新鮮且具有活性的,因此, 當區段在數秒或數分鐘内移動至下一鍍液(例如Ga或In 鍍液)中時,沉積開始於此活性表面上進行。如果箔基質 的速率固定,那麼Ga或In鍍製便總是操作於活性相同的 Cu表面上’這在ιη及Ga層的厚度與均勻度上會有高度重 複性的結果,對於Cu層的情形也是如此。 如果在可撓镇基質上先沉積Cu層,可先藉由使可撓 箔基質通過一預沉積電解液並對其施加一預沉積處理步驟 或對表面進行調理,以使可撓箔基質的表面活化。預沉積 處理步驟可為一蝕刻步驟、或是例如陰離子調理步驟或陽 離子調理步驟之一電處理步驟,其中陰離子調理步驟包括 • · . 對基質施加一個相對於預沉積電解液中電極而言為陰極性 之電壓’而陽離子調理步驟包括對基質施加一個相對於預 沉積電解液中電極而言為陽極性之電壓β調理步驟也可包 括一浸酸步驟;或包括在Cu沉積之前先在基質上沉積一 新鮮層之沉積步驟;在這些例子中,可對Cu電沉積步驟 提供一活性表面,使這個步驟在Cu層厚度與均句度上產 生可重複之結果。如前述説明,對於沉積之Cu、ιη及/或 15 200832732The surface of the IB material is shown in Figure 1-5. As shown in block 106, in a second electrodeposition step, a first Group IIIA material (e.g., gallium) is deposited on the surface of the cleaned Group IB material layer, and after this step, a cleaning is performed. The procedure is to clean the surface of the electrodeposited first layer of the lanthanum material as indicated by block 107. As in block 108, a second Group IIIA material (e.g., indium) is electrodeposited on the surface of the cleaned first lanthanum material layer in a third electrodeposition step to complete the precursor stack. The precursor stack is cleaned and dried in the next step, as in block 109; the precursor stack is reacted in the presence of a Group VIA material (eg, selenium and sulfur transported in the vapor phase) to form an absorption. Body, as shown in block 110. Alternatively, only the precursor layer in block 108 is cleaned without drying, as shown in block 111, to electrodeposit a Group VIA material onto the precursor stack as indicated by block 112. After the electrodeposition process, the precursor stack with the VIA material layer is cleaned, as in block 113, dare to form an absorber, such as block 114. Other Group VIA materials may be introduced as needed during the reaction to form an absorbent body. The winding-up procedure of the present invention provides several advantages. Electrodeposition is a process with high sensitivity to the surface. Most of the defects in the plating layer come from the surface of the clock; therefore, it is best to minimize the substrate processing in the plating process. Substantial contact, particles, etc., cause defects in the subsequent deposition of the film on the surface. The plating efficiency and thickness uniformity of the plating layer are also affected by the conditions of the surface to be plated, for example, by electrodeposition on a surface exposed to air, a chemical gas, or a general external environment for different times. A chemically active, freshly deposited electrode of Cu, Ga or In on the surface of 200832732 is a more reproducible procedure. In the wind-up procedure, all deposits are done in a controlled environment (details on the roll are not shown in the figure) and the time between deposits is minimized 'unlike several loads required in the batch program And an unloading step to deposit a stack of materials on the _ substrate. In the winding procedure of the present invention, a material (e.g., copper) is formed on a section of the substrate; after the clocking and washing step, the surface of the material is fresh and active, Thus, when the segment is moved into the next bath (e.g., Ga or In bath) in seconds or minutes, deposition begins on the active surface. If the rate of the foil substrate is fixed, then Ga or In plating will always operate on the same active Cu surface'. This will result in a high degree of repeatability in the thickness and uniformity of the layers of ιη and Ga, for the case of the Cu layer. is also like this. If a Cu layer is deposited on the flexible substrate, the surface of the flexible foil substrate can be first obtained by passing the flexible foil substrate through a pre-deposited electrolyte and applying a pre-deposition treatment step or conditioning the surface. activation. The pre-deposition treatment step may be an etching step or an electro-treatment step such as an anionic conditioning step or a cationic conditioning step, wherein the anion conditioning step comprises: • applying a cathode to the substrate relative to the electrode in the pre-deposited electrolyte The cation conditioning step includes applying a voltage to the substrate that is anodic relative to the electrode in the pre-deposited electrolyte. The conditioning step can also include an acid pickling step; or include depositing on the substrate prior to Cu deposition. A deposition step of a fresh layer; in these examples, an active surface can be provided for the Cu electrodeposition step such that this step produces repeatable results in the thickness and uniformity of the Cu layer. As described above, for deposition of Cu, iη and/or 15 200832732

Ga層的厚度及均勻度控制具有高度重要性,這是因為必須 控制基質整體上的Cu/(In+Ga)以及Ga/(In + Ga)之莫耳比 例0 第3圖顯示了一種示例性的捲繞式電鍍系統3〇,其可 於一可撓落基質22上以高厚度控制性及均勻度製造出包 括Cu、In與Ga之金屬堆疊。電鍍系統3〇包括一系列的 單元、供應捲軸20、回復捲軸21以及用於將可撓箔基質 22從供應捲軸2〇經由處理單元系列而導向至回復捲軸2 1 的機構(圖中未示)。該系列處理單元包括了至少一 電 鍍單το 31、至少一 Ga電鍍單元32以及至少一 a電鍍單 元33 ;應注意到可改變這些電鍍單元的順序以於基質上獲 得不同的堆疊。舉例而言,第3圖所示之電鍍單元的次序 會在基質上產生Cu/Ga/In堆疊,改變此次序並視需要增加 其他的電鍍單元可獲得如Cu/In/Ga、In/Cu/Ga、Ga/Cu/In、 Cu/Ga/Cu/In 、 Cu/Ga/Cu/In/Cu 、 Cu/In/Cu/Ga 、 Cu/In/Cu/Ga/Cu等堆疊;應注意也可重複產生更多這樣的 堆疊。然而,以Cu層開始之堆疊係較佳,這是因為cu電 鍍可以高鐘製效率產生高度可控制、金相良好的塗層,且 Cu對鍍製於其上的Ga或In而言是比較好的基質。在下文 中,可使用第3圖所示之配置來說明本發明,其中電鍍系 統30包括一 Cu電鍍單元、一 Ga電鍍單元與一 in電鍍單 元其中之一。 在第3圖之電鍍系統30中,較佳為具有一調理單元 34’其調理可撓箔基質22的表面,而Cu層將於Cu電鐘 16 200832732The thickness and uniformity control of the Ga layer is of high importance because it is necessary to control the Cu/(In+Ga) and Ga/(In + Ga) molar ratios of the matrix as a whole. FIG. 3 shows an exemplary The roll-up plating system 3 制造 can manufacture a metal stack including Cu, In and Ga on a flexible substrate 22 with high thickness controllability and uniformity. The electroplating system 3A includes a series of units, a supply spool 20, a return spool 21, and a mechanism for guiding the flexible foil substrate 22 from the supply spool 2 to the recovery spool 2 1 via the series of processing units (not shown) . The series of processing units includes at least one electroplated single το 31, at least one Ga plating unit 32, and at least one a plating unit 33; it should be noted that the order of the plating units can be varied to achieve different stacks on the substrate. For example, the order of the plating units shown in Figure 3 will create a Cu/Ga/In stack on the substrate, changing this order and adding other plating units as needed to obtain Cu/In/Ga, In/Cu/ Stacking of Ga, Ga/Cu/In, Cu/Ga/Cu/In, Cu/Ga/Cu/In/Cu, Cu/In/Cu/Ga, Cu/In/Cu/Ga/Cu, etc. Repeat to produce more such stacks. However, stacking starting with a Cu layer is preferred because cu plating can produce a highly controllable, metallographically good coating with high clocking efficiency, and Cu is comparable to Ga or In plated thereon. Good substrate. Hereinafter, the present invention will be described using the configuration shown in Fig. 3, in which the plating system 30 includes one of a Cu plating unit, a Ga plating unit, and an in plating unit. In the electroplating system 30 of Fig. 3, it is preferred to have a conditioning unit 34' which conditioned the surface of the flexible foil substrate 22, while the Cu layer will be on the Cu electric clock 16 200832732

單元3 1中電鍍於該表面上。第3A圖說明了可撓箔基質22 的一般結構,該可撓箔基質22包括一可撓箔基板45與一 傳導層46或沉積在該可撓箔基板45上之第一表面45 A的 接觸詹。該可繞f|基板45可由任何聚合物或金屬猪製成, 但較佳為其係一金屬箔,例如20-25Ομιη厚之不銹鋼箔、 Ti绪、Α1箔或鋁合金箔;各種金屬箔基板(例如Cu、Ti、 Mo、Ni、A1 )已證明可用於CIGS(S)之太陽能電池(例如 B.M· Basol 等人之文獻 “Status of flexible CIS research at ISET’’, NASA Document ID: 19950014096, accession Ν〇·:95Ν-20512,資料得自 NASA Center for Aerospace Information )。傳導層46可具有單一膜層之形式,也可以 是包括各種次層(圖中未示)之堆疊;較佳為,傳導層包 括至少一擴散阻障層,其可避免不純物從可撓箔基板45 擴散到欲電沉積之膜層並於其形成期間進入CIGS(S)層 中。傳導層46之材料包括、但不限於Ti、Mo、Cr、Ta、 W、Ru、Ir、Os以及這些材料的氮化物與氮氧化物〃較佳 為’傳導層46的自由表面46A包括Ru、Ir與Os至少其 中之一,以提供電鍍層較佳結核性。 在此例中,係於傳導層46的自由表面46A上進行電 沉積,可視需要在可撓箔基板45的後表面45B上覆蓋一 辅助層47 (以虛線表示),以於退火/反應步驟期間保護可 撓箔基板45,以形成CIGS(S)化合物、或避免可撓箔基板 45彎曲;重要的是辅助層47的材料在Cn、In與Ga鍍液 化學中是穩定的,亦即在這些鍍液中不會溶解也不會對其 17 200832732The unit 31 is electroplated on the surface. 3A illustrates the general structure of a flexible foil substrate 22 that includes a flexible foil substrate 45 in contact with a conductive layer 46 or a first surface 45A deposited on the flexible foil substrate 45. Zhan. The rewritable f|substrate 45 can be made of any polymer or metal pig, but is preferably a metal foil, such as a 20-25 Ομη thick stainless steel foil, a Ti, a Α1 foil or an aluminum alloy foil; various metal foil substrates (eg Cu, Ti, Mo, Ni, A1) solar cells that have been proven to be usable in CIGS(S) (eg BM Basol et al. "Status of flexible CIS research at ISET", NASA Document ID: 19950014096, accession Ν〇·: 95Ν-20512, data from NASA Center for Aerospace Information. The conductive layer 46 may be in the form of a single film layer, or may comprise a stack of various sub-layers (not shown); preferably, conducting The layer includes at least one diffusion barrier layer that prevents impurities from diffusing from the flexible foil substrate 45 to the film layer to be electrodeposited and into the CIGS(S) layer during its formation. The material of the conductive layer 46 includes, but is not limited to, Ti, Mo, Cr, Ta, W, Ru, Ir, Os, and nitrides and oxynitrides of these materials are preferably 'the free surface 46A of the conductive layer 46 includes at least one of Ru, Ir, and Os to provide The plating layer is better for tuberculosis. In an example, electrodeposition is performed on the free surface 46A of the conductive layer 46, and an auxiliary layer 47 (indicated by a broken line) may be coated on the rear surface 45B of the flexible foil substrate 45 as needed to protect during the annealing/reaction step. The foil substrate 45 is flexed to form a CIGS (S) compound, or the flexible foil substrate 45 is prevented from being bent; it is important that the material of the auxiliary layer 47 is stable in Cn, In, and Ga plating chemistry, that is, in these plating solutions. Will not dissolve or not on it 17 200832732

污染’且可避免與第VIA族材料發生反應;可用於辅助層 47中的材料包括但不限於Ru、Os、Ir、Ta、W等。使用 包括Ru、Ir與Os至少其中一種之辅助層47具有一個另外 的優勢,這種材料非常能夠抵抗Se、S與Te之反應;因 此,在任何形成CIGS(S)化合物層於傳導層 46自由表面 46 A上的反應步驟之後,辅助層會保護該可撓箔基板45 不與.Se、S或Te反應,並留下可輕易焊接之表面。在習 知裝置中,Mo可作為輔助層47 ;在硒化及/或硫化處理期 間、或在CIGS(S)吸收體成長期間,此一 Mo層與Se及/ 或S反應而形成一 Mo(S,Se)表面層。在完成太陽能電池之 後,其需互連以形成模組;互連方式包括焊接或將各電池 的後表面貼附至相鄰電池的前表面。在電池後方的 Mo(S,Se)層不能有效被焊接,因此需對硒化及/或硫化之 Mo表面進行實質移除;然而,包括Ru、Ir與Os其中一種 之表面可以輕易被焊接,而不需移除硒化或硫化表面層之 額外步驟,因為這些材料並不會硒化或硫化。 參照第3圖,在進入Cu電鍍單元31以前,可撓箔基 板22係通過一調理單元34,並視需要通過一清潔單元35。 在調理單元34中,對可撓箔基質22的表面(例如第3A 圖中傳導層46的自由表面46A)進行調理,以準備進行 Cu之電鍍。調理程序包括將自由表面46A暴露至酸性或 鹼性溶液中進行蝕刻及/或活化,在電極與自由表面46 A 皆暴露至一電解液時對自由表面46A施加相對於電極之一 陰極性或陽極性電壓,在自由表面46A上電沉積一種晶 18 200832732Contaminants' can avoid reaction with Group VIA materials; materials that can be used in the auxiliary layer 47 include, but are not limited to, Ru, Os, Ir, Ta, W, and the like. The use of an auxiliary layer 47 comprising at least one of Ru, Ir and Os has the additional advantage that this material is highly resistant to the reaction of Se, S and Te; therefore, any layer forming a CIGS(S) compound is free on the conductive layer 46. After the reaction step on surface 46 A, the auxiliary layer protects the flexible foil substrate 45 from reacting with .Se, S or Te and leaving a surface that can be easily soldered. In a conventional device, Mo may serve as the auxiliary layer 47; during the selenization and/or vulcanization treatment, or during the growth of the CIGS (S) absorber, the Mo layer reacts with Se and/or S to form a Mo ( S, Se) surface layer. After the solar cells are completed, they need to be interconnected to form a module; the interconnection includes soldering or attaching the back surface of each cell to the front surface of an adjacent cell. The Mo(S,Se) layer behind the battery cannot be effectively soldered, so the surface of the selenized and/or vulcanized Mo needs to be substantially removed; however, the surface including one of Ru, Ir and Os can be easily soldered, There is no need to remove the additional steps of selenizing or vulcanizing the surface layer because these materials are not selenized or vulcanized. Referring to Fig. 3, before entering the Cu plating unit 31, the flexible foil substrate 22 passes through a conditioning unit 34 and passes through a cleaning unit 35 as needed. In the conditioning unit 34, the surface of the flexible foil substrate 22 (e.g., the free surface 46A of the conductive layer 46 in Figure 3A) is conditioned to prepare for Cu plating. The conditioning procedure includes exposing the free surface 46A to an acidic or alkaline solution for etching and/or activation, applying a cathode or anode to the free surface 46A relative to the electrode when both the electrode and the free surface 46A are exposed to an electrolyte. a voltage, electrodepositing a crystal 18 on the free surface 46A 200832732

層,或在其移動至Cu電鍍單元31之前僅潤濕該自由表面 46A。如果在調理單元34中僅進行潤濕程序,則不需要清 潔單元35 ;否則就需要在可撓箔基板22移動至Cu電鍍單 元31之前,先以清潔單元35移除留在其表面上的任何殘 留化學物質。在本發明中,如果在調理單元34中於自由表 面46A上電沉積一種晶層,此一種晶層可為厚度2-50 nm 厚之Cu層,且其可自一電鍍液中沉積而成,其可產生無 缺陷之均勻膜層;具有高pH值之錯合Cu電解液特別適合 此目的。使甩種晶層與各種用於電鍍的化學物質係揭露於 申請人於2005年11月2日申請、標題為「用於沉積太陽 能電池之半導體層的技術與設備以及模組製造」之美國專 利申請案No. 1 1/266,013以及2004年8月4曰申請、標題 為「用於製備薄膜太陽電池製造中前驅物薄膜之技術及其 相應設備j之美國專利申請案No. 1 1/462,685中,這些申 請案的整體内容併入本文作為參考。 一旦傳導層46的自由表面46A之一區段經調理與清 潔,其移動至Cu電鍍單元31中。在Cu電鍍單元31内, 自由表面46A(或是如果在調理單元34已經沉積種晶層時 之種晶層表面)係暴露至可循環於一第一貯槽3 6AA與一 第一化學槽36A’間之銅電鍍液36A中;在循環期間或在第 一化學槽36A’内時,可過濾及補充銅電鍍液36A。在該第 一化學槽 3 6 A’内可連續或週期性地控制不同的電鍍液參 數,例如:添加物含量、銅含量、溫度、pH值等,以確保 銅沉積程序的穩定性。可藉由不同方式來達成對於傳導層 19 200832732 46 (或是在可撓箔基板本身具傳導性時,即對可撓箔基板 45 )之電性連接,包括經由與可撓箔基質22接觸於至少其 部分前後表面之滾筒39 ^較佳為,在兩邊緣處製造前表面 接觸,其避免與大部分的前表面產生實質接觸,以免藉由 接觸而破壞或污染則表面。在銅電鍍液36A中放置一第一 陽極電極40 A,並於鋼電鍍單元31内、該第一陽極電極 40A與部分傳導層46之間施加一位能差,以於可撓箔奉質 22移動時,使Cu沉積在暴露至銅電鍍液36A的部分自由 表面46A上。 在Cu電鍍單元3 1中處理的可撓.猪基質22部分係通 過Cu清潔單元37A,並進人Ga電鍍單元32中。在⑸電 鍍單7G中,已經沉積之Cu層表面係暴露至可循環於一第 二貯槽36BB與一第二化學槽,間之Ga電鍍液36以在 循環期間或在第二化學槽36B,内時,可過濾及補充Ga電 鐘液36B。在該第二化學槽36b,内可連續或週期性地控制 不同的電鍍液參數,例如:添加物含量' Ga含量、溫度、 pH值等,以確保Ga沉積程序的穩定性。可藉由不同方式 來達成對於傳導層46 (或是在可撓箔基板本身具傳導性 時,即對可撓羯基板45)之電性連接,包括經由與可撓镇 基質22接觸於至少其部分前後表面之滾筒39。較佳為, 在兩邊緣處製造前表面接觸,其避免與大部分的前表面產 生實質接觸,以免藉由接觸而破壞或污染前表面。在Ga 電鍍液36B中放置一第二陽極電極4〇B,並於Ga電鍍單 元32内、該第二陽極電極4〇b與部分傳導層46之間施加 20 200832732 一位能差,以於可撓箔基質22移動時,使Ga .沉積在暴露 至電鐘液36B的部分cu表面上。 在Ga電鍍單元32中處理的可撓箔基質部分係通過 Ga清潔單元37B,並進入in電鍍單元33中。在In電鍍單 元中,已經沉積之Ga層表面係暴露至可循環於一第三貯 槽36CC與一第三化學槽36C,間之In電鍍液36C ;在循環 期間或在第三化學槽36C,内時,可過濾及補充In電鍍液 36c °在該第三化學槽36C,内可連續或週期性地控制不同 的電鍍液參數,例如:添加物含量、In含量、溫度、pH 值等,以確保In沉積程序的穩定性。可藉由不同方式來達 成對於傳導層46 (或是在可撓箔基板本身具傳導性時,即 對可撓箔基板45 )之電性連接,包括經由與可撓箔基質22 接觸於至少其部分前後表面之滾筒39。較佳為,在兩邊緣 處製造前表面接觸,其避免與大部分的前表面產生實質接 觸,以免藉由接觸而破壞或污染前表面。在In電鍍液36,c 中放置一第三陽極電極40 C,並於In電鍍單元33内、該 第三陽極電極40C與部分傳導層46之間施加一位能差, 以於可撓箔基質22移動時,使In沉積在暴露至ιη電鍍液 36C的部分Ga表面上。在in電沉積之後,包括所有電鍍 之Cu/Ga/In堆疊的部分可撓箔基質係通過一清潔/乾燥單 元38,並移動至回復捲軸21。 應注意可添加其他的處理單元至第3圖之電鍍系統30 中;舉例而言,可在Ga清潔單元37B與In電艘單元33 之間加入另一 Cu電鐘單元與另一清潔單元,以製造 21 200832732The layer, or only the free surface 46A, is wetted before it is moved to the Cu plating unit 31. If only the wetting procedure is performed in the conditioning unit 34, the cleaning unit 35 is not required; otherwise it is necessary to remove any remaining on the surface of the flexible foil substrate 22 with the cleaning unit 35 before moving it to the Cu plating unit 31. Residual chemicals. In the present invention, if a crystal layer is electrodeposited on the free surface 46A in the conditioning unit 34, the crystal layer may be a Cu layer having a thickness of 2-50 nm, and it may be deposited from a plating solution. It produces a uniform film layer free of defects; a miscible Cu electrolyte with a high pH is particularly suitable for this purpose. The bismuth seed layer and various chemical substances used for electroplating are disclosed in the US patent filed on November 2, 2005, entitled "Technology and Equipment for Deposition of Semiconductor Layers of Solar Cells and Module Manufacturing". U.S. Patent Application Serial No. 1 1/462,685, the entire disclosure of which is incorporated herein by reference. The entire contents of these applications are incorporated herein by reference. Once a section of the free surface 46A of the conductive layer 46 is conditioned and cleaned, it moves into the Cu plating unit 31. Within the Cu plating unit 31, the free surface 46A ( Or if the surface of the seed layer when the seeding layer has been deposited by the conditioning unit 34 is exposed to the copper plating solution 36A which is circulated between a first storage tank 3 6AA and a first chemical tank 36A'; during the cycle Or in the first chemical tank 36A', the copper plating solution 36A can be filtered and supplemented. In the first chemical tank 3 6 A', different plating liquid parameters can be controlled continuously or periodically, for example: additive content, Copper content Temperature, pH, etc., to ensure the stability of the copper deposition process. The conductive layer 19 200832732 46 can be achieved in different ways (or when the flexible foil substrate itself is conductive, ie to the flexible foil substrate 45) Electrically connected, including via a roller 39 that is in contact with at least a portion of the front and rear surfaces thereof with the flexible foil substrate 22, preferably, a front surface contact is made at both edges that avoids substantial contact with most of the front surface, In order to avoid damage or contamination of the surface by contact, a first anode electrode 40 A is placed in the copper plating solution 36A, and a bit is applied between the first anode electrode 40A and the partial conductive layer 46 in the steel plating unit 31. Poorly, when the flexible foil 22 moves, Cu is deposited on a portion of the free surface 46A exposed to the copper plating solution 36A. The flexible pig matrix 22 treated in the Cu plating unit 31 is passed through Cu. The cleaning unit 37A is inserted into the Ga plating unit 32. In the (5) electroplating sheet 7G, the surface of the deposited Cu layer is exposed to a Ga plating solution 36 which is circulated in a second storage tank 36BB and a second chemical tank. During the cycle or in the first The second chemical tank 36B can filter and supplement the Ga clock liquid 36B. The second chemical tank 36b can continuously or periodically control different plating liquid parameters, for example, the additive content 'Ga content, temperature , pH, etc., to ensure the stability of the Ga deposition process. The electrical properties of the conductive layer 46 (or when the conductive substrate itself is conductive, ie, the flexible substrate 45) can be achieved in different ways. The connection includes passing through a roller 39 that contacts at least a portion of the front and rear surfaces of the flexible substrate 22. Preferably, a front surface contact is made at both edges that avoids substantial contact with most of the front surface to avoid contact And destroy or contaminate the front surface. A second anode electrode 4〇B is placed in the Ga plating solution 36B, and a potential difference is applied between the second anode electrode 4〇b and the partial conductive layer 46 in the Ga plating unit 32. When the flexible foil substrate 22 is moved, Ga is deposited on the surface of the portion cu exposed to the electric clock liquid 36B. The flexible foil substrate portion processed in the Ga plating unit 32 passes through the Ga cleaning unit 37B and enters the in plating unit 33. In the In plating unit, the surface of the deposited Ga layer is exposed to an In plating solution 36C which is circulated between a third storage tank 36CC and a third chemical tank 36C; during the cycle or in the third chemical tank 36C. In time, the plating solution 36c can be filtered and replenished in the third chemical tank 36C, and different plating liquid parameters such as additive content, In content, temperature, pH value, etc. can be continuously or periodically controlled to ensure The stability of the In deposition program. The electrical connection to the conductive layer 46 (or to the flexible foil substrate 45 when the flexible foil substrate itself is conductive) can be achieved in different ways, including by contacting at least the flexible foil substrate 22 with at least Part of the front and rear surface of the drum 39. Preferably, the front surface contact is made at both edges to avoid substantial contact with most of the front surface to prevent damage or contamination of the front surface by contact. A third anode electrode 40 C is placed in the In plating solution 36, c, and a potential difference is applied between the third anode electrode 40C and the partial conductive layer 46 in the In plating unit 33 for the flexible foil substrate. When moving 22, In is deposited on the surface of the portion Ga which is exposed to the ITO plating solution 36C. After the in electrodeposition, a portion of the flexible foil substrate including all of the plated Cu/Ga/In stack passes through a cleaning/drying unit 38 and is moved to the recovery spool 21. It should be noted that other processing units may be added to the plating system 30 of FIG. 3; for example, another Cu electric clock unit and another cleaning unit may be added between the Ga cleaning unit 37B and the In electric boat unit 33, Manufacturing 21 200832732

Cu/Ga/Cu/In堆疊。使用於電鍍單元中的陽極電極可為惰 性陽極或其為Cu電沉積、Ga電沉積與in電沉積中分別含 有Cu、In與Ga之可溶解性陽極1在堆疊内cu、In與以 層之厚度係介於10 nm至500 nm。清潔或清潔/乾燥單元 的細節並沒有顯示於第3圖中,然而,已建立之清潔裝置 (例如將清潔溶液喷灑至欲清潔之部分上或將該部分浸至 清潔溶液中的裝置)可用於這些單元中;而將高速空氣或 惰性氣體引導到欲乾燥部分之空氣叉可用於作為乾燥攀 置,乾燥氣體可預先過濾並加熱以使乾燥更有效率及快速。 目前說明了關於含有第IB族材料與第mA族材料之 堆疊的捲軸式電沉積系統及方法的例子,也可於第3圖之 電鍍系統中加入其他的處理單元以延伸其功能,如下文所 述。 第4圖說明了 一種捲繞式處理系統5〇,其包括第 IB-ΠΙΑ族電鍍單元51與第VIA族材料電鍍單元第 IB-ΠΙΑ族電鍍單元51將第IB族材料與第Ιπν族材料電 此積在可撓箔基質22上而形成金屬前驅物薄膜,且可包括 例如第3圖所示之電鍍系統3〇中的所有或大部分組件。舉 例而言,第IB-IIIA族電鍍單元51可沉積^、以與。層+, 且可包括第3圖之調理單元34、清潔單元35、(^電鍍單 元31、Cu清潔單元37A、Ga電鍍單元32、以清潔^元 37B以及^電鍍單元33。也可使用另一清潔單元有乾 燥)來取代第3圖之清潔/乾燥單元38,而使以cu、… in塗佈或電化學塗佈之可換箱基質22具有—清潔且谭润 22Cu/Ga/Cu/In stacking. The anode electrode used in the electroplating unit may be an inert anode or it may be a Cu, E electrode and in electrodeposition containing Cu, In and Ga, respectively, a soluble anode 1 in the stack cu, In and a layer The thickness is between 10 nm and 500 nm. The details of the cleaning or cleaning/drying unit are not shown in Figure 3, however, an established cleaning device (such as a device that sprays the cleaning solution onto the portion to be cleaned or dipped into the cleaning solution) is available. In these units, an air fork that directs high velocity air or inert gas to the portion to be dried can be used as a dry climb, and the dry gas can be pre-filtered and heated to make drying more efficient and faster. An example of a roll-type electrodeposition system and method for stacking a Group IB material and a Group mA material is now described, and other processing units may be added to the plating system of Figure 3 to extend its function, as follows Said. Figure 4 illustrates a wound processing system 5A comprising an IB-ΠΙΑ family plating unit 51 and a Group VIA material plating unit IB-ΠΙΑ plating unit 51 for electrically converting the Group IB material and the Ιπν family material This builds up on the flexible foil substrate 22 to form a metal precursor film, and may include all or most of the components of the electroplating system 3, such as shown in FIG. For example, the Group IB-IIIA plating unit 51 can be deposited. Layer +, and may include the conditioning unit 34 of FIG. 3, the cleaning unit 35, (the plating unit 31, the Cu cleaning unit 37A, the Ga plating unit 32, the cleaning unit 37B, and the plating unit 33. Another can also be used The cleaning unit has a drying unit instead of the cleaning/drying unit 38 of Fig. 3, so that the changeable substrate 22 coated or electrochemically coated with cu,...in has -clean and Tan Run 22

200832732 之表面並移動至第VIA族材料電鍍單元62。在第V以族 材料電錄單元62中’Se、u 至少其中一層(較佳 為Se層)係沉積在金屬前驅物薄膜上,具有“金屬前驅物/ 第VIA族材料”堆疊之可撓荡基質會接著通過_最終清潔/ 乾燥模組63,並捲繞至回復捲軸21上。在包括Cu、⑸ 與In之金屬前驅物薄膜上存在第via族材料具有一些優 勢;優勢之-在^ VIA族材料對金屬前驅物薄膜表面提 供保護’銦與鎵是軟性、低熔點之材料,且其於捲繞盥處 理過程中容易損傷,藉由在金屬前驅物薄膜上沉積一層第 VIA族材料(例如Se),可降低甚至消除這種易受損傷特 性,而使可撓網可以安全地捲繞至回復捲軸21上。電鍍之 第VIA族材料的厚度在10_2〇〇〇 nm的範圍内。 第4圖之捲繞式處理系統可視需要搭载第4圖所示之 退火單元64 ;在使用時,退火單元64會在電沉積之金屬 前驅物薄膜以及電沉積之第VIA族材料之間產生反應,並 在可撓y#基質22上形成一反應前驅物層。如果via族材 料是Se,則反應前驅物層係包含例如Cu、In、Ga、Cu_(ja、The surface of 200832732 is moved to the VIA material plating unit 62. In the Vth group material electro-recording unit 62, at least one layer (Se layer) of Se, u is deposited on the metal precursor film, and has a "metal precursor / VIA material" stack rewritable The substrate will then pass through the final cleaning/drying module 63 and onto the recovery spool 21. The presence of a vis group material on a metal precursor film comprising Cu, (5) and In has some advantages; the advantage is that the VIA family material provides protection to the surface of the metal precursor film. 'Indium and gallium are soft, low melting materials, Moreover, it is easy to be damaged during the winding process. By depositing a layer VIA material (such as Se) on the metal precursor film, the damage property can be reduced or even eliminated, and the flexible mesh can be safely Winding onto the return spool 21. The thickness of the Group VIA material is in the range of 10_2 〇〇〇 nm. The winding treatment system of Fig. 4 may be equipped with an annealing unit 64 as shown in Fig. 4; in use, the annealing unit 64 reacts between the electrodeposited metal precursor film and the electrodeposited Group VIA material. And forming a reactive precursor layer on the flexible y# substrate 22. If the via material is Se, the reaction precursor layer contains, for example, Cu, In, Ga, Cu_(ja,

Cu-In、In-Ga、Cu-Se、In-Se、Ga-Se、Cu_In_Se、cu_Ga-Se、Cu-In, In-Ga, Cu-Se, In-Se, Ga-Se, Cu_In_Se, cu_Ga-Se,

In-Ga-Se以及Cu-In-Ga-Se等相,其端視施加至退火單元 64的溫度以及在退火單元64中所花費的時間而定。藉由 退火單元而施加的溫度是在l〇〇-55(TC的範圍内,較佳為 在200-45(TC的範圍内。在出現退火單元64之後,包含反 應前驅物層之可撓箔會安全地捲繞至回復捲軸21上,也可 如第2圖所述捲繞一包裝板。應注意第VIA族材料電鍍單 23 200832732 元62與第3圖所示之電鍍單元相似,退火單元64則與申 請人於2006年10月13曰申請、標題為「將前驅物層轉換 至光電吸收體的方法與設備j之美國專利申請案 No. 11/549,590中所說明的設計相似,其整體内容併入本文作 為參考。 上述例子使用例如如第3A圖所說明之可撓箔基質The In-Ga-Se and Cu-In-Ga-Se phases are depending on the temperature applied to the annealing unit 64 and the time spent in the annealing unit 64. The temperature applied by the annealing unit is in the range of 〇〇-55 (TC, preferably in the range of 200-45 (TC). After the annealing unit 64 is present, the flexible foil containing the reaction precursor layer It will be safely wound onto the recovery reel 21, or it can be wound as shown in Figure 2. It should be noted that the VIA material plating sheet 23 200832732 62 is similar to the plating unit shown in Figure 3, the annealing unit 64. Similar to the design described in the U.S. Patent Application Serial No. The content is incorporated herein by reference. The above examples use a flexible foil substrate such as illustrated in Figure 3A.

22,傳導層46以及視需要之輔助層47可藉由各種沉積技 術而沉積在可撓箔基板45上,例如藉由獨立系統中之蒸鍍 與濺鍍等方式,然而也可以整合其他的電鍍或無電鍍模組 於第3、4圖所示之系統中,使可撓箔基板45在移動至其 他處理單元(例如第4圖之第IB-IIIA族電鍍單元)之前, 與至少一傳導層或接觸層及辅助層同時電鍍;此方式會在 電鍍之Cu、In與Ga層中造成缺陷,這是因為在接觸層中 或上的缺陷(例如擦傷、小孔或其他缺陷)係由於接觸層 是新鮮沉積且接著就塗佈了 Cu、以與Ga而得以避免。此 方式之接觸層需要包括可以被電鍍或無電鍍鍍製之材料, 該材料需同時對CIGS(S)材料i ώ t ^ 022, the conductive layer 46 and optionally the auxiliary layer 47 may be deposited on the flexible foil substrate 45 by various deposition techniques, such as by evaporation and sputtering in a separate system, but other plating may be integrated. Or an electroless plating module in the system shown in Figures 3 and 4, before moving the flexible foil substrate 45 to at least one conductive layer before moving to other processing units (e.g., Group IB-IIIA plating unit of Figure 4) Or the contact layer and the auxiliary layer are simultaneously plated; this method causes defects in the electroplated Cu, In and Ga layers because defects (such as scratches, pinholes or other defects) in or on the contact layer are due to the contact layer. It is freshly deposited and then coated with Cu to avoid it with Ga. The contact layer in this manner needs to include a material that can be plated or electrolessly plated, and the material needs to be simultaneously applied to the CIGS(S) material i ώ t ^ 0

竹针為良好的歐姆择觸且不與S 及/或Se反應。這些膜層係插, 、揭露於申請人於2005年11月 2日申請、標題為「沉積太陽< & ^ 及味旄電池之半導體層的技術與 設備以及模組製造」之美國衷夺、丨士 、四寻利申請案No· 1 1/266,013以 及2004年8月4曰申請、棵韶劣r &續為「用於製備薄膜太陽電池 製造中前驅物薄膜之技術及复&也 j久具相應設備」之美國專利申請 案 No· 11/462,685 中,其包含了 y^ ^ s 了例如Ru、Ii:與Os之材料。 應注意藉由將可撓箔基板後侧異♦ 风例暴露至接觸電鍍溶液與沉積 24 200832732 電流,其可於在前表面電鐘接觸層時,在基板後側電鑛一 輔助層。 在涉及含有Cix、Ιϋ與Ga之金屬前驅物膜層沉積以及 該金屬前驅物膜層與S e及S至少其中一個反應之兩段式 技術中,需好好控制Cu、In與〇&層的個別厚度,因為其 決定反應步驟後化合物層的最終計量組成^本發明之捲繞 式沉積方式提供了智慧程序控制,因此可利用原處測量裝 置(例如XRF )來監控這些厚度;可將xrf探針放置在第 2、3與4圖所示系統中的不同位置,這些探針會監控所沉 積之Cu、In與Ga、以及視需要之Se層的厚度。如果Cu、 In與Ga層中任一層的目標與沉積厚度之間有偏差,XRF 工具會發送訊號至控制厚度之電源供應器,以增加或降低 電鍍電流密度,以使膜層厚度保持於一目標窗内。這些方 式係詳細說明於申請人於2006年4月4曰申請、標題為「光 電薄膜製造之組成控制」之美國臨時專利申請案N〇. 60/744,252 f 。Bamboo needles are good ohmic choices and do not react with S and / or Se. These membranes are intercalated and disclosed in the United States, which was filed on November 2, 2005, and entitled "Deposition of Solar <& ^ and Semiconductor Layer Technology and Equipment Manufacturing of Miso Battery" , gentleman, four-seeking application No. 1 1/266,013 and August 4, 2004 application, 韶 韶 r & continued as "Technology and Reconstruction for the Preparation of Precursor Films in Thin Film Solar Cell Manufacturing" U.S. Patent Application Serial No. 11/462,685, the entire disclosure of which is incorporated herein by reference. It should be noted that by exposing the back side of the flexible foil substrate to contact with the plating solution and depositing 24200832732 current, it is possible to electrify an auxiliary layer on the back side of the substrate when the front surface is in contact with the layer. In a two-stage technique involving the deposition of a metal precursor containing Cix, yttrium and Ga and the reaction of the metal precursor film layer with at least one of S e and S, it is necessary to control the Cu, In and 〇 & Individual thickness, because it determines the final metering composition of the compound layer after the reaction step. The coiled deposition method of the present invention provides intelligent program control, so the in situ measurement device (for example, XRF) can be used to monitor these thicknesses; xrf can be probed The needles are placed at different locations in the systems shown in Figures 2, 3 and 4, which monitor the thickness of the deposited Cu, In and Ga, and optionally the Se layer. If there is a deviation between the target and the deposited thickness of any of the Cu, In, and Ga layers, the XRF tool sends a signal to the power supply that controls the thickness to increase or decrease the plating current density to maintain the film thickness at a target. Inside the window. These methods are described in detail in U.S. Provisional Patent Application No. 60/744,252, filed on Apr. 4, 2006, the entire disclosure of which is incorporated herein by reference.

一旦形成本發明之金屬前驅物薄膜、或《金屬前驅物/ 第VIA族材料”堆疊、或反應前驅物層,這些層與第via 族材料的反應或進一步反應會藉由各種機制而達成;舉例 而言,這些層係於較高溫度暴露至第VIA族氣體,這些技 術在本領域中皆屬習知,且其包括在Se氣體、s氣體與 Te氣體中至少其中一者的存在下,對這些層加熱至 350-600°C達5分鐘至1小時,其中Se氣體、S氣體與Te 氣體是由例如固態Se、固態S、固態Te、H2Se氣體、H2S 25Once the metal precursor film of the present invention, or the "metal precursor / Group VIA material" stack, or the reactive precursor layer is formed, the reaction or further reaction of these layers with the via material can be achieved by various mechanisms; In contrast, these layers are exposed to Group VIA gases at higher temperatures, and such techniques are well known in the art and include the presence of at least one of Se gas, s gas, and Te gas, The layers are heated to 350-600 ° C for 5 minutes to 1 hour, wherein the Se gas, the S gas and the Te gas are, for example, solid Se, solid S, solid Te, H 2 Se gas, H 2 S 25

200832732 氣體等來源所提供。在另一實施例中,係於金屬前驅 上沉積一層或多層第VIA族材料,然後於一加熱爐或 熱退火爐中加熱。第VIA族材料可在獨立的處理單元 鍍、濺鍍或電鍍在金屬前驅層上。或者是,可製備包 VIA族奈来粒子之墨水,然後將這些墨水沉積在金屬 物層上,以形成含有第VIA族奈来粒子之第 VIA族 層,可使用浸鍍、喷鍍、到刀成形方式或墨水寫入技 沉積這些膜層。反應可於較高溫度下進行達1至3 0分 其端視反應溫度而定;反應結果係形成第IBIIIAVIA 合物。應注意這些反應腔室可添加至第4圖所示設備 或退火單元64可為進行整體線上程序的反應單元,因 面具有CIGS(S)之可撓箔基質便可捲繞至回復捲軸21 在上述例子中,係說明了具有水平網型式的系統 注意本發明之概念也可應用於可撓箔基質以垂直位置 與水平平面夾任一角度的方式運行之系統中。在水平 進行之沉積可以“向上沉積”或“向下沉積”的方示進行 撓箔基板可從左向右移動,且反之亦然,其亦可以連 式或步進方式移動,也可以震盪“前後”運動的方式移 在可撓箔基質移動於一方向時可沉積部分層於其上, 在其移動於反方向時再沉積更多層。DC、AC、脈衝 反脈衝式電源供應器、或其他類型之供應器,皆可用 沉積步驟中。 可利用該領域中習知材料與方法在本發明 IBIIIAVIA族化合物層上製造太陽能電池。舉例而言 物層 快速 中蒸 含第 前驅 材料 術來 ‘鐘, 族化 中, 此表 ,應 或以 網上 ,可 續方 動。 然後 式或 於電 之第 ,可 26200832732 Gas and other sources provided. In another embodiment, one or more layers of Group VIA material are deposited on a metal precursor and then heated in a furnace or thermal annealing furnace. The Group VIA material can be plated, sputtered or plated onto a metal precursor layer in a separate processing unit. Alternatively, an ink of Group VIA nai particles may be prepared and then deposited on the metal layer to form a Group VIA layer containing Group VIA nai particles, which may be immersed, sprayed, or knives. Forming or ink writing techniques deposit these layers. The reaction can be carried out at a higher temperature for 1 to 30 minutes depending on the reaction temperature; the reaction results in the formation of the IBIIIAVIA compound. It should be noted that these reaction chambers may be added to the apparatus shown in FIG. 4 or the annealing unit 64 may be a reaction unit for performing an overall in-line procedure, and the flexible foil substrate having the CIGS(S) may be wound onto the recovery reel 21 at In the above examples, a system having a horizontal mesh pattern is described. Note that the concept of the present invention can also be applied to a system in which the flexible foil substrate is operated at any angle between the vertical position and the horizontal plane. The horizontal deposition can be performed by "upward deposition" or "downward deposition". The flexible foil substrate can be moved from left to right, and vice versa, it can also be moved in a continuous or stepwise manner, or it can oscillate. The "front and rear" motion shifts when a flexible foil substrate is moved in one direction to deposit a portion of the layer thereon, and more layers are deposited as it moves in the opposite direction. DC, AC, pulsed back-pulse power supplies, or other types of supplies can be used in the deposition step. Solar cells can be fabricated on the IBIIIAVIA compound layer of the present invention using materials and methods well known in the art. For example, the layer is quickly vaporized with the first precursor material to ‘clock, trinization, this table, should be online or renewable. Then or in the first place, 26

200832732 藉由化學浸鍍方法在化合物層表面上沉積一 CdS薄層 微米),利用MOCVD或濺鍍技術在CdS層上沉積一 透明窗,再視需要於ZnO上沉積一金屬指狀圖樣,以 整個太陽能電池。 雖然本發明係以特定較佳實施例加以說明,然本 技術人士可由其暸解其他修飾方式。 【圖式簡單說明】 第1圖係使用一第IBIIIAVIA族吸收體層之太陽 池截面圖; 第2圖說明了本發明之捲繞式電沉積系統; 第3圖說明了本發明之另一捲繞式電沉積系統, 括多重電鍍單元與清潔單元; 第3A圖說明了可撓箔基質之結構; 第4圖說明了 一種包括附加處理單元之捲繞式處 統,其包括一第VIA族材料電鍍單元;以及 第5圖說明了使用捲繞式系統之程序的具體實施 流程圖。 (<1 ZnO 完成 領欲 能電 其包 理系 例的 【主要元件符號說明】 10 裝置 12 吸收體薄膜 14 穿透層 19 工具 11 基板 13 傳導層 15 輻射 20 供應捲軸 27 200832732200832732 A thin window of CdS is deposited on the surface of the compound layer by chemical immersion plating, a transparent window is deposited on the CdS layer by MOCVD or sputtering, and a metal finger pattern is deposited on the ZnO as needed. Solar battery. Although the invention has been described in terms of specific preferred embodiments, those skilled in the art can understand other modifications. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view of a solar cell using an IBIIIAVIA family absorber layer; Fig. 2 illustrates a wound electrodeposition system of the present invention; and Fig. 3 illustrates another winding of the present invention Electrodeposition system, including multiple plating unit and cleaning unit; Figure 3A illustrates the structure of the flexible foil substrate; Figure 4 illustrates a winding system including an additional processing unit, including a Group VIA material plating The unit; and Figure 5 illustrate a detailed implementation flow diagram of the procedure for using a roll-to-roll system. (<1 ZnO Completion) The main component symbol description 10 Device 12 Absorber film 14 Penetration layer 19 Tool 11 Substrate 13 Conduction layer 15 Radiation 20 Supply reel 27 200832732

21 回 復 捲軸 22 可 撓 箔 基 質 23 電 鍍 單元 24A、24B 清 潔 單 元 25 潤 濕 /乾燥單元 26 包 裝 板 27 包 裝 捲轴 30 電 鍍 系 統 31 電 鍍 單元 32 電 鍍 單 元 33 電 鍍 單元 3 4 調 理 單 元 35 清 潔 單元 3 6A 電 鍍 液 36AA 第 _ 一 貯槽 36A9 第 一 化 學 槽 36B 電 鍍 液 36BB 第 二 貯 槽 36B9 第 二 化學槽 3 6C 電 鍍 液 36CC 第 三 貯槽 36C5 第 化 學 槽 37A 清 潔 單元 37B 清 潔 單 元 38 清 潔 /乾燥單元 39 捲 轴 40A 第 一 陽極電極 40B 第 二 陽 極 電 極 40C 第 三 陽極電極 45 可 撓 箔 基 板 45A 第 表面 45B 第 二 表 面 46 傳 導 層 46A 白 由 表 面 47 輔 助 層 50 捲 繞 式 處 理 系統 51 電 鍍 單元 62 電 鍍 單 元 63 清 潔 /乾燥模組 64 退 火 單 元 101〜114 步驟 2821 Rewinding reel 22 Flexible foil substrate 23 Plating unit 24A, 24B Cleaning unit 25 Wetting/drying unit 26 Packaging board 27 Packaging reel 30 Plating system 31 Plating unit 32 Plating unit 33 Plating unit 3 4 Conditioning unit 35 Cleaning unit 3 6A Plating solution 36AA first_slot 36A9 first chemical tank 36B plating solution 36BB second storage tank 36B9 second chemical tank 3 6C plating solution 36CC third storage tank 36C5 chemical tank 37A cleaning unit 37B cleaning unit 38 cleaning/drying unit 39 reel 40A first anode electrode 40B second anode electrode 40C third anode electrode 45 flexible foil substrate 45A first surface 45B second surface 46 conductive layer 46A white surface 47 auxiliary layer 50 wound processing system 51 plating unit 62 plating unit 63 Cleaning/drying module 64 annealing unit 101~114 step 28

Claims (1)

200832732 十、申請專利範園: i.-種用於在-連續可撓卫件之—前表面上形成太陽 能電池之-吸收體結構的系㉚,該連續可撓工件係前進通 過該系統之多個單元,該系統包括: 一調理單元,用於調理玆揸嫉π榼 哎邊連續可撓工件之該前表面,使 其形成數活化表面部分,其中兮莖。壬於主 v t _ /、T該專活化表面部分大體上沿 著該用於電鍍之連續可撓工杜品ο祖 ^200832732 X. Patent application garden: i.- A system 30 for forming a solar cell-absorbent structure on the front surface of a continuous slingable member, the continuous flexible workpiece system advancing through the system Units, the system comprising: a conditioning unit for conditioning the front surface of the continuous flexible workpiece of the z 揸嫉 榼哎 edge to form a number of activated surface portions, wherein the stems. The main surface of the main v t _ /, T is activated along the continuous flexible material for electroplating. 坑工件而主現一一致性的活化表 面; 一第一電鍍單元,用於形成一前驅物堆疊之一第一層, 其係在當該連續可撓工件前進通過該第一電鍍單元時,藉 由將一屬於第ΙΒ族與IIIA族中之一的金屬電鍍在該連續 可撓工件之該等活化表面部分上而形成; 一第一清潔單元,用於清潔在該第一電鍍單元中沉積的 該第一層, 一第二電鍍單元’用於形成該前驅物堆疊之一第二層, 其係在當該連縯可撓工件前進通過該第二電鍍單元且該第 一層係於該第一電鐘單元中被持續電鍍至該連續可撓工件 之下一個活化表面部分時,藉由將屬於第ΙΒ族與ΙΙΙΑ族 中之另一金屬電鐘在該第一層上而形成,其中該第一層與 該第二層不同; 一第二清潔單元,用於清潔在該第二電鍍單元中沉積的 該第二層;以及 一移動組件,用於托持並線性移動該連續可換工件通過 29 200832732Pit the workpiece to create a uniform activation surface; a first plating unit for forming a first layer of a precursor stack when the continuous flexible workpiece advances through the first plating unit Forming a metal belonging to one of the third group and the group IIIA on the activating surface portions of the continuous flexible workpiece; a first cleaning unit for cleaning deposition in the first plating unit The first layer, a second plating unit 'for forming a second layer of the precursor stack, is when the continuous flexible workpiece advances through the second plating unit and the first layer is attached to the When the first electric clock unit is continuously plated to an active surface portion of the continuous flexible workpiece, by forming another metal electric clock belonging to the third and third groups on the first layer, wherein The first layer is different from the second layer; a second cleaning unit for cleaning the second layer deposited in the second plating unit; and a moving component for holding and linearly moving the continuous exchangeable Workpiece passing 29 2008327 32 該系統之該 拾取捲軸, 處理部分至 處理部分。 2.如申 單元,用於 通過該第一 二電鍍單元 活化部分且 該連續可撓 屬於第ΙΒ ;ί 二層上而獲 二層不同。 3·如申 單元與一第 潔並乾燥該 電鍍單元中 / 4.如申 元,以使該 些單元,其中該移動組件包括一饋送捲轴與一 該饋送捲轴可展開並饋送該連續可撓工件‘之未 該系統中,雨該拾取捲軸係用以接收及纏繞已 請專利範圍第1項之系統,更包括一第三電鍍 形成一第三層,其係在當該連續可撓工件前進 、第二與第三電鍍單元、而該第二層係於該第 中被持續電鍍至該連續可撓工件表面的下一個 該第一層係於該第一電鍍單元中被持續電鍍至 工件表面之再下一個活化表面部分時,藉由將 矣與第ΙΙΙΑ族其中之一的另一金屬電鍍在該第 得該前驅物堆疊,其中該第三層與該第一和第 請專利範圍第2項之系統,更包括一清潔-乾燥 三清潔單元其中之一,該清潔-乾燥單元用於清 第三層,而該第三清潔單元用於清潔在該第三 沉積的該第三層。 請專利範圍第3項之系統,更包括一退火單 第一、第二與第三層反應。 30 200832732 5.如申請專利範圍第3項之系統,更包括一第四電鐘 單元,用於在該第三層上沉積由第VIA族材料组成之一第 四層0 6. 如申請專利範圍第5項之系統,其中該第VI族材 料包括以下之一:Se、S與Te。 7. 如申請專利範圍第5項之系統,更包括一清潔-乾燥 單元與一退火單元,其中該清潔-乾燥單元用於清潔並乾燥 該第四層,該退火單元用於使該第一、第二、第三與第四 層反應。 8.如申請專利範圍第1項之拳統,其中該調理單元包 括至少下列之一: 一電處理腔室,其具有一電處理溶液及電極,其相對於 該連續可撓工件係可陰離子或陽離子極化以形成該等活化 部分; 一沉積室與一浸酸室(a pickling chamber),該沉積室用 於在該連續可撓工件之該前表面上沉積一種晶層,而該浸 酸室用於處理該連續可撓工件之該前表面以形成該等活化 部分;以及 一蝕刻室,用於蝕刻該連續可撓工件之該前表面,以形 成該等活化部分。 31 200832732 9.如申請專利範·圍第1項之系統,其中該第IB族材料 包括銅,且其中該第一第ΠΙΑ族材料包括Ga與In其中之 10. 如申請專利範園第1項之系統,更包括一包裝供應 捲軸,用於提供一連續包裝板以於該連續可撓工件沿該拾 取捲軸纏繞時放置在該等已處理部分上。 11. 如申請專利範圍第9項之系統,更包括一沉積監視 單元,用於監視並控制所沉積之第一、第二與第三層的厚 度。 1 2.如申請專利範圍第11項之系統,其中該沉積監視單 元提供一反饋訊號至各該第一、第二與第三電鍍單元,以 使所沉積之該第一、第二與第三層的厚度趨向各該第一、 第二與第三層之一預定厚度。 1 3.如申請專利範圍第1 2項之系統,其中所述趨向係用 於維持Cu/In + Ga與Ga/In+Ga的目標比例。 14. 一種利用内含一移動組件之一系統而於一連續可撓 工件的一前側上形成一前驅物堆疊的方法,其中該前側包 32 200832732 括一傳導層,該方法包括: 藉由從該系統之一輸入端移動並饋入該連續可撓工件 先前尚未捲繞部分,並使其依序通過一調理單元、一活化 表面清潔單元、一第一電鍍單元、一第一清潔單元、一第 二電鍍單元、一第二清潔單元、一第三電鍍單元與一清潔-乾燥單元; 在調理單元中調理該傳導層之表面,以形成一活化表面 部分,其中該活化表面部分大體上沿著用於電鍍之該連續 可撓工件之整體而呈現—致性的活化表面; 清潔該活化表面清潔單元中的該活化表面部分; 待清潔完該活化表面部分之後,在該活化表面部分上形 成一前驅物堆疊,包括: 在該第一電鍍單元中藉由將一屬於第IB族材料與 一第ΠΙΑ族材料其中之一的金屬電鍍在該活化表面部 分上而形成一第一材料層; 於該第一清潔單元中清潔該第一材料層; 在該第二電鍍單元中藉由將屬於該第ΙΒ族材料與 該第ΙΙΙΑ族材料中之另一金屬電鍍至該第一材料層上 而形成一第二材料層,其中該第二材料層與該第一材料 層不同; 於該第二清潔單元中清潔該第二材料層; 在該第三電鍍單元中藉由將屬於該第ΙΒ族材料與 該第ΙΙΙΑ族材料中另一金屬沉積於該第二材料層上而 33 200832732 形成一第三材料層,其中該第三材料層與該第一和第二 材料層不同, 於該清潔-乾燥單元中清潔並乾燥該前驅物堆疊; 於該系統之一輸出端拾取並纏繞該連續可撓工件 之已處理部分。 15.如申讀專利範圍第14項之方法,更包括:The pick-up reel of the system processes the portion to the processing portion. 2. The application unit is configured to obtain a second layer by using the first two electroplating unit to activate the portion and the continuous flexible portion belongs to the second layer. 3. If the unit is cleaned and dried in the plating unit / 4. such as Shen Yuan, to make the units, wherein the moving assembly includes a feeding reel and a feeding reel can be unfolded and fed the continuous In the system of scratching the workpiece, the pick-up reel is used to receive and wind the system of claim 1 of the patent scope, and further comprises a third electroplating to form a third layer, which is when the continuous flexible workpiece Advancing, second and third plating units, and wherein the second layer is continuously plated to the surface of the continuous flexible workpiece, the first layer is continuously electroplated to the workpiece in the first plating unit When the surface of the surface is further activating the surface portion, the precursor is stacked by electroplating another metal of one of the lanthanum and the third group, wherein the third layer is related to the first and the patent scope The system of item 2 further includes one of a cleaning-drying three cleaning unit for cleaning the third layer, and the third cleaning unit for cleaning the third layer deposited in the third layer. Please refer to the system of the third item of the patent scope, including the annealing of the first, second and third layers. 30 200832732 5. The system of claim 3, further comprising a fourth electric clock unit for depositing a fourth layer of the VIA material on the third layer. The system of item 5, wherein the Group VI material comprises one of: Se, S, and Te. 7. The system of claim 5, further comprising a cleaning-drying unit and an annealing unit, wherein the cleaning-drying unit is for cleaning and drying the fourth layer, the annealing unit is for making the first The second, third and fourth layers react. 8. The punching system of claim 1, wherein the conditioning unit comprises at least one of: an electrical processing chamber having an electrical treatment solution and an electrode that is anionizable with respect to the continuous flexible workpiece system The cation is polarized to form the activating portions; a deposition chamber and a pickling chamber for depositing a seed layer on the front surface of the continuous flexible workpiece, and the pickling chamber Forming the front surface of the continuous flexible workpiece to form the activated portions; and an etch chamber for etching the front surface of the continuous flexible workpiece to form the activated portions. 31 200832732 9. The system of claim 1, wherein the material of the Group IB comprises copper, and wherein the first material of the first group includes Ga and In. 10 of the patent application. The system further includes a package supply spool for providing a continuous wrap sheet for placement on the processed portion as the continuous flexible workpiece is wrapped along the pick-up spool. 11. The system of claim 9, further comprising a deposition monitoring unit for monitoring and controlling the thickness of the deposited first, second and third layers. 1 2. The system of claim 11, wherein the deposition monitoring unit provides a feedback signal to each of the first, second, and third plating units to cause the first, second, and third depositions The thickness of the layer tends to a predetermined thickness of one of the first, second and third layers. 1 3. The system of claim 12, wherein the trend is for maintaining a target ratio of Cu/In+Ga to Ga/In+Ga. 14. A method of forming a precursor stack on a front side of a continuous flexible workpiece using a system comprising a moving component, wherein the front side package 32 200832732 includes a conductive layer, the method comprising: One input end of the system moves and feeds the portion of the continuous flexible workpiece that has not been wound before, and passes through a conditioning unit, an activation surface cleaning unit, a first plating unit, a first cleaning unit, and a first a second plating unit, a second cleaning unit, a third plating unit and a cleaning-drying unit; conditioning the surface of the conductive layer in the conditioning unit to form an activating surface portion, wherein the activating surface portion is substantially Forming an active surface of the continuous flexible workpiece in electroplating; cleaning the activated surface portion of the activated surface cleaning unit; forming a precursor on the activated surface portion after the activated surface portion is to be cleaned The stack of materials includes: in the first plating unit, a gold belonging to one of the materials of the Group IB and one of the materials of the first group Electroplating on the activated surface portion to form a first material layer; cleaning the first material layer in the first cleaning unit; in the second plating unit, by belonging to the Dioxon material and the Dioxon Another metal of the material is electroplated onto the first material layer to form a second material layer, wherein the second material layer is different from the first material layer; the second material layer is cleaned in the second cleaning unit; Forming a third material layer in the third plating unit by depositing another metal belonging to the first lanthanum material and the third lanthanum material on the second material layer, 33 200832732, wherein the third material layer Unlike the first and second layers of material, the precursor stack is cleaned and dried in the cleaning-drying unit; the processed portion of the continuous flexible workpiece is picked up and wound at one of the outputs of the system. 15. For the application of the method of item 14 of the patent scope, it further includes: 在清潔與乾燥之前,於一第三清潔單元中清潔該前驅物 堆疊;以及 從一第四沉積單元藉由沉積至少一第VIA族材料而於 該前驅物堆疊上形成一第四材料層,其中所述將該連續可 撓工件移動至並依序通過的單元包括該第三清潔單元與該 第四沉積單元。 1 6.如申請專利範圍第1 5項之方法,更包括於一退火單 元中反應該前驅物堆疊與該第四層,且其中所述將該連續 可撓工件移動至並依序通過的單元包括該退火單元。 17.如申請專利範圍第16項之方法,其中該至少一第 VI族材料包括以下之一 :Se、S與Te。 1 8.如申請專利範圍第1 5項之方法,其中該至少一第 VI族材料包括以下之一 :Se、S與Te。 34 200832732 19·如申請專利範圍第15項之方法,其 權族材料係藉由將該前驅物堆叠浸至〜:中該至少-第 穑,螻累劣、—v a 遷水溶液中而沉 、v墨水洛液包含該呈少,第VIA族特 姑鉱i麻·^ r , 科之奈米粒子, 、藉由使該至少一第VIA族材料電鍍至 沉積。, 乂别驅物堆疊上而 20·如申請專利範圍第14項之方法, 乾燥之後,於一退火單元中#^ 括·在β >承與 L火早凡中使該输驅物堆疊與至少一第 VIA族材料反應;且其中所述將該連浐 依序通過的單元包括該退火單元。$ '工件移動至並 1 必吞月巴 以下之一:於一處理溶液中電處理該 、 吁守續’以及在該 續可撓工件之該前表面上沉積一種θ 稹禋日日層並酸洗該連續可Cleaning the precursor stack in a third cleaning unit prior to cleaning and drying; and forming a fourth material layer on the precursor stack from a fourth deposition unit by depositing at least one Group VIA material, wherein The unit that moves the continuous flexible workpiece to and sequentially passes includes the third cleaning unit and the fourth deposition unit. 1 6. The method of claim 15, further comprising reacting the precursor stack with the fourth layer in an annealing unit, and wherein the unit that moves the continuous flexible workpiece to and sequentially passes The annealing unit is included. 17. The method of claim 16, wherein the at least one Group VI material comprises one of: Se, S, and Te. The method of claim 15, wherein the at least one Group VI material comprises one of: Se, S and Te. 34. The method of claim 15 wherein the method of claiming the precursor material is by immersing the precursor in a stack of ~: at least - 穑, 蝼 、, - va The ink solution contains the small amount of the VIA group of the genus, the nanoparticle of the group, by electroplating the at least one material of the group VIA to the deposition. , discriminate the drive stack and 20 · as in the method of claim 14 of the patent scope, after drying, in an annealing unit #^·································· At least one Group VIA material reacts; and wherein the unit through which the hydrazine is passed sequentially comprises the annealing unit. $ 'Working the workpiece to one of the following: one of the following: the electric treatment in a treatment solution, the continuation of the continuation of the workpiece, and the deposition of a θ 稹禋 日 layer on the front surface of the continuous flexible workpiece Wash the continuous 工件之該前表面, 理係藉由相對於一 中之一而施行。 藉以以形成該活化 電極來施加陰籬子 部分,其中所述電處 型與陽離子型極化其 22·如申請專利範圍第14項之方法 沉積一種晶層在該接觸層上。 其中所述調理包括 23 ·如申請專利範圍第1 4項之方法 其中該弟ΙΒ族材 35 200832732 中之 料包括Cu,而其中該第ΠΙΑ族材料包括Ga與In其 成該 第六 第二The front surface of the workpiece is governed by one of the first. The barrier portion is thereby applied to form the activated electrode, wherein the electrical pattern is polarized with the cationic type. 22. The method of claim 14 deposits a seed layer on the contact layer. Wherein the conditioning comprises: 23, as in the method of claim 14th, wherein the material of the group of materials 35 200832732 comprises Cu, and wherein the material of the third group includes Ga and In, the sixth 24.如申請專利範圍第14項之方法,更包括:在形 第二層後形成一第五層,並在形成該第三層後形成一 層,其中該第五層與該第一層相同,而該第六層與該 層相同。24. The method of claim 14, further comprising: forming a fifth layer after forming the second layer, and forming a layer after forming the third layer, wherein the fifth layer is the same as the first layer, And the sixth layer is the same as the layer. 3636
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