TW200809790A - Jitter detecting method and apparatus - Google Patents

Abstract

A jitter detecting apparatus wherein the jitter detection has been improved. This jitter detecting apparatus comprises a receiving circuit (1) that receives a signal; a determining circuit (3) that determines, based on the signal amplitude, a signal part of the received signal to be used for jitter detection; and a jitter detecting circuit (5) that detects, based on the determined signal part, a jitter related to the signal. The determining circuit (3) may include a first threshold value setting circuit that generates a first threshold value; a second threshold value setting circuit that generates a second threshold value; and an interval signal generating circuit that uses the first and second threshold values to generate an interval signal. The jitter detecting circuit (5) may include a signal part detecting circuit that detects the signal part by responding to the received signal in accordance with the terminal signal.

Description

200809790 (1) IX. INSTRUCTIONS The present invention is based on the "Jitter Detection Device" of the Japanese Patent Application No. 2006-180702, filed on June 30, 2006, the entire disclosure of which is incorporated herein by reference. , the text adopted. [Technical Field to Be Described] The disclosed embodiment relates to a method and apparatus for detecting a signal. [Prior Art] Previously, the information recorded on a CD such as a CD or a DVD is disclosed in Japanese Laid-Open Patent Publication No. 2004-295965, and the future reproduction signal is divisible. The length of the mark or blank, by which it is carried out. This is used to read the binarization, for example, for the reproduced signal of the previous DVD as shown in Fig. 1(b), and the slice level is usually the middle of the peak of the signal. Moreover, the detection of the jitter in the digital signal thus detected is also performed using the data detection and clipping level. That is, the truncation level of the peak of the regenerative signal is used, for example, the reproduced signal from the DVD is 'received, and the mark/blank in the dimmed digital signal is detected to check the change of the length. Thereby to measure the jitter. For example, the DVD's presence of a tag/empty test method with a period from 3T to 11T and 14T is read by the party of the move, and the read from the disc number detection data is the same as that of the disc. In the middle of the second degree, the situation is white. At (2) (2) 200809790, the T system is equal to one cycle of the clock used by the DVD. Thus, by measuring the jitter in the signal from the optical disc, the quality of the optical disc itself can be checked to adjust the optical axis of the light beam of the optical pickup. Recently, as a compact disc, new disc specifications such as HD (High-Definition) DVD have appeared. In this type of disc, the recording density is higher than that of the previous DVD. For example, in HD DVD, the Eight to Twelve Modulation Code is used, and the reproduced signal from it is the waveform shown in Figure 1 (a). Comparing with the reproduced signal from the previous EFM-encoded DVD of Fig. 1(b), there are several components with a small amplitude of the signal, and the component with the smallest amplitude has a peak near the clipping level. This is because, once the recording density is increased, the inter-code interference causes the signal amplitude to decrease, and if the line density is increased, the signal amplitude is lowered. For example, in the length of the shortest 2T mark or blank, the peak amplitude P of the signal amplitude is near the cut level. When reading data from a disc that produces such a regenerative signal, in the same dichotomy method as the previous use of the clipping level, even a slight noise near the clipping level will cause a recognition error. Therefore, stable data detection is difficult. Therefore, in the HD DVD specification, as a data reading method, a PRML (Partial Response and Maximum Likelihood) signal processing method is used. Along with this, the method of evaluating the reproduced signal is not based on jitter, but is evaluated by SbER (Simulated Bit Error Rate) and PRSNR (Partial Response Signal to Noise). However, this SbER and PRSNR evaluation method requires more samples than jitter 200809790 (3), which is less immediate than the previous method of using the clipping level. Therefore, in the production site of a disc-related product, although an adjustment operation such as an optical axis adjustment step of the optical pickup is required, in this type of adjustment operation, each detail adjustment requires a certain number of samples in the evaluation of SbER or PRSNR. Therefore, the adjustment will be quite time consuming and have such problems. Moreover, this causes a problem of low production efficiency of the entire product. SUMMARY OF THE INVENTION The various aspects and embodiments described below are described in terms of devices, circuits, and methods. However, these are merely illustrative examples and are not intended to limit the scope. In the various embodiments, one or more of the above problems may be improved or solved, but other embodiments for other improvements are still available. In one embodiment, the jitter detecting method includes: a step of receiving a signal; and determining, based on the signal amplitude, a determining step of the signal portion used for the jitter detection in the previous signal received; and based on the determined The preamble signal section detects the jitter detection step of the jitter in the preamble. Further, in another embodiment, the shake detecting device includes: a receiving circuit for receiving a signal; and a determining circuit that determines, based on the signal amplitude, that the signal portion of the previous signal used for the jitter detection has been received; The jitter detection circuit detects the correlation jitter of the preamble based on the portion of the previously recorded signal. Except for the embodiments and the side surfaces exemplified above, other embodiments -6-(4)(4)200809790 can be understood by the following description with reference to the drawings. [Embodiment] Hereinafter, various embodiments will be described in detail with reference to the drawings. Fig. 2 is a block diagram showing the configuration of a shake detecting device according to the first embodiment. As shown in the figure, the jitter detecting device includes a receiving circuit 1, a signal portion determining circuit 3, and a jitter detecting circuit 5. In detail, the receiving circuit 1 collects the signal from the information recording medium such as the optical disc or the communication medium such as the communication line or the network, and collects the signal by the input terminal, and performs necessary processing on the received signal (for example, automatic gain control). (AGC) or equalization, etc.), and then output to the output terminal. The signal portion determining circuit 3 has an input terminal for receiving the received signal from the output of the receiving circuit 1, and then the signal portion to be used for the jitter detection in the received signal is based on the signal amplitude. The determination is made and the result of the determination is generated at the output. The jitter detecting circuit 5 is provided with an input terminal for receiving the reception signal supplied from the output terminal of the receiving circuit 1, and an input terminal for receiving the determination result supplied from the output terminal of the signal portion determining circuit 3. As a result, the jitter detecting circuit 5 detects the jitter of the received signal based on the signal portion that has been determined. More specifically, the signal portion determining circuit 3 can generate an upper threshold 値 setting circuit that generates a first threshold 値, that is, an upper threshold 値THU, and a lower threshold 値 setting circuit that generates a second threshold 値, that is, a lower threshold 値THL, using these upper sides and The lower threshold is used to generate a period signal generating circuit for the period signal. At this time, the jitter detecting circuit 5 can be configured to include the signal portion detection 200809790 (5) circuit, and the signal portion is detected by responding to the received signal according to the signal during the above period. According to this embodiment, even if a reproduced signal from a high-density optical disc such as an HD DVD can be accurately detected at a speed sufficient for practical use, the jitter detection can be performed. Moreover, according to this embodiment, the shake detection can be performed with a simple configuration. Here, these upper threshold 値THU and lower threshold 値THL will be described with reference to FIG. 3. For example, if the received signal is a reproduced signal from the HD DVD, the reproduced signal is, for example, the waveform shown in FIG. At this time, if it is assumed that the middle of the peak of the reproduced signal is zero, the reproduced signal contains the signal components cl to cl3 having positive or negative peaks. Here, in the waveform example shown, the component having the largest positive or negative peak 系 is cl, C2, c5, and cl 3 , and then the component having the second lowest peak 系 is C8, and the component having a lower peak 値For c4, cll, then the component with the smallest peak 为 is C3, c6, c7, c9, clO, cl2〇. In this case, if the zero position of the figure is assumed to be the intercept level, Φ is performed. For the components with the smallest peaks, that is, c3, c6, c7, c9, clO, cl2, the probability of recognition error is extremely high. Even these minimum . The probability of recognition error of the components adjacent to the peak component is also high. For example, if the component is considered, the identification of the mark/blank length occurring on the component c3 will directly affect the data length of the adjacent components C2 and C4, and thus the probability of recognition error becomes high. Therefore, in the jitter detecting device of the first embodiment, the jitter detection of the signal is performed based on the signal portion where the probability of occurrence of the recognition error of the mark/blank length is not high. Therefore, it is based on the signal amplitude to identify the portion where the probability of occurrence of the error is high and the identification of the portion not high -8-200809790 (6). As an example, the upper threshold 値THU and the lower threshold 値THL of the above-mentioned zero level are determined, and the signal portion whose recognition error occurrence probability is not high is determined, and then the zero position is regarded as the clipping position as in the previous jitter detection method. This method is used to detect the jitter and to detect the jitter. Thereby, the same high speed as the previous jitter detection method can be achieved.

Here, the setting of the upper threshold 値THU and the lower threshold 値THL will be described in more detail. For example, if these 闳値 are set at the φ dotted line position of Fig. 2, the minimum peak 値 components c3, c6, c7, c9, clO, C12, and other components can be identified at this time. Further, when the upper threshold 设定 is set to the positions THU' and THL' indicated by the one-dot chain line, the signal portion including the minimum peak 値 component and the second lowest peak 値 component c4, cl 1 can be identified, and the other portions. If the reproduced signal from the HD DVD is taken as an example, if the shortest mark/blank length component of 2T is excluded from the determination target, these thresholds are set to be larger than the peak of the 2T component but less than the third longest 3T. The level of the peak of the component, for example, is set to a level such as THU and 0 THL. Moreover, when not only 2T, even 3T or even a longer period such as 5T component _ is also excluded, as long as the threshold 値 is set to be greater than 5T. The peak value is less than the peak value of the 6T component, such as THU' and THL. _ 'This level can be. In this way, the size of the upper threshold 下 and the lower threshold 可 can be set to a certain 値 or a continuously variable manner depending on the periodic component to be excluded from the determination target. Next, referring to Fig. 4 and Fig. 5, the principle of the determination method of the signal portion used in the jitter detection will be described by taking the HD DVD reproduction signal as an example. In addition, in this example, the threshold 値 is set for the purpose of excluding the shortest signal component of 2T -9-(7) (7)200809790. In the figures, the uppermost part shows the encoded signal (the data recorded in the optical disc)', the lower part shows the waveform of the reproduced signal from the optical disc, and then the waveform of the signal associated with the threshold used in the determination. First, (a) of Fig. 4 shows an example in which the reproduced signal is a "clear intersection" which clearly crosses the clipping level from the positive side, and (b-1) and (c-1) indicate that the reproduced signal is positive. An example of a "non-clear intersection" where the side does not clearly intersect with the clipping level. Further, regarding the example of the cross-cutting level from the negative side, the case of the non-clear intersection is shown in (b-2) and (c-2) of Fig. 4 . In addition, the term "clearly intersecting" or "clearly intersecting" refers to the intersection of states in which the probability of occurrence of the above-mentioned identification error is not high; and the term "unclearly intersecting" or "unclearly intersecting" refers to the above-mentioned identification error. The intersection of the state where the probability is high occurs. Referring first to Fig. 4(a), when the components longer than the period of 2T are continuous, for example, from the positive side to the negative side and the cutting level are clearly intersected at the point t2, a clear intersection point cr1 is generated. At this time, the probability of recognition error at the position intersecting the clipping level is low. Here, the "upper threshold crossing" signal is when the regenerative signal changes from zero to the positive side, and rises when it crosses the upper threshold THU; when the regenerative signal changes from the positive side to the zero position When it crosses the threshold, it falls. On the other hand, the "lower threshold crossing" signal is when the regenerative signal changes from zero to the negative side, and rises when crossing the lower threshold THL; when the regenerative signal is from the negative side to the zero level When the change crosses the threshold, it falls. Also, the "upper mask" signal is a signal used to exclude the signal portion with a high probability of identifying an error. The signal generated mainly by the above threshold is used as a reference; Aspects, · Ί -10- (8) 200809790 The underlying mask "signal" is also the signal required to eliminate the signal portion with high probability of identifying errors, mainly the signal generated by the following side thresholds. In the case of the clear intersection of Fig. 4(a), the time t1 at which the reproduced signal crosses the upper threshold 经过 passes a certain time, for example, at t3 in the 2T time, and intersects with the lower threshold at the opposite side. At this time, since the probability of recognition error is not high, the masks on the upper side and the lower side are not generated, so it stays in Low. On the other hand, as shown in Fig. 4 (b-Ι), when one 2T component is followed by a periodic component longer than 2T, the regenerative signal passes through the upper threshold from the positive side, but intersects with the clipping level. After that, it is folded back in the vicinity without reaching the lower threshold, but returns to the positive side, and such unclear intersection occurs. That is, the unclear intersection point cr2 is continuous. At this time, since it enters the clipping level from the positive side and goes out from the positive side, it is called a "regressive type" of non-clear intersection. At this time, the lower threshold 値 cross signal does not become High from the time when the upper threshold 値 cross signal is Low to 2T. At this time, • The part where the recognition error occurs is high, and the clipping level is entered from the upper side, so the upper mask signal will rise to High and the mask signal starts. Thus, in the 2T time, the lower threshold is crossed by the lower threshold. If the fork signal becomes High, the clear intersection of (a) and the unclear intersection of (b-1) can be distinguished. Further, although Fig. 4 (b-1) shows the case of one 2T component, the same is true when the 2T component is an odd number of consecutive cases. On the other hand, as shown in (c-1) of FIG. 4, when two 2T components are connected after the periodic component longer than 2T, the reproduced signal passes through the upper threshold from the positive side -11 - 200809790 (9). This unclear intersection occurs after the change in the vicinity of the truncation level and the intersection of the truncated level and the lower threshold. That is, the non-clear intersections cr4, cr5, cr6, and cr7 are continuous. At this time, since it enters the clipping level from the positive side and exits from the negative side, it is called a non-regressive type of non-regressive intersection. At this time, when the upper threshold 値 cross signal is Low and the time is 2T, the lower threshold 値 cross signal does not become High, but after 2T time elapses, it becomes High. At this time, a portion where the recognition error occurs φ is high, and the clipping direction is entered from the upper side, so the upper mask signal is raised to High and the mask signal is started. Thus, in the above 2T time, by whether the lower threshold 値 cross signal becomes High, the clear intersection of (a) and the unclear intersection of (c-1) can be distinguished. In the case of Figure 4 (b-1) and (c-1), the mask signal that was once started will continue until the next clear crossover as shown in Figure 4 (a) occurs, and then in the cut and cut Before the level crossing, for example, the time point (tl of Fig. 4(a)) that intersects with the upper threshold is ended. Thereby, all of the periodic components affected by the recognition error occurring in the shortest periodic component can be excluded from the jitter determination target. Specifically, in the case of Fig. 4 (c-1 - ), after two 2T period components, there is a period longer than 2T, which is divided into cx, so that a clear cross occurs at t5 because of the period component cx. Point cr8. However, the clear crossover here is from the negative side to the positive side, and the polarity of the regenerative signal before the start of the mask is reversed, so if the upper mask ends at t4 in front of t5, the mask is masked. The result of the regenerative signal is that the state changes after the t4 point, so the clipping level due to the mask occurs. This is caused by the clipping of the mask. -12- 200809790 (10) Fork, the detection of jitter should not occur. Therefore, the mask is to be ended in the case where the threshold 値 crossing point on the same polarity side, that is, the positive side, in Fig. 4 (c-1), for example, at t6 or t7. However, the condition is that a clear crossover as shown in Fig. 4(a) occurs in the positive side of t7. Further, although Fig. 4 (c-1) shows the case where the 2T component is continuous for two, the same applies to the case where even two or more consecutive ones are continuous. Then, (d) of Fig. 5 shows that when the non-regressive non-clear intersection is continuous, that is, the 2T component is two consecutive and then one component longer than 2T, and then two consecutive. The case of the 2T component. At this time, unlike the case of Fig. 4 (c-Ι), the continuous four unclear intersections crlO~ci: 1 3, and then the consecutive four unclear intersections cr 1 4~cr 1 7 There is no clear intersection, and at the t10 after the clear intersection of the latter, a clear intersection cll8 occurs. At this time, when the upper mask signal becomes High at t8, the same clear intersection as in Fig. 4(a) occurs at 110, and therefore remains high until t9 immediately before it. • In addition, although not shown in the figure, when the regression type is unclear and continuous, it can be handled in the same way as in Fig. 4 (b-1). Next, a jitter detecting apparatus according to an embodiment of the present invention will be described with reference to Fig. 6 in which the principle of determination described in Figs. 4 and 5 is embodied. As shown, the jitter detecting device is provided with an automatic gain control circuit (AGC) 10 and an equalizer (EQ) 1 2 as objects corresponding to the receiving circuit 1 of FIG. 2, as corresponding to the jitter detection. The circuit 5 is provided with a dimming circuit 50, a latch 52, and a jitter judging circuit 54, and is provided with a mask signal generator 30 as a material corresponding to the signal portion judging circuit 3. In the jitter detecting device of the present embodiment, the circuit portion including the AGC 10, the dimming circuit 50, and the jitter determining circuit 54 is included in the jitter detecting device of the present embodiment. It is a circuit that uses the clipping level to perform jitter detection as in the previous DVD. On the other hand, the HD DVD is a circuit for uniquely equalizing the reproduced signal from the HD DVD, and the latch 52 is a circuit for extracting the signal portion, and then the mask signal generator 30 is A circuit for determining the signal required for the portion of the signal is generated; the presence of these circuits 1, 2, 5, 3 0 is different from previous jitter detecting devices. In detail, the AGC10 controls the peaks of the reproduced signals to be constant by performing automatic gain control on the reproduced signals from the HD DVD. The equalizer 12 that receives the signal from the AGC 10 processes the reproduced signal from the HD DVD to match the PR (partial response) characteristic used in the PRML signal processing technique, that is, the characteristic of the specification. Is a circuit that is well known in the art. Then, the equalized regenerative signal output from the equalizer 12 is binarized by using a binary circuit to use the zero position as a truncation level. The latch 52 receives the resulting dimming signal SB and then latches the dimming signal in response to the mask signal MST from the mask signal generator 30. That is, the latch 52 extracts the signal portion during the absence of the mask signal by ignoring the binary signal portion during the presence of the mask signal. Then, the jitter determination circuit 54 performs jitter determination based on the previously extracted signal portion, i.e., the latch output SL, by a conventionally known method. As a method of judging jitter, it is known to measure the length of each mark/space in the binary signal to determine the pulse width measurement method of the change, and to measure the edge/synchronization of the mark/blank. The phase difference of the edge of the pulse is used to determine the data for the clock method. Next, the details of the mask signal generator 30 will be described with reference to FIG. 7. The generator 30 includes an upper threshold crossing detection unit 3 00, a lower threshold crossing detection unit 302, an upper mask generating unit 304, and a lower portion. The side mask generating portion 306 and the mask generating portion 308. In detail, the upper threshold crossing detection unit 300 includes a binary circuit 3000 and an upper threshold setting circuit 3002 for receiving an HD DVD reproduction signal (see FIG. 7(b)) of the output of the AGC 10. The lower threshold/intersection detecting unit 302 includes a binary circuit 3 020 and a lower threshold setting circuit 3022 that also receive the output from the AGC 10. As shown in FIGS. 4 and 5, the binary circuit 3 000 performs the binarization processing on the AGC output using the upper threshold THU received from the upper threshold setting circuit 3002, and then the result is as shown in FIG. Note that when the upper threshold 値 cross signal CTHU (Fig. 7 ((〇) is output), the cross signal CTHU will become High when crossing the upper threshold from the zero side on the positive side, and then cross in the opposite direction. On the other hand, the binary circuit 3 020 uses the lower threshold 値THL received from the lower threshold setting circuit 3 022 to perform the binarization processing on the AGC output, and then uses the result as the lower threshold 値 cross signal. The CTHL (Fig. 7(d)) is output. The cross signal CTHL becomes High when it crosses the lower threshold from the zero side on the negative side, and then becomes Low when it crosses in the opposite direction. In the present embodiment, the upper threshold 下 and the lower threshold 设定 are set to exclude at least the shortest 2T component. However, it is also possible to set at least a longer period component, or -15-200809790 (13) Make the threshold The upper mask generating unit 304 is provided with a delay circuit 3040, a flip-flop (F/F) 3 042, and an OR gate 3 044. Similarly, the lower mask occurs. The portion 306 is provided with a delay circuit 3060, a flip-flop (F/F) 3062, and an OR gate 3 064. In detail, the delay circuits 3 040 and 3 060 respectively accept the upper or lower threshold cross-signal CTHU, The CTHL charges and then delays it for a certain period of time, and then outputs it as a delayed upper threshold crossing signal • signal CTHUD (Fig. 7(e)) or delayed lower threshold threshold cross signal CTHLD (Fig. 7(f)). In this embodiment, Since at least the removed periodic component is the shortest 2T component, the delay amount on these delay circuits is 2T. This delay amount, as illustrated in Figures 4 and 5, is used to identify clear and non-clear intersections. In addition, when the component longer than 2T is removed, it is only necessary to set a delay equal to the maximum component period length to be removed. Next, the OR gate 3044 accepts the lower threshold 値• cross signal CTHL by one input terminal. In the other side The end system accepts the lower mask signal MSL from the F/F3062, and then generates an upper mask disable signal at the output. INHU (Fig. 7(g)). The upper mask disable signal INHU, which is also known from Fig. 4. When the lower threshold 値 cross-signal CTHL becomes High (this means that the regenerative signal is located on the negative side of the lower threshold 値THL), or the lower mask signal MSL becomes High (this is the lower side of the opposite side) The cover is in progress), and the generation of the upper mask signal is prohibited. Therefore, the permission of the generation of the upper mask signal is that the lower threshold crossing signal CTHL is in a Low state, and the lower mask signal MSL is not generated. With the 16-(14) (14)200809790 sample, the OR gate 3064 accepts the upper threshold signal CTHU from one input and the upper mask signal MSU from the F/F 3062 on the other input. A lower mask disable signal INHL is generated at the output (Fig. 7 (h)). The same as the upper mask disable signal INHU, the lower mask disable signal INHL, when the upper threshold cross-signal CTHU becomes High (this means that the regenerative signal is located on the positive side of the upper threshold THU), or the upper side When the mask signal MSU becomes High (this means that the upper side mask on the opposite side is occurring), the generation of the lower mask signal is prohibited. Therefore, the permission of the generation of the lower mask signal is that the upper threshold cross-signal CTHU is in a Low state, and the upper mask signal MSU is not generated. Next, the F/F 3042 receives the upper mask disable signal INHU at the data input terminal, and receives the delayed upper threshold cross-signal CTHUD at the inverted clock terminal, and then reverses the signal of the clock terminal to a high level. If the signal existing in the data input is reversed, it is generated on the Q* ("" indicates the reverse) terminal, and it is regarded as the upper mask signal MSU (Fig. 7 (i)). That is, the upper side mask signal is delayed when the upper threshold threshold cross signal CTHUD has been reduced to "time" when the upper mask disable signal INHU is Low, the upper mask signal MSU is generated. Similarly, F/F3062, The lower side mask disable signal INHL is received at the data input terminal, the lower threshold threshold cross signal CTHLD is received at the inverted clock terminal, and the lower mask signal is generated at the Q* (* indicates the reverse-) terminal. MSL (Fig. 7 (j)). The lower side mask signal is delayed when the lower side threshold cross signal CTHLD has been reduced to ~ when 'down side mask -17- 200809790 (15) disable signal INHU is Low The lower mask signal MSL is generated. The next mask generating unit 3 08 is provided with an OR gate 3 080 and a timing adjustment circuit 3082. The OR gate 3 080 receives the upper mask signal MSU and the lower mask signal MSL 2 Inputs, and then at their output, generate a mask signal MS (Βί 7 (k)) in their logical sum. This mask signal is delayed by 2T for these regenerative signals that should be masked ( Delay caused by delay circuits 3040, 3060), but due to The signal is also delayed on the equalization circuit. Therefore, in order to integrate the timing of the dimming signal SB and the mask signal MS, in the timing adjustment circuit 3082, the mask signal MS is delayed when it advances over the dimming signal SB. To generate the time-adjusted mask signal MST. These signals are supplied to the latch 52. In addition, when the mask signal MS is later than the binary signal SB, the change is designed to be in the binary circuit. The delay circuit may be inserted between the 50 and the latch circuit 52. Next, the operation of the portion of the mask signal generator 30 of Fig. 6 will be described in detail with reference to Fig. 7. The HD DVD reproduction signal shown in the timing chart of Fig. 7 In the middle, there are clear intersections with clear intersection 1 and clear intersection 2, and also include: regression non-clear intersection 1, non-regressive non-clear intersection, regression non-clear intersection 2; explain them. First, from the negative side In the case of a clear intersection 1 on the positive side, although it is not necessary to cause the lower mask to occur, at this time, when the lower threshold threshold cross signal CTHLD is delayed at the time of til, the lower mask prohibits the signal. INHL High (the upper threshold 値 cross signal CTHU is High when tl 1 is down) (except that the upper mask signal MSU is Low) }, and ban -18- 200809790 (16) stops the generation of the mask, Therefore, the lower mask is kept at Low. In the case of clear intersection 2, although the upper mask is generated, it is not generated in the same way. Then, the case of the regression type non-clear intersection 1 is Starting from the negative side, the underside mask MSL must be generated. At this time, when the delay lower threshold threshold cross signal CTHLD is set to fall at 112 o'clock, since the lower mask prohibition signal INHL is Low (the upper threshold threshold cross signal CTHU is Low when the t1 is depressed), the mask is prohibited, so the lower The side mask MSL becomes High and the mask signal begins. Then, when the delay of the lower threshold 値 cross signal CTHLD is delayed at the time t1, the lower side mask is prohibited because the lower mask disable signal INHL is High (the upper threshold 値 cross signal CTHU is high when tl3 is high). The mask MSL becomes Low and the mask signal ends. Then, in the case of non-regressive non-clear crossover, since the front side starts from the front side, it is necessary to cause the mask on the upper side to occur. That is, at the time t1 at 4 o'clock, when the delay upper side cross signal CTHUD is delayed, since the upper side mask prohibition signal INHU is Low (the lower side threshold cross signal CTHL is Low when the ttl is depressed), the mask is prohibited. Occurs, so the upper mask MSU becomes High and starts. Thereafter, although the next fall of the delayed upper threshold cross-signal CTHUD occurs at time t16, at this time, the mask is prohibited because the upper mask disable signal INHU is High (the lower threshold cross-signal CTHL is High at t16). Occurs, so the upper mask MSU becomes Low and the upper mask ends. The final regression type unclear intersection 2, although the opposite of the regression type non-clear intersection 1 originally described, is the opposite polarity, but the same action is used to cause the upper mask to occur. In addition, -19- 200809790 (17), at the time of tl5, the delay of the lower threshold 値 cross-signal CTHLD will fall. At this time, the lower mask prohibition signal INHL will become High. The reason is that at the time U5, the upper threshold 値 cross signal CTHU is High. Next, an operation when the non-regressive type unclear crossover occurs continuously will be described with reference to Fig. 8 . At this time, the same operation as the non-regressive non-clear intersection time point 114 of Fig. 7 occurs at the time point 20, and the upper mask MSU becomes φ to be High. Further, also in the example of Fig. 8, at the time t21 corresponding to the time t15 of Fig. 7, the delayed lower threshold 値 cross signal CTHLD will fall. At this time, the lower mask prohibition signal INHL will become High. The reason is that, at t21, although the upper threshold 値 cross signal CTHU is Low, unlike the example of Fig. 7, the upper mask signal MSU becomes High. Therefore, the occurrence of the lower mask is prohibited, and the lower mask MSL maintains Low. Subsequent actions are the same as in the case of FIG. Thus, during the occurrence of one of the upper mask and the lower mask, the other mask is not required, so it is prevented from occurring. The mask signal generated as described above is generated by the timing adjustment circuit 3 082 to generate a mask signal MST that has been integrated with the dimming signal SB. The latch 52, which is subjected to the mask signal MST, raises the mask signal into

The state of the dimming signal SB at high is latched and the latched state is output as long as the mask signal stays in the High state, but when the mask signal is subsequently dropped to Low, the latching action is aborted. The signal received at the input is generated directly at the output. This is the latch output SL. By this, the reproduced signal during the existence of the mask can be ignored, and the signal portion of one of the reproduced -20-200809790 (18) signals can be extracted. Next, a method of realizing the mask signal generator 30 of Fig. 6 in software will be described with reference to the flowchart of Fig. 9. Further, in the present flowchart, the variables corresponding to the signals appearing in the circuit of Fig. 6 are used for the convenience of explanation, and the same symbols as those of the signal names are used. First, in step 900, one sample of the HD DVD reproduction signal is taken and A is made. In addition, this flow is executed each time a sample of the HD DVD reproduction signal is acquired. Φ Next, in steps 902 to 908, the upper threshold 値 cross variable CTHU is generated based on the upper threshold 値 variable THU, which is a function corresponding to the upper threshold 値 cross detection unit 3 00 of Fig. 6 . That is, in step 902, as the upper threshold, a certain 値 is set as the variable THU. In step 904, it is determined whether or not the reproduced signal sample A is equal to or greater than the upper threshold TTHU. If YES, then in step 906, the upper threshold 値 cross variable CTHU is set to High, that is, set to "1". When it is NO, it is set to Low in step 908, that is, it is set to "0". 9 Next, in steps 9 1 0 to 9 1 6 , the lower threshold 値 cross variable CTHL is generated based on the lower threshold 値 variable THL, which is a function corresponding to the lower threshold 値 cross detection unit 322 of FIG. 6 . In detail, step 9 1 0., as the lower threshold 値 is to set a certain 値 to the variable THL, then in step 912, it is determined whether the sample A is below THL; if YES, then the lower side is in step 914 The threshold 値 cross signal CTHL is set to "1"; if NO, the variable CTHL is set to "0" in step 916. Next, in steps 91 8 to 926, a delayed upper threshold 値 cross variable CTHUD is generated according to the upper side 阂値 cross variable CTHU, which is -21 (19) (19) 200809790 corresponds to the delay circuit 3 040 of FIG. function. That is, it is determined whether the upper threshold 値THU is the amplitude of the component less than 3T period, and if YES, the upper threshold 値 cross variable is delayed by 2T in step 920, for example, using the clock synchronized with the reproduced signal to delay it by 2T. . Then, if NO, it is determined in step 922 whether or not THU is the amplitude of the periodic component of less than (n-i)T. Wherein η is an integer greater than 5. In step 922, if YES, then in step 924, the upper threshold 値 cross variable is just delayed by (n-1) T; however, if NO, then the variable is just delayed by nT in step 926. The result is then treated as a delay upper threshold 値 cross variable CTHUD. Next, in steps 928 to 936, similarly to steps 9 18 to 926, the delay upper threshold 値 cross variable CTHUD (corresponding to the function of the delay circuit 3 060 of FIG. 6) is set based on the lower threshold 値 cross variable CTHL, but This is performed in the same manner as steps 91 8 to 926, and thus the description thereof is omitted. Here, in the case of the HD DVD reproduction signal, the signal component has a period of 2T to 11 T, 13T, and the minimum amplitude is 2T, the amplitude of 3T, 4T is slightly larger, and the maximum amplitude is reached at 5T, and 6T is lowered. It is to 13T to maintain the maximum amplitude unchanged. However, although the 5T, 6T, and 7T systems are also the signal components of the maximum amplitude, they can be distinguished because they are changed by the delay amount. Therefore, it can be measured by distinguishing 2T to 5T, 2T to 6T, and 2T to 7T. This is also the same as the delay amount set in the delay circuits 3 040 and 3 060 of Fig. 6. Further, in the flow of Fig. 9, the reason why the similar steps are repeatedly set on the upper side and the lower side is because the case where the upper side 阂値 and the lower side threshold 値 have the same absolute 値 is necessary, and it is necessary to consider the case of having different absolute 値. . For example, symmetry -22- 200809790 (20) The error, that is, the middle of the positive peak and the negative peak 値 is not a zero-level regenerative signal, and it is necessary to measure the jitter. Next, in steps 93 8 to 942, the setting of the upper mask is performed, which corresponds to the functions of the OR gate 3044 and the F/F 3 042 of FIG. That is, in step 938, when the upper threshold 値 cross variable CTHUD is delayed from High to Low, it is determined whether the lower threshold 値 cross variable CTHL is "〇" and the lower mask variable MSL is "0", and then In the case of YES, the upper mask variable MSU is set to High in step 940, and the upper mask is started if the upper mask does not occur at this time, and the upper mask is continued if the upper mask has been started. cover. If one is NO in step 930, the upper mask variable _81; is set to 1^* in step 942, and the upper mask is ended if the upper mask has occurred. Similarly, in steps 944 to 948, the setting of the lower mask is performed, which corresponds to the functions of the OR gates 3 064 and F/F3 062 of Fig. 6. Further, the processing system is basically the same as the case of steps 938 to 942, except that in step 944, instead of delaying the transition of the upper threshold 値 crossover CTHUD from High to Low, the delay of the lower threshold 値 crossover CTHLD from the High is delayed. This is determined when Low moves, and if the upper threshold 値 cross variable CTHU is "0" and the condition that the upper mask variable MSU is "0" is satisfied. In this way, the start or end of the underside mask MSL can be achieved. Finally, in step 950, the masking variable MS is generated by finding the logical sum of the upper mask variable M SU and the lower mask variable MS L . This process corresponds to the OR gate 3080 of FIG. The operations described in Figs. 6, 7, and 8 can be realized by repeating the above-described operations for each of the HD DVD reproduced signals -23-200809790 (21). Next, another embodiment of the jitter detecting circuit shown in Fig. 2 will be described with reference to Fig. 1A. In FIG. 6, although the latch circuit 52 is disposed after the decimation circuit 50, in the embodiment of FIG. 10, the wobble determination circuit 54a accepts that the hold circuit 56 is disposed before the dimming circuit 50a. The output from the binary circuit 50a is configured as such. At this time, φ is substituted for the latch circuit 52 of FIG. 6, which is modified in FIG. 10 to hold the output of the equalizer 12 of FIG. 6 and the mask from the mask signal generator 30. Signal MST. At this time, the hold circuit 56 generates the equalizer output when the mask signal MST becomes High in a hold manner at the output end, and then when the mask signal MST becomes Low, the equalizer output is directly generated at the output end. With this configuration, one portion of the HD DVD reproduction signal can also be extracted. The binary circuit 50a and the jitter determination circuit 54a may be the same as those of FIG. Φ Next, still another embodiment of the jitter detecting circuit shown in Fig. 2 will be described with reference to Fig. 1 . This embodiment differs from the jitter of the embodiment of Fig. 6 in that the detection circuit receives the mask signal, not the latch but the jitter decision circuit 5 4 b. The jitter determination operation 5 4 b controls the jitter determination operation by receiving the mask signal 'not extracting a portion of the HDD reproduction signal', and substantially detects the jitter based on a part of the reproduced signal. The embodiment of Fig. 11 can be similarly applied to the jitter detecting circuit shown in Fig. 10, and is configured not to hold the circuit 56 but to determine the mask signal by the jitter determining circuit 504a. -24-200809790 (22) Next, a jitter measuring device including the above-described jitter detecting device according to the embodiment will be described with reference to Fig. 12 . The jitter measuring device includes a display/output unit that receives a jitter determination output from the shake detecting device. The output from the shake detecting device can be made in accordance with the display form of the display/output portion used or the form of the output form. For example, the jitter determination output may be a form in which the width of each mark § 3 / blank length is statistically processed, or the difference between the edge of the mark/blank and the edge of the clock is unified as described above. Wait. The display/output unit outputs the received jitter determination to the output device such as the display device or the printer, and outputs it according to the user's selection. According to this embodiment, the adjustment of the jitter necessary for the production site of the optical disc-related product such as HD DVD can be performed more quickly. Finally, an electronic device including the above-described jitter detecting device according to the first embodiment will be described with reference to Fig. 13 . The electronic device includes: an optical pickup device such as an optical pickup, a disc drive, and a disc player. In addition, if it is a device using PRML signal processing technology, it is included in other types of devices such as communication devices. By providing the above-described embodiment of the shake detecting device in such an electronic device, the dithering process for removing chattering effects and the like in the electronic device can be constructed at a higher speed or simpler circuit. Can be achieved. The above description will be described in detail with respect to several embodiments. However, the jitter detecting device of the above embodiment is not limited to a recording medium such as HD DVD, and other information recording media in the same signal form as HD DVD, such as jitter detection of signals from a disk, can also be used. Be applicable. -25- 200809790 (23) In addition, as described above, the % jitter detection device can be applied to other fields using PRML techniques, such as signals from communication lines or communication media such as networks. The above is a detailed description of various examples and embodiments, but it is possible for the practitioner to make various changes, substitutions, additions, and changes. Therefore, the application of the application in the scope of the patent application and the application for the patent application in the future are all included in the true spirit and scope of any change, replacement, addition, change, etc. In the above-mentioned applications, [a brief description of the drawings] [Fig. 1] (a) shows an example of a waveform of a reproduced signal from an HD DVD, and (b) shows a waveform example of a reproduced signal from a DVD. [Fig. 2] Fig. 2 is a block diagram showing the configuration of the shake detecting device according to the first embodiment. [Fig. 3] _ Fig. 3 shows the relationship between the various signal components contained in the HD DVD reproduction signal and the clipping level, the upper threshold and the lower threshold. [Fig. 4] Fig. 4 is a diagram for explaining the principle of determining the signal portion used for the jitter detection in the HD DVD reproduction signal. (a) is a case of clear intersection, and (b-Ι) and (b_2) are Regression-type non-clear intersections -26- (24) 200809790 (c-1) and (c-2) are non-regressive non-clear intersections. Fig. 5 is a view similar to Fig. 4, and Fig. 5(d) shows a case where the non-regressive non-clear intersection is continuous. Fig. 6 is a block diagram of a shake detecting device according to an embodiment of the present invention, which is based on the principle of determination described in Figs. 4 and 5. φ [Fig. 7] Fig. 7 is a timing chart showing signal waveforms of respective parts in the apparatus of Fig. 6. [Fig. 8] Fig. 8 is a timing chart showing the signal waveforms of the respective portions in the apparatus of Fig. 6 when the non-regressive non-clear intersection shown in Fig. 5 is continuously generated. [Fig. 9] Fig. 9 is a flowchart showing a procedure for realizing the same function as the mask signal generator 30 of Fig. 6. Φ [Fig. 10] Fig. 1 is a block diagram of another embodiment of the jitter detecting circuit in the jitter detecting device shown in Fig. 2. [Fig. 1 1] Fig. 11 is a block diagram showing still another embodiment of the jitter detecting circuit in the jitter detecting device shown in Fig. 2. [Fig. 12] Fig. 1 is a view showing a jitter measuring device including a shake detecting device according to an embodiment. -27- (25) 200809790 [Fig. 13] Fig. 13 is a view showing an electronic apparatus including the shake detecting device of the first embodiment. [Main component symbol description] 1 : Receiver circuit 3 : Signal part decision circuit • 5 : Jitter detection circuit 1〇: Automatic gain control circuit (AGC) 12 : Equalizer (EQ) 3 〇: Mask signal generator 5 0 : binary circuit 52 : latch 54 : jitter determination circuit 5 6 : hold circuit • 50a : binary circuit 5 0b : binary circuit, - 54a : jitter determination circuit 54b : jitter determination circuit 3 00 : Upper threshold crossing detection unit 3〇2: Lower threshold crossing detection unit 3 04 : Upper mask generation unit 306 : Lower mask generation unit 308 : Mask generation unit -28 - 200809790 (26) 30 00 : Dimming circuit 3002: upper side threshold setting circuit 3020: dimming circuit 3022: lower side threshold setting circuit 3040: delay circuit 3042: flip-flop (F/F) 3 044: OR gate • 3060: delay circuit 3062: positive Counter (F/F) 3064 : OR Gate 3 08 0 : OR Smell 3 0 8 2 : Timing adjustment circuit CTHL : Lower threshold 値 cross signal CTHLD : Delay lower threshold 値 cross signal CTHU : Upper threshold 値 cross signal • CTHUD : Delay Upper threshold 値 cross signal INHL : lower side mask forbidden signal. INHU : upper side cover Forbidden signal. MS: Mask signal MSL: Lower mask signal MST: Mask signal MSU: Upper mask signal SB: Dimming signal SL: Latch output -29- 200809790 (27) THL: Lower threshold 値THU: upper threshold

Claims (1)

(1) 200809790 X. Patent application scope 1. A method for detecting a jitter, comprising: a step of receiving a signal; and determining, based on a signal amplitude, a signal portion of the previous signal received for use in the jitter detection a determining step; and a jitter detecting step of detecting a jitter in the preamble based on the portion of the previously recorded signal. #2. The method for detecting a jitter according to the first aspect of the patent application, wherein the method of pre-determining includes: a step of formulating the first and second thresholds; and using the first and second thresholds before, The step of generating a period signal; the pre-jitter detection step includes: a step of detecting a pre-signal portion by responding to the pre-recorded signal according to the pre-recorded signal. ® 3. The method for detecting jitter as described in claim 2, wherein the method is: - the step of generating the signal during the pre-recording process comprises: divising the first threshold of the pre-recorded signal and then generating The steps of the first two-dimensional signal; and the step of secondizing the second threshold of the pre-recorded signal and then generating the second binary signal; and according to the first two-dimensional signal and the second note The processing step of generating a mask signal, and the pre-processing step is that the mask is -31 - (2) 200809790 is used to indicate that the first signal portion of the pre-recorded signal is part of the pre-signal portion. The period in which the second signal portion is present; the step of the pre-recording signal portion includes: using the pre-mask signal to extract the first signal portion of the pre-recording signal from the previous recording signal. 4. The method for detecting jitter as described in claim 3, wherein the method is: • the pre-recorded signal has a maximum amplitude 正 of positive and negative, and the amplitude is less than the maximum amplitude 値1 signal component below amplitude ;; the first threshold 値 is the 値 between the maximum amplitude 前 of the positive record and the positive first amplitude 値; the second threshold 前 is the negative maximum amplitude 値 and negative The 値 between the first amplitude 前. 5. The method for detecting jitter as described in item 4 of the patent application scope, wherein the method is: • The pre-processing step includes: a dichotomy based on one of the related first and second dichroic signals. a signal to determine whether or not the pre-recorded signal is in the first state in the first polarity direction and the first state in which the threshold of one of the first and second thresholds intersects; and the current state in which the first state occurs is based on The other party determines whether or not the signal has occurred. After a certain period of time from the first time after the occurrence of the first state, the pre-recorded signal crosses the other threshold in the first polarity direction. The step of the second state; and -32 - (3) 200809790 The current step of pre-recording the second state does not occur for a certain period of time, and the step of starting the pre-masking signal; and determining whether it has occurred, there are other pre-records a first state occurs, and a third state in which the second state occurs in a certain period of time before the third time from the occurrence of the first state occurs; and when the third state occurs in the current state, Prescript 3 point to make note of the steps before the end of the masking signal. Φ 6. The method for detecting jitter according to claim 5, wherein the method is: the pre-processing step includes: once the pre-masking signal is started, blocking the other before the mask signal ends The signal of the mask is transmitted. A method for measuring jitter, characterized in that the jitter is measured using a jitter detecting method as described in any one of claims 1 to 6. • 8. A type of jitter detecting device, comprising: a receiving circuit for receiving a signal; and a determining circuit for determining based on the amplitude of the signal, and receiving the previous signal. The signal portion used for the jitter detection And the jitter detection circuit detects the correlated jitter of the preamble based on the portion of the previously recorded signal. 9. The jitter detecting device according to claim 8 wherein the device has a pre-determination circuit comprising: -33- 200809790 (4) a first threshold setting circuit for generating a first threshold ;; a second threshold 値 setting circuit of the threshold ;; and a period signal generating circuit for generating a period signal using the first and second thresholds; the pre-jitter detecting circuit includes: a signal portion detecting circuit for the pre-recording signal, according to the pre-record The signal is responded to during the period to detect the portion of the preamble signal. Φ 1 (K) The jitter detecting device according to claim 9, wherein the device is: the signal generating circuit in the pre-recording period includes: the first two-dimensional circuit, the first threshold of the pre-recorded signal is recorded. Dividing and then generating a first dichroic signal; and a second dimming circuit, the pre-recording signal is previously recorded as a second threshold and then generating a second dimming signal; and the processing circuit is based on The first two-dimensional signal and the previous record of the second and second digits are used to generate a mask signal, and the pre-processing circuit is used to indicate that the pre-recorded signal part of the pre-recorded signal is The period of the second signal part other than the 1 signal part; . The pre-signal part detection circuit contains: The extraction circuit uses the pre-mask signal to extract the first signal part from the previous reception signal. 11 · If applying for a patent The jitter detecting device of the first aspect of the invention, wherein the device is a pre-recorded signal having a maximum amplitude of positive and negative, and containing -34-200809790 (5) It is a signal component smaller than the first amplitude 値 of the maximum amplitude 値; the first threshold 前 is a 値 between the maximum amplitude 前 of the positive front and the first amplitude 値 of the positive; the second threshold 前 is preceded by抖动 値 値 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动 抖动1 delay circuit is a first delay dimming signal which is caused by delaying the first dichroic signal of the preamble for a certain period of time; and the second delay circuit is generated to delay the second deuterated signal of the predecessor. a second delayed dimming signal formed at a certain time; and the first logic circuit is connected to receive the first and second dimming signals, and the first and second delay dimming signals. The first and second mask signals are generated, wherein the first logic circuit operates as follows: a. Based on the secondary signal of the first and second binary signals, one of the two signals is used to determine whether the occurrence occurs. The pre-receipt signal is _ the first state in which the threshold 値 of one of the first and second thresholds in the first polarity direction intersects; b. The current first state occurs, based on the other two signals and the first and second delays One of the related delays in the two-in-one signal is to determine whether it has occurred. The pre-recorded signal -35- (for a certain period of time from the first time after the occurrence of the first state) 6) 200809790 This second state intersects with the other threshold in the first polarity direction. c. When the second state is not recorded for a certain period of time, the first and second mask signals are recorded in the first note. One of the related masking signals starts; d. It is determined whether or not the first state has occurred, and the first state occurs from the third time point when the first state occurs, and there is a second note before the second time. The third state in which the state occurs; e. When the third state occurs, the mask signal of the preceding party is terminated at the third time point; and the second logic circuit is based on the first and second mask signals. Generate a pre-mask signal. 1 . The jitter detecting device according to claim 12, wherein the device is: the first logical circuit system includes: #1st mask signal generating logic circuit is received before the first delay 2 Suihua signal, pre-recorded 2nd sputum signal, pre-recorded 2nd mask signal, production - pre-recorded 1st mask signal; . 2nd mask signal generation logic circuit 'received the second delayed dimming signal, In the first note, the first and second mask signals, the first mask signal is generated, and the second mask signal is generated. The first logic circuit is used to make the mask signal before the end of the mask signal. 'Prevent other masking signals from happening. -36 - 200809790 (7) 14. The device as recited in claim 1, wherein the jitter detecting circuit is: the pre-jitter detecting circuit system further comprises: a third circuit of the pre-recording, which is a pre-record The receiving signal is compared with the third threshold 然后 and then demodulated to generate a third bismuth circuit of the third bismuth signal, and the pre-extracting circuit is extracted from the first twentieth signal before the first signal portion. And the φ jitter determination circuit determine the jitter of the pre-recorded signal using the pre-recorded first signal portion extracted from the 3rd dimming signal by the pre-recording circuit. 1 5: The jitter detecting device according to claim 14, wherein the device is: the pre-extracting circuit includes: in the period of the presence of the pre-mask signal, by changing the pre-recording The size of the signal to produce the circuit of the first signal portion of the preamble. • 1 6· The jitter detection device described in the first paragraph of the patent application, wherein the device is, - the second signal portion of the pre-record, contains at least the shortest period component of the pre-recorded signal. 17. The jitter detecting device of claim 8, wherein the device is a preamble signal and is a signal from an information recording medium. An electronic device comprising the shake detecting device according to any one of claims 8 to 17. -37- (8) (8)200809790 19. A jitter detecting apparatus characterized by: ???having: means for receiving a signal; and means for determining, based on a signal amplitude, that a signal portion of the previous signal used for jitter detection has been received; and based on the determined The pre-signal section is used to detect the associated jitter of the preamble. -38-