TW200724709A - A method for forming a mask pattern for ion-implantation - Google Patents

A method for forming a mask pattern for ion-implantation

Info

Publication number
TW200724709A
TW200724709A TW095115221A TW95115221A TW200724709A TW 200724709 A TW200724709 A TW 200724709A TW 095115221 A TW095115221 A TW 095115221A TW 95115221 A TW95115221 A TW 95115221A TW 200724709 A TW200724709 A TW 200724709A
Authority
TW
Taiwan
Prior art keywords
forming
ion
gate line
implantation
mask pattern
Prior art date
Application number
TW095115221A
Other languages
English (en)
Other versions
TWI314586B (en
Inventor
Kyu-Sung Kim
Original Assignee
Hynix Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hynix Semiconductor Inc filed Critical Hynix Semiconductor Inc
Publication of TW200724709A publication Critical patent/TW200724709A/zh
Application granted granted Critical
Publication of TWI314586B publication Critical patent/TWI314586B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/16—Coating processes; Apparatus therefor
    • G03F7/167—Coating processes; Apparatus therefor from the gas phase, by plasma deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/942—Masking
    • Y10S438/948—Radiation resist
    • Y10S438/95—Multilayer mask including nonradiation sensitive layer
TW095115221A 2005-12-30 2006-04-28 A method for forming a mask pattern for ion-implantation TWI314586B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050135279A KR100685598B1 (ko) 2005-12-30 2005-12-30 이온주입용 마스크 패턴 형성 방법

Publications (2)

Publication Number Publication Date
TW200724709A true TW200724709A (en) 2007-07-01
TWI314586B TWI314586B (en) 2009-09-11

Family

ID=38104307

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095115221A TWI314586B (en) 2005-12-30 2006-04-28 A method for forming a mask pattern for ion-implantation

Country Status (5)

Country Link
US (1) US7767592B2 (zh)
JP (1) JP5137333B2 (zh)
KR (1) KR100685598B1 (zh)
CN (1) CN100487866C (zh)
TW (1) TWI314586B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5181710B2 (ja) * 2008-02-14 2013-04-10 住友電気工業株式会社 半導体装置の製造方法
JP6448903B2 (ja) * 2012-12-31 2019-01-09 ローム アンド ハース エレクトロニック マテリアルズ エルエルシーＲｏｈｍ ａｎｄ Ｈａａｓ Ｅｌｅｃｔｒｏｎｉｃ Ｍａｔｅｒｉａｌｓ ＬＬＣ イオン注入法
JP2014143415A (ja) * 2012-12-31 2014-08-07 Rohm & Haas Electronic Materials Llc イオン注入法
US9754791B2 (en) 2015-02-07 2017-09-05 Applied Materials, Inc. Selective deposition utilizing masks and directional plasma treatment
KR102433947B1 (ko) * 2017-09-29 2022-08-18 도쿄엘렉트론가부시키가이샤 유체로 기판을 코팅하기 위한 방법 및 시스템
CN111063851B (zh) * 2019-12-30 2022-02-18 江苏厚生新能源科技有限公司 一种图案分布式涂胶隔膜的制备方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0311626A (ja) * 1989-06-08 1991-01-18 Matsushita Electron Corp 半導体装置の製造方法
JPH03274720A (ja) * 1990-03-23 1991-12-05 Mitsubishi Electric Corp 半導体装置の形成方法
JP2836530B2 (ja) * 1995-04-27 1998-12-14 日本電気株式会社 半導体装置の製造方法
JPH08316120A (ja) * 1995-05-16 1996-11-29 Matsushita Electron Corp レジスト塗布方法
US5879863A (en) * 1997-01-22 1999-03-09 Kabushiki Kaisha Toshiba Pattern forming method
US6096656A (en) * 1999-06-24 2000-08-01 Sandia Corporation Formation of microchannels from low-temperature plasma-deposited silicon oxynitride
US6251569B1 (en) * 1999-08-13 2001-06-26 International Business Machines Corporation Forming a pattern of a negative photoresist
JP4095763B2 (ja) 2000-09-06 2008-06-04 株式会社ルネサステクノロジ 半導体装置及びその製造方法
US6326269B1 (en) * 2000-12-08 2001-12-04 Macronix International Co., Ltd. Method of fabricating self-aligned multilevel mask ROM
KR100393118B1 (ko) * 2001-02-22 2003-07-31 현만석 반도체 소자의 레지스트 패턴 형성 방법 및 이 방법에서 사용되는 반도체 웨이퍼 세척액
US6569778B2 (en) * 2001-06-28 2003-05-27 Hynix Semiconductor Inc. Method for forming fine pattern in semiconductor device
JP2004071996A (ja) 2002-08-09 2004-03-04 Hitachi Ltd 半導体集積回路装置の製造方法
KR100538884B1 (ko) * 2004-03-30 2005-12-23 주식회사 하이닉스반도체 플래쉬 메모리소자의 제조방법
CN100541327C (zh) * 2004-05-21 2009-09-16 明德国际仓储贸易(上海)有限公司 液晶显示元件散乱层光阻组成物
KR100680402B1 (ko) * 2004-05-22 2007-02-08 주식회사 하이닉스반도체 이멀젼 리소그래피용 액체 조성물 및 이를 이용한리소그래피 방법
US20050260528A1 (en) * 2004-05-22 2005-11-24 Hynix Semiconductor Inc. Liquid composition for immersion lithography and lithography method using the same

Also Published As

Publication number Publication date
TWI314586B (en) 2009-09-11
JP2007184515A (ja) 2007-07-19
CN100487866C (zh) 2009-05-13
JP5137333B2 (ja) 2013-02-06
US20070152305A1 (en) 2007-07-05
KR100685598B1 (ko) 2007-02-22
US7767592B2 (en) 2010-08-03
CN1992170A (zh) 2007-07-04

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees