TW200723444A - Semiconductor device and process for producing the same - Google Patents
Semiconductor device and process for producing the sameInfo
- Publication number
- TW200723444A TW200723444A TW095111201A TW95111201A TW200723444A TW 200723444 A TW200723444 A TW 200723444A TW 095111201 A TW095111201 A TW 095111201A TW 95111201 A TW95111201 A TW 95111201A TW 200723444 A TW200723444 A TW 200723444A
- Authority
- TW
- Taiwan
- Prior art keywords
- insulating film
- electrically conductive
- conductive metal
- metal layer
- film
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000000034 method Methods 0.000 title abstract 3
- 239000002184 metal Substances 0.000 abstract 10
- 238000009792 diffusion process Methods 0.000 abstract 4
- 230000004888 barrier function Effects 0.000 abstract 3
- 230000003449 preventive effect Effects 0.000 abstract 3
- 239000000758 substrate Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76883—Post-treatment or after-treatment of the conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005112545A JP3904578B2 (ja) | 2005-04-08 | 2005-04-08 | 半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200723444A true TW200723444A (en) | 2007-06-16 |
Family
ID=37114936
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095111201A TW200723444A (en) | 2005-04-08 | 2006-03-30 | Semiconductor device and process for producing the same |
Country Status (5)
Country | Link |
---|---|
US (1) | US20090045519A1 (zh) |
JP (1) | JP3904578B2 (zh) |
KR (1) | KR20070112469A (zh) |
TW (1) | TW200723444A (zh) |
WO (1) | WO2006112202A1 (zh) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5015696B2 (ja) * | 2006-09-04 | 2012-08-29 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法及び製造装置 |
US20090200668A1 (en) * | 2008-02-07 | 2009-08-13 | International Business Machines Corporation | Interconnect structure with high leakage resistance |
JP2009289869A (ja) * | 2008-05-28 | 2009-12-10 | Shinko Electric Ind Co Ltd | 半導体基板の製造方法および半導体基板 |
ES2633297T3 (es) | 2008-05-29 | 2017-09-20 | Galaxy Biotech, Llc | Anticuerpos monoclonales al factor básico de crecimiento de fibroblastos |
US7803704B2 (en) * | 2008-08-22 | 2010-09-28 | Chartered Semiconductor Manufacturing, Ltd. | Reliable interconnects |
US9177917B2 (en) * | 2010-08-20 | 2015-11-03 | Micron Technology, Inc. | Semiconductor constructions |
US9048170B2 (en) * | 2010-11-09 | 2015-06-02 | Soraa Laser Diode, Inc. | Method of fabricating optical devices using laser treatment |
US8669176B1 (en) * | 2012-08-28 | 2014-03-11 | Globalfoundries Inc. | BEOL integration scheme for copper CMP to prevent dendrite formation |
US10596782B2 (en) * | 2015-06-04 | 2020-03-24 | Sumitomo Electric Industries, Ltd. | Substrate for printed circuit board and printed circuit board |
JP2017139375A (ja) * | 2016-02-04 | 2017-08-10 | ルネサスエレクトロニクス株式会社 | 半導体装置の製造方法 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR0138305B1 (ko) * | 1994-11-30 | 1998-06-01 | 김광호 | 반도체소자 배선형성방법 |
JPH11111843A (ja) * | 1997-10-01 | 1999-04-23 | Hitachi Ltd | 半導体集積回路装置およびその製造方法 |
JP2005072238A (ja) * | 2003-08-25 | 2005-03-17 | Matsushita Electric Ind Co Ltd | 半導体装置の製造方法 |
JP2005079434A (ja) * | 2003-09-02 | 2005-03-24 | Matsushita Electric Ind Co Ltd | 半導体装置およびその製造方法 |
-
2005
- 2005-04-08 JP JP2005112545A patent/JP3904578B2/ja not_active Expired - Fee Related
-
2006
- 2006-03-09 WO PCT/JP2006/304622 patent/WO2006112202A1/ja active Application Filing
- 2006-03-09 KR KR1020077022947A patent/KR20070112469A/ko not_active Application Discontinuation
- 2006-03-09 US US11/887,946 patent/US20090045519A1/en not_active Abandoned
- 2006-03-30 TW TW095111201A patent/TW200723444A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
JP2006294815A (ja) | 2006-10-26 |
US20090045519A1 (en) | 2009-02-19 |
JP3904578B2 (ja) | 2007-04-11 |
WO2006112202A1 (ja) | 2006-10-26 |
KR20070112469A (ko) | 2007-11-26 |
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