TW200717642A - Method and system for line-dimension control of an etch process - Google Patents

Method and system for line-dimension control of an etch process

Info

Publication number
TW200717642A
TW200717642A TW095115641A TW95115641A TW200717642A TW 200717642 A TW200717642 A TW 200717642A TW 095115641 A TW095115641 A TW 095115641A TW 95115641 A TW95115641 A TW 95115641A TW 200717642 A TW200717642 A TW 200717642A
Authority
TW
Taiwan
Prior art keywords
layer
mask
feature
dimension
plasma etch
Prior art date
Application number
TW095115641A
Other languages
English (en)
Chinese (zh)
Inventor
Gary Walter Behm
Teresita Quitua Magtoto
Rajiv M Ranade
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of TW200717642A publication Critical patent/TW200717642A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H01J37/32082—Radio frequency generated discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
TW095115641A 2005-05-10 2006-05-02 Method and system for line-dimension control of an etch process TW200717642A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/125,696 US7291285B2 (en) 2005-05-10 2005-05-10 Method and system for line-dimension control of an etch process

Publications (1)

Publication Number Publication Date
TW200717642A true TW200717642A (en) 2007-05-01

Family

ID=37397042

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095115641A TW200717642A (en) 2005-05-10 2006-05-02 Method and system for line-dimension control of an etch process

Country Status (5)

Country Link
US (2) US7291285B2 (enExample)
JP (1) JP5254783B2 (enExample)
CN (1) CN101361073B (enExample)
TW (1) TW200717642A (enExample)
WO (1) WO2006121563A2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7774082B2 (en) * 2006-10-05 2010-08-10 Tokyo Electron Limited Substrate processing method and storage medium having program stored therein
JP2009239030A (ja) * 2008-03-27 2009-10-15 Toshiba Corp 半導体装置の製造方法
US8229588B2 (en) * 2009-03-03 2012-07-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method and system for tuning advanced process control parameters
JP2011222726A (ja) * 2010-04-08 2011-11-04 Elpida Memory Inc 半導体装置の製造方法、ウェハ処理システム及びプログラム
CN104716033A (zh) * 2015-03-20 2015-06-17 上海华力微电子有限公司 改善刻蚀腔体养护后多晶硅栅极关键尺寸稳定性的方法
CN107958838B (zh) * 2017-11-08 2020-08-04 上海华力微电子有限公司 一种根据射频时数改善一体化刻蚀工艺面内均匀性的方法
DE102019120765B4 (de) * 2018-09-27 2024-02-22 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum bilden eines halbleiterbauelements
CN116169063A (zh) * 2023-02-24 2023-05-26 上海华力微电子有限公司 改善刻蚀工艺面内均匀性的方法及执行其的刻蚀设备
CN119873729A (zh) * 2024-12-18 2025-04-25 安徽华鑫微纳集成电路有限公司 一种基于离子束修整技术的控制mems空腔结构硅厚的方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6645677B1 (en) * 2000-09-18 2003-11-11 Micronic Laser Systems Ab Dual layer reticle blank and manufacturing process
US6368982B1 (en) * 2000-11-15 2002-04-09 Advanced Micro Devices, Inc. Pattern reduction by trimming a plurality of layers of different handmask materials
US20020142252A1 (en) * 2001-03-29 2002-10-03 International Business Machines Corporation Method for polysilicon conductor (PC) Trimming for shrinking critical dimension and isolated-nested offset correction
US6864041B2 (en) * 2001-05-02 2005-03-08 International Business Machines Corporation Gate linewidth tailoring and critical dimension control for sub-100 nm devices using plasma etching
TWI306269B (enExample) * 2001-06-27 2009-02-11 Tokyo Electron Ltd
JP2003077900A (ja) * 2001-09-06 2003-03-14 Hitachi Ltd 半導体装置の製造方法
WO2003025689A2 (en) * 2001-09-14 2003-03-27 Ibex Process Technology, Inc. Large scale process control by driving factor identification
US6960416B2 (en) * 2002-03-01 2005-11-01 Applied Materials, Inc. Method and apparatus for controlling etch processes during fabrication of semiconductor devices
KR101025527B1 (ko) * 2002-09-30 2011-04-04 도쿄엘렉트론가부시키가이샤 반도체 제조 프로세스의 모니터링 및 제어를 위한 방법 및장치
US7010374B2 (en) * 2003-03-04 2006-03-07 Hitachi High-Technologies Corporation Method for controlling semiconductor processing apparatus
JP4171380B2 (ja) * 2003-09-05 2008-10-22 株式会社日立ハイテクノロジーズ エッチング装置およびエッチング方法
US6893975B1 (en) * 2004-03-31 2005-05-17 Tokyo Electron Limited System and method for etching a mask
US6960775B1 (en) * 2004-04-13 2005-11-01 Asml Netherlands B.V. Lithographic apparatus, device manufacturing method and device manufactured thereby
US7172969B2 (en) * 2004-08-26 2007-02-06 Tokyo Electron Limited Method and system for etching a film stack
US7301645B2 (en) * 2004-08-31 2007-11-27 Taiwan Semiconductor Manufacturing Co., Ltd. In-situ critical dimension measurement
US7153709B1 (en) * 2004-08-31 2006-12-26 Advanced Micro Devices, Inc. Method and apparatus for calibrating degradable components using process state data
US7209798B2 (en) * 2004-09-20 2007-04-24 Tokyo Electron Limited Iso/nested cascading trim control with model feedback updates
US7142938B2 (en) * 2004-10-13 2006-11-28 Taiwan Semiconductor Manufacturing Co., Ltd. Manufacturing management system and method

Also Published As

Publication number Publication date
US7700378B2 (en) 2010-04-20
JP5254783B2 (ja) 2013-08-07
US20060255010A1 (en) 2006-11-16
CN101361073A (zh) 2009-02-04
WO2006121563A2 (en) 2006-11-16
US20080032428A1 (en) 2008-02-07
US7291285B2 (en) 2007-11-06
WO2006121563A3 (en) 2007-08-23
CN101361073B (zh) 2010-09-22
JP2008541445A (ja) 2008-11-20

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