TW200713526A - Folded frame carrier for MOSFET BGA - Google Patents
Folded frame carrier for MOSFET BGAInfo
- Publication number
- TW200713526A TW200713526A TW095125352A TW95125352A TW200713526A TW 200713526 A TW200713526 A TW 200713526A TW 095125352 A TW095125352 A TW 095125352A TW 95125352 A TW95125352 A TW 95125352A TW 200713526 A TW200713526 A TW 200713526A
- Authority
- TW
- Taiwan
- Prior art keywords
- folded
- dap
- frame carrier
- tips
- edges
- Prior art date
Links
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract 1
- 229910000881 Cu alloy Inorganic materials 0.000 abstract 1
- 239000000969 carrier Substances 0.000 abstract 1
- 229910052802 copper Inorganic materials 0.000 abstract 1
- 239000010949 copper Substances 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
- H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49503—Lead-frames or other flat leads characterised by the die pad
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/179,348 US7402462B2 (en) | 2005-07-12 | 2005-07-12 | Folded frame carrier for MOSFET BGA |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200713526A true TW200713526A (en) | 2007-04-01 |
TWI395301B TWI395301B (zh) | 2013-05-01 |
Family
ID=37637955
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095125352A TWI395301B (zh) | 2005-07-12 | 2006-07-11 | 使用在金屬氧化物半導體場效電晶體球閘陣列封裝技術上之摺疊框架載體 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7402462B2 (zh) |
JP (1) | JP4903205B2 (zh) |
KR (1) | KR101321190B1 (zh) |
CN (1) | CN101553908B (zh) |
DE (1) | DE112006001866T5 (zh) |
TW (1) | TWI395301B (zh) |
WO (1) | WO2007009024A2 (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4977378B2 (ja) * | 2006-02-23 | 2012-07-18 | 山梨日本電気株式会社 | 磁気センサ、回転検出装置及び位置検出装置 |
US20090166826A1 (en) * | 2007-12-27 | 2009-07-02 | Janducayan Omar A | Lead frame die attach paddles with sloped walls and backside grooves suitable for leadless packages |
US7855439B2 (en) * | 2008-08-28 | 2010-12-21 | Fairchild Semiconductor Corporation | Molded ultra thin semiconductor die packages, systems using the same, and methods of making the same |
US7829988B2 (en) * | 2008-09-22 | 2010-11-09 | Fairchild Semiconductor Corporation | Stacking quad pre-molded component packages, systems using the same, and methods of making the same |
US8314499B2 (en) * | 2008-11-14 | 2012-11-20 | Fairchild Semiconductor Corporation | Flexible and stackable semiconductor die packages having thin patterned conductive layers |
JP2015065270A (ja) | 2013-09-25 | 2015-04-09 | ソニー株式会社 | 固体撮像装置およびその製造方法、並びに電子機器 |
JP6210818B2 (ja) * | 2013-09-30 | 2017-10-11 | 三菱電機株式会社 | 半導体装置およびその製造方法 |
CN115939074B (zh) * | 2023-03-13 | 2023-08-22 | 新恒汇电子股份有限公司 | 一种新型双面柔性引线框架结构及其制备工艺 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6133634A (en) | 1998-08-05 | 2000-10-17 | Fairchild Semiconductor Corporation | High performance flip chip package |
JP3851760B2 (ja) * | 2000-07-04 | 2006-11-29 | 松下電器産業株式会社 | 半導体装置、その実装方法、電子回路装置の製造方法及び該製造方法により製造された電子回路装置 |
JP2002270751A (ja) * | 2001-03-13 | 2002-09-20 | Fujitsu Denso Ltd | リード端子、リードフレームおよび電子部品 |
US6893901B2 (en) | 2001-05-14 | 2005-05-17 | Fairchild Semiconductor Corporation | Carrier with metal bumps for semiconductor die packages |
JP3868777B2 (ja) * | 2001-09-11 | 2007-01-17 | 株式会社東芝 | 半導体装置 |
US7122884B2 (en) * | 2002-04-16 | 2006-10-17 | Fairchild Semiconductor Corporation | Robust leaded molded packages and methods for forming the same |
JP3853263B2 (ja) * | 2002-07-08 | 2006-12-06 | Necエレクトロニクス株式会社 | 半導体装置 |
US6860741B2 (en) * | 2002-07-30 | 2005-03-01 | Avx Corporation | Apparatus and methods for retaining and placing electrical components |
WO2004015769A1 (de) * | 2002-08-05 | 2004-02-19 | Osram Opto Semiconductors Gmbh | Verfahren zum herstellen eines elektrischen leiterrahmens, verfahren zum herstellen eines oberflächenmontierbaren halbleiterbauelements und leiterrahmenstreifen |
JP3757212B2 (ja) * | 2003-03-14 | 2006-03-22 | 東光株式会社 | 半導体装置 |
JP4248928B2 (ja) * | 2003-05-13 | 2009-04-02 | ローム株式会社 | 半導体チップの製造方法、半導体装置の製造方法、半導体チップ、および半導体装置 |
TWI274406B (en) * | 2003-07-16 | 2007-02-21 | Freescale Semiconductor Inc | Dual gauge leadframe |
TWI224841B (en) * | 2003-08-20 | 2004-12-01 | Chipmos Technologies Inc | Film ball grid array package structure of an image sensor |
-
2005
- 2005-07-12 US US11/179,348 patent/US7402462B2/en not_active Expired - Fee Related
-
2006
- 2006-07-11 TW TW095125352A patent/TWI395301B/zh not_active IP Right Cessation
- 2006-07-12 WO PCT/US2006/027167 patent/WO2007009024A2/en active Application Filing
- 2006-07-12 KR KR1020087000712A patent/KR101321190B1/ko not_active IP Right Cessation
- 2006-07-12 DE DE112006001866T patent/DE112006001866T5/de not_active Withdrawn
- 2006-07-12 CN CN2006800332195A patent/CN101553908B/zh not_active Expired - Fee Related
- 2006-07-12 JP JP2008521595A patent/JP4903205B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TWI395301B (zh) | 2013-05-01 |
US7402462B2 (en) | 2008-07-22 |
CN101553908B (zh) | 2012-06-13 |
CN101553908A (zh) | 2009-10-07 |
DE112006001866T5 (de) | 2008-05-15 |
JP2009502026A (ja) | 2009-01-22 |
JP4903205B2 (ja) | 2012-03-28 |
KR101321190B1 (ko) | 2013-10-23 |
WO2007009024A2 (en) | 2007-01-18 |
WO2007009024A3 (en) | 2009-04-09 |
KR20080031270A (ko) | 2008-04-08 |
US20070015316A1 (en) | 2007-01-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |