TW200709570A - Phase locked loop circuit and phase locked loop control method - Google Patents
Phase locked loop circuit and phase locked loop control methodInfo
- Publication number
- TW200709570A TW200709570A TW095127240A TW95127240A TW200709570A TW 200709570 A TW200709570 A TW 200709570A TW 095127240 A TW095127240 A TW 095127240A TW 95127240 A TW95127240 A TW 95127240A TW 200709570 A TW200709570 A TW 200709570A
- Authority
- TW
- Taiwan
- Prior art keywords
- locked loop
- pattern
- phase locked
- input signal
- phase error
- Prior art date
Links
- 238000000034 method Methods 0.000 title abstract 2
- 238000001514 detection method Methods 0.000 abstract 4
- 238000005070 sampling Methods 0.000 abstract 3
- 230000003287 optical effect Effects 0.000 abstract 1
- 238000009827 uniform distribution Methods 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/091—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector using a sampling device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
- H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050079448A KR100750126B1 (ko) | 2005-08-29 | 2005-08-29 | 위상 동기 루프 회로 및 위상 동기 루프 제어 방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200709570A true TW200709570A (en) | 2007-03-01 |
Family
ID=37804084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095127240A TW200709570A (en) | 2005-08-29 | 2006-07-25 | Phase locked loop circuit and phase locked loop control method |
Country Status (5)
Country | Link |
---|---|
US (1) | US20070047690A1 (zh) |
KR (1) | KR100750126B1 (zh) |
CN (1) | CN101233690A (zh) |
TW (1) | TW200709570A (zh) |
WO (1) | WO2007027031A1 (zh) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8553827B2 (en) | 2009-10-20 | 2013-10-08 | Qualcomm Incorporated | ADC-based mixed-mode digital phase-locked loop |
TWI694679B (zh) * | 2019-06-13 | 2020-05-21 | 瑞昱半導體股份有限公司 | 鎖相迴路電路 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20090029490A (ko) * | 2007-09-18 | 2009-03-23 | 삼성전자주식회사 | 위상 고정 방법 및 장치 |
JP2009182779A (ja) * | 2008-01-31 | 2009-08-13 | Nec Electronics Corp | 信号処理方法及び回路 |
US8044688B2 (en) * | 2008-02-28 | 2011-10-25 | Agere Systems Inc. | Systems and methods for determining an out of band signal |
KR101493777B1 (ko) * | 2008-06-11 | 2015-02-17 | 삼성전자주식회사 | 주파수 검출기 및 이를 포함하는 위상 동기 루프 |
KR100942950B1 (ko) | 2008-09-02 | 2010-02-22 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 |
KR101632657B1 (ko) * | 2008-12-01 | 2016-06-23 | 삼성전자주식회사 | 타임투디지털 컨버터 및 디지털 위상 고정 루프 |
JP2011060378A (ja) * | 2009-09-10 | 2011-03-24 | Sony Corp | 位相誤差検出装置、位相誤差検出方法、再生装置 |
JP5356424B2 (ja) * | 2011-01-27 | 2013-12-04 | シャープ株式会社 | 画像表示システム |
US9641113B2 (en) | 2014-02-28 | 2017-05-02 | General Electric Company | System and method for controlling a power generation system based on PLL errors |
KR20230063519A (ko) * | 2021-11-02 | 2023-05-09 | 삼성전자주식회사 | 뉴럴 네트워크 연산 장치 및 방법 |
US11290117B1 (en) | 2021-12-01 | 2022-03-29 | Joseph Kosednar, Jr. | Low-frequency arithmetic multiplying PLL for HDL devices |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1027435A (ja) * | 1996-07-15 | 1998-01-27 | Sony Corp | 再生装置および方法 |
JPH10107623A (ja) * | 1996-10-01 | 1998-04-24 | Sony Corp | 変換装置および方法、並びに、pll演算装置および方法 |
KR100296638B1 (ko) * | 1998-04-24 | 2001-09-06 | 윤종용 | 문자다중방송 수신 데이터 검출회로 및 검출방법 |
ID26232A (id) * | 1998-12-17 | 2000-12-07 | Matsushita Electric Ind Co Ltd | Sirkuit kontrol frekuensi dan kunci fase |
JP3485822B2 (ja) | 1999-01-07 | 2004-01-13 | 松下電器産業株式会社 | デジタルフェーズロックドループ回路 |
JP3337997B2 (ja) * | 1999-03-29 | 2002-10-28 | 松下電器産業株式会社 | 周波数検出型位相同期回路 |
TW519624B (en) * | 2001-05-15 | 2003-02-01 | Media Tek Inc | Circuit for protecting synchronizing pattern |
US7623586B2 (en) * | 2002-10-23 | 2009-11-24 | Panasonic Corporation | Frequency and phase control apparatus and maximum likelihood decoder |
-
2005
- 2005-08-29 KR KR1020050079448A patent/KR100750126B1/ko not_active IP Right Cessation
-
2006
- 2006-07-12 US US11/484,621 patent/US20070047690A1/en not_active Abandoned
- 2006-07-25 TW TW095127240A patent/TW200709570A/zh unknown
- 2006-08-28 CN CNA2006800278434A patent/CN101233690A/zh active Pending
- 2006-08-28 WO PCT/KR2006/003384 patent/WO2007027031A1/en active Application Filing
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8553827B2 (en) | 2009-10-20 | 2013-10-08 | Qualcomm Incorporated | ADC-based mixed-mode digital phase-locked loop |
TWI694679B (zh) * | 2019-06-13 | 2020-05-21 | 瑞昱半導體股份有限公司 | 鎖相迴路電路 |
Also Published As
Publication number | Publication date |
---|---|
KR100750126B1 (ko) | 2007-08-21 |
CN101233690A (zh) | 2008-07-30 |
WO2007027031A1 (en) | 2007-03-08 |
US20070047690A1 (en) | 2007-03-01 |
KR20070027071A (ko) | 2007-03-09 |
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