TW200707667A - Semiconductor device and method for manufacture thereof - Google Patents
Semiconductor device and method for manufacture thereofInfo
- Publication number
- TW200707667A TW200707667A TW095127452A TW95127452A TW200707667A TW 200707667 A TW200707667 A TW 200707667A TW 095127452 A TW095127452 A TW 095127452A TW 95127452 A TW95127452 A TW 95127452A TW 200707667 A TW200707667 A TW 200707667A
- Authority
- TW
- Taiwan
- Prior art keywords
- protrusions
- semiconductor substrate
- recesses
- insulating substrate
- forming
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 6
- 238000000034 method Methods 0.000 title abstract 3
- 238000004519 manufacturing process Methods 0.000 title abstract 2
- 239000000758 substrate Substances 0.000 abstract 7
- 239000011521 glass Substances 0.000 abstract 1
Classifications
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
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- H—ELECTRICITY
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01073—Tantalum [Ta]
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- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
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- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H01L2924/014—Solder alloys
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
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- H—ELECTRICITY
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- H01L2924/049—Nitrides composed of metals from groups of the periodic table
- H01L2924/0495—5th Group
- H01L2924/04953—TaN
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
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- H—ELECTRICITY
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- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
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- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12042—LASER
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- H—ELECTRICITY
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- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Die Bonding (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005219588A JP2007036060A (ja) | 2005-07-28 | 2005-07-28 | 半導体装置及びその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
TW200707667A true TW200707667A (en) | 2007-02-16 |
Family
ID=37433888
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW095127452A TW200707667A (en) | 2005-07-28 | 2006-07-27 | Semiconductor device and method for manufacture thereof |
Country Status (6)
Country | Link |
---|---|
US (1) | US20070096329A1 (zh) |
EP (1) | EP1748485A2 (zh) |
JP (1) | JP2007036060A (zh) |
KR (2) | KR100840502B1 (zh) |
CN (1) | CN100438004C (zh) |
TW (1) | TW200707667A (zh) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8471156B2 (en) | 2009-08-28 | 2013-06-25 | Advanced Semiconductor Engineering, Inc. | Method for forming a via in a substrate and substrate with a via |
US8524602B2 (en) | 2007-08-02 | 2013-09-03 | Advanced Semiconductor Engineering, Inc. | Method for forming vias in a substrate |
US8546255B2 (en) | 2007-08-02 | 2013-10-01 | Advanced Semiconductor Engineering, Inc. | Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate |
US8673774B2 (en) | 2007-12-04 | 2014-03-18 | Advanced Semiconductor Engineering, Inc. | Method for forming a via in a substrate |
TWI681481B (zh) * | 2014-11-19 | 2020-01-01 | 日商琳得科股份有限公司 | 整列裝置及整列方法 |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7855438B2 (en) * | 2006-09-19 | 2010-12-21 | Infineon Technologies Ag | Deep via construction for a semiconductor device |
KR20080061021A (ko) * | 2006-12-27 | 2008-07-02 | 동부일렉트로닉스 주식회사 | 반도체 소자 및 그 제조방법 |
US7645701B2 (en) * | 2007-05-21 | 2010-01-12 | International Business Machines Corporation | Silicon-on-insulator structures for through via in silicon carriers |
US8138616B2 (en) * | 2008-07-07 | 2012-03-20 | Mediatek Inc. | Bond pad structure |
JP2011009645A (ja) | 2009-06-29 | 2011-01-13 | Toshiba Corp | 半導体装置及びその製造方法 |
JP5540813B2 (ja) * | 2010-03-25 | 2014-07-02 | 日本電気株式会社 | 半導体デバイスの製造方法及び積層化半導体デバイスの製造方法 |
KR101806806B1 (ko) * | 2011-12-20 | 2017-12-11 | 삼성전자주식회사 | 전자 소자 탑재용 기판의 제조방법 |
KR102411678B1 (ko) * | 2015-07-28 | 2022-06-21 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법, 및 상기 반도체 장치를 포함하는 반도체 패키지 |
US10105139B2 (en) | 2015-09-23 | 2018-10-23 | Ethicon Llc | Surgical stapler having downstream current-based motor control |
US10373868B2 (en) * | 2016-01-18 | 2019-08-06 | Infineon Technologies Austria Ag | Method of processing a porous conductive structure in connection to an electronic component on a substrate |
US11355421B2 (en) * | 2017-11-14 | 2022-06-07 | Sony Semiconductor Solutions Corporation | Semiconductor device, manufacturing method for semiconductor, and imaging unit |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3245329B2 (ja) * | 1995-06-19 | 2002-01-15 | 京セラ株式会社 | 半導体素子収納用パッケージ |
IL123207A0 (en) * | 1998-02-06 | 1998-09-24 | Shellcase Ltd | Integrated circuit device |
JP4212293B2 (ja) * | 2002-04-15 | 2009-01-21 | 三洋電機株式会社 | 半導体装置の製造方法 |
EP1527480A2 (en) * | 2002-08-09 | 2005-05-04 | Casio Computer Co., Ltd. | Semiconductor device and method of manufacturing the same |
JP4035034B2 (ja) * | 2002-11-29 | 2008-01-16 | 株式会社ルネサステクノロジ | 半導体装置およびその製造方法 |
JP2004349593A (ja) * | 2003-05-26 | 2004-12-09 | Sanyo Electric Co Ltd | 半導体装置及びその製造方法 |
JP4130158B2 (ja) * | 2003-06-09 | 2008-08-06 | 三洋電機株式会社 | 半導体装置の製造方法、半導体装置 |
-
2005
- 2005-07-28 JP JP2005219588A patent/JP2007036060A/ja not_active Withdrawn
-
2006
- 2006-07-27 TW TW095127452A patent/TW200707667A/zh unknown
- 2006-07-27 US US11/493,847 patent/US20070096329A1/en not_active Abandoned
- 2006-07-27 KR KR1020060070651A patent/KR100840502B1/ko not_active IP Right Cessation
- 2006-07-28 EP EP06015785A patent/EP1748485A2/en not_active Withdrawn
- 2006-07-28 CN CNB2006101100178A patent/CN100438004C/zh not_active Expired - Fee Related
-
2008
- 2008-05-09 KR KR1020080043325A patent/KR20080055762A/ko not_active Application Discontinuation
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8524602B2 (en) | 2007-08-02 | 2013-09-03 | Advanced Semiconductor Engineering, Inc. | Method for forming vias in a substrate |
US8546255B2 (en) | 2007-08-02 | 2013-10-01 | Advanced Semiconductor Engineering, Inc. | Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate |
US8673774B2 (en) | 2007-12-04 | 2014-03-18 | Advanced Semiconductor Engineering, Inc. | Method for forming a via in a substrate |
US8937015B2 (en) | 2007-12-04 | 2015-01-20 | Advanced Semiconductor Engineering, Inc. | Method for forming vias in a substrate |
US8471156B2 (en) | 2009-08-28 | 2013-06-25 | Advanced Semiconductor Engineering, Inc. | Method for forming a via in a substrate and substrate with a via |
TWI681481B (zh) * | 2014-11-19 | 2020-01-01 | 日商琳得科股份有限公司 | 整列裝置及整列方法 |
Also Published As
Publication number | Publication date |
---|---|
US20070096329A1 (en) | 2007-05-03 |
EP1748485A2 (en) | 2007-01-31 |
KR20070015018A (ko) | 2007-02-01 |
JP2007036060A (ja) | 2007-02-08 |
CN100438004C (zh) | 2008-11-26 |
KR20080055762A (ko) | 2008-06-19 |
CN1905175A (zh) | 2007-01-31 |
KR100840502B1 (ko) | 2008-06-23 |
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