TW200707667A - Semiconductor device and method for manufacture thereof - Google Patents

Semiconductor device and method for manufacture thereof

Info

Publication number
TW200707667A
TW200707667A TW095127452A TW95127452A TW200707667A TW 200707667 A TW200707667 A TW 200707667A TW 095127452 A TW095127452 A TW 095127452A TW 95127452 A TW95127452 A TW 95127452A TW 200707667 A TW200707667 A TW 200707667A
Authority
TW
Taiwan
Prior art keywords
protrusions
semiconductor substrate
recesses
insulating substrate
forming
Prior art date
Application number
TW095127452A
Other languages
English (en)
Inventor
Akira Suzuki
Eiichi Misaka
Original Assignee
Sanyo Electric Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co filed Critical Sanyo Electric Co
Publication of TW200707667A publication Critical patent/TW200707667A/zh

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    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76898Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
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    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3114Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the device being a chip scale package, e.g. CSP
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TW095127452A 2005-07-28 2006-07-27 Semiconductor device and method for manufacture thereof TW200707667A (en)

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US8471156B2 (en) 2009-08-28 2013-06-25 Advanced Semiconductor Engineering, Inc. Method for forming a via in a substrate and substrate with a via
US8524602B2 (en) 2007-08-02 2013-09-03 Advanced Semiconductor Engineering, Inc. Method for forming vias in a substrate
US8546255B2 (en) 2007-08-02 2013-10-01 Advanced Semiconductor Engineering, Inc. Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate
US8673774B2 (en) 2007-12-04 2014-03-18 Advanced Semiconductor Engineering, Inc. Method for forming a via in a substrate
TWI681481B (zh) * 2014-11-19 2020-01-01 日商琳得科股份有限公司 整列裝置及整列方法

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KR20080061021A (ko) * 2006-12-27 2008-07-02 동부일렉트로닉스 주식회사 반도체 소자 및 그 제조방법
US7645701B2 (en) * 2007-05-21 2010-01-12 International Business Machines Corporation Silicon-on-insulator structures for through via in silicon carriers
US8138616B2 (en) * 2008-07-07 2012-03-20 Mediatek Inc. Bond pad structure
JP2011009645A (ja) 2009-06-29 2011-01-13 Toshiba Corp 半導体装置及びその製造方法
JP5540813B2 (ja) * 2010-03-25 2014-07-02 日本電気株式会社 半導体デバイスの製造方法及び積層化半導体デバイスの製造方法
KR101806806B1 (ko) * 2011-12-20 2017-12-11 삼성전자주식회사 전자 소자 탑재용 기판의 제조방법
KR102411678B1 (ko) * 2015-07-28 2022-06-21 삼성전자주식회사 반도체 장치 및 그 제조 방법, 및 상기 반도체 장치를 포함하는 반도체 패키지
US10105139B2 (en) 2015-09-23 2018-10-23 Ethicon Llc Surgical stapler having downstream current-based motor control
US10373868B2 (en) * 2016-01-18 2019-08-06 Infineon Technologies Austria Ag Method of processing a porous conductive structure in connection to an electronic component on a substrate
US11355421B2 (en) * 2017-11-14 2022-06-07 Sony Semiconductor Solutions Corporation Semiconductor device, manufacturing method for semiconductor, and imaging unit

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JP3245329B2 (ja) * 1995-06-19 2002-01-15 京セラ株式会社 半導体素子収納用パッケージ
IL123207A0 (en) * 1998-02-06 1998-09-24 Shellcase Ltd Integrated circuit device
JP4212293B2 (ja) * 2002-04-15 2009-01-21 三洋電機株式会社 半導体装置の製造方法
EP1527480A2 (en) * 2002-08-09 2005-05-04 Casio Computer Co., Ltd. Semiconductor device and method of manufacturing the same
JP4035034B2 (ja) * 2002-11-29 2008-01-16 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2004349593A (ja) * 2003-05-26 2004-12-09 Sanyo Electric Co Ltd 半導体装置及びその製造方法
JP4130158B2 (ja) * 2003-06-09 2008-08-06 三洋電機株式会社 半導体装置の製造方法、半導体装置

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8524602B2 (en) 2007-08-02 2013-09-03 Advanced Semiconductor Engineering, Inc. Method for forming vias in a substrate
US8546255B2 (en) 2007-08-02 2013-10-01 Advanced Semiconductor Engineering, Inc. Method for forming vias in a semiconductor substrate and a semiconductor device having the semiconductor substrate
US8673774B2 (en) 2007-12-04 2014-03-18 Advanced Semiconductor Engineering, Inc. Method for forming a via in a substrate
US8937015B2 (en) 2007-12-04 2015-01-20 Advanced Semiconductor Engineering, Inc. Method for forming vias in a substrate
US8471156B2 (en) 2009-08-28 2013-06-25 Advanced Semiconductor Engineering, Inc. Method for forming a via in a substrate and substrate with a via
TWI681481B (zh) * 2014-11-19 2020-01-01 日商琳得科股份有限公司 整列裝置及整列方法

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JP2007036060A (ja) 2007-02-08
CN100438004C (zh) 2008-11-26
KR20080055762A (ko) 2008-06-19
CN1905175A (zh) 2007-01-31
KR100840502B1 (ko) 2008-06-23

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