TW200631030A - Read approach for multi-level virtual ground memory - Google Patents
Read approach for multi-level virtual ground memoryInfo
- Publication number
- TW200631030A TW200631030A TW094132616A TW94132616A TW200631030A TW 200631030 A TW200631030 A TW 200631030A TW 094132616 A TW094132616 A TW 094132616A TW 94132616 A TW94132616 A TW 94132616A TW 200631030 A TW200631030 A TW 200631030A
- Authority
- TW
- Taiwan
- Prior art keywords
- bit
- level
- present
- virtual ground
- level virtual
- Prior art date
Links
- 230000009977 dual effect Effects 0.000 abstract 2
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5671—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge trapping in an insulator
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
- G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
- G11C2211/563—Multilevel memory reading aspects
- G11C2211/5634—Reference cells
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/946,809 US7038948B2 (en) | 2004-09-22 | 2004-09-22 | Read approach for multi-level virtual ground memory |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200631030A true TW200631030A (en) | 2006-09-01 |
TWI402857B TWI402857B (zh) | 2013-07-21 |
Family
ID=35929848
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW094132616A TWI402857B (zh) | 2004-09-22 | 2005-09-21 | 多位準虛擬接地記憶體之讀取方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US7038948B2 (zh) |
JP (1) | JP4465009B2 (zh) |
KR (1) | KR100873206B1 (zh) |
CN (1) | CN101023495B (zh) |
DE (1) | DE112005002275B4 (zh) |
GB (1) | GB2432699B (zh) |
TW (1) | TWI402857B (zh) |
WO (1) | WO2006036783A1 (zh) |
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US8094493B2 (en) * | 2004-11-12 | 2012-01-10 | Macronix International Co., Ltd. | Memory devices and methods using improved reference cell trimming algorithms for accurate read operation window control |
WO2006103734A1 (ja) * | 2005-03-28 | 2006-10-05 | Fujitsu Limited | 不揮発性半導体メモリおよびその読み出し方法並びにマイクロプロセッサ |
US7295477B2 (en) * | 2005-09-16 | 2007-11-13 | Infineon Technologies Flash Gmbh & Co. Kg | Semiconductor memory device and method for writing data into the semiconductor memory device |
US7881123B2 (en) * | 2005-09-23 | 2011-02-01 | Macronix International Co., Ltd. | Multi-operation mode nonvolatile memory |
US7372753B1 (en) * | 2006-10-19 | 2008-05-13 | Unity Semiconductor Corporation | Two-cycle sensing in a two-terminal memory array having leakage current |
US7379364B2 (en) * | 2006-10-19 | 2008-05-27 | Unity Semiconductor Corporation | Sensing a signal in a two-terminal memory array having leakage current |
US7619919B2 (en) * | 2007-01-12 | 2009-11-17 | Marvell World Trade Ltd. | Multi-level memory |
US20080285354A1 (en) * | 2007-05-16 | 2008-11-20 | Spansion Llc | Self reference sensing system and method |
US7656705B2 (en) * | 2007-10-17 | 2010-02-02 | Spansion Llc | Fast single phase program algorithm for quadbit |
US7692962B2 (en) * | 2007-12-18 | 2010-04-06 | Spansion Llc | Reduced state quadbit |
JP2009157975A (ja) * | 2007-12-25 | 2009-07-16 | Spansion Llc | 半導体装置およびその制御方法 |
US8751755B2 (en) | 2007-12-27 | 2014-06-10 | Sandisk Enterprise Ip Llc | Mass storage controller volatile memory containing metadata related to flash memory storage |
US8031523B2 (en) * | 2008-07-31 | 2011-10-04 | Macronix International Co., Ltd. | Memory and reading method thereof |
US7719876B2 (en) | 2008-07-31 | 2010-05-18 | Unity Semiconductor Corporation | Preservation circuit and methods to maintain values representing data in one or more layers of memory |
US7830701B2 (en) * | 2008-09-19 | 2010-11-09 | Unity Semiconductor Corporation | Contemporaneous margin verification and memory access for memory cells in cross point memory arrays |
US8982636B2 (en) | 2009-07-10 | 2015-03-17 | Macronix International Co., Ltd. | Accessing method and a memory using thereof |
US20110007577A1 (en) * | 2009-07-10 | 2011-01-13 | Macronix International Co., Ltd. | Accessing method and a memory using thereof |
CN102610617B (zh) * | 2012-03-31 | 2017-11-24 | 上海华虹宏力半导体制造有限公司 | 一种多比特sonos闪存单元、阵列及操作方法 |
US9699263B1 (en) | 2012-08-17 | 2017-07-04 | Sandisk Technologies Llc. | Automatic read and write acceleration of data accessed by virtual machines |
US9612948B2 (en) | 2012-12-27 | 2017-04-04 | Sandisk Technologies Llc | Reads and writes between a contiguous data block and noncontiguous sets of logical address blocks in a persistent storage device |
US9870830B1 (en) | 2013-03-14 | 2018-01-16 | Sandisk Technologies Llc | Optimal multilevel sensing for reading data from a storage medium |
US9524235B1 (en) | 2013-07-25 | 2016-12-20 | Sandisk Technologies Llc | Local hash value generation in non-volatile data storage systems |
US9639463B1 (en) | 2013-08-26 | 2017-05-02 | Sandisk Technologies Llc | Heuristic aware garbage collection scheme in storage systems |
US9703816B2 (en) | 2013-11-19 | 2017-07-11 | Sandisk Technologies Llc | Method and system for forward reference logging in a persistent datastore |
US9520197B2 (en) | 2013-11-22 | 2016-12-13 | Sandisk Technologies Llc | Adaptive erase of a storage device |
US9520162B2 (en) | 2013-11-27 | 2016-12-13 | Sandisk Technologies Llc | DIMM device controller supervisor |
US9582058B2 (en) | 2013-11-29 | 2017-02-28 | Sandisk Technologies Llc | Power inrush management of storage devices |
US9703636B2 (en) | 2014-03-01 | 2017-07-11 | Sandisk Technologies Llc | Firmware reversion trigger and control |
US9454448B2 (en) * | 2014-03-19 | 2016-09-27 | Sandisk Technologies Llc | Fault testing in storage devices |
US9626400B2 (en) | 2014-03-31 | 2017-04-18 | Sandisk Technologies Llc | Compaction of information in tiered data structure |
US9626399B2 (en) | 2014-03-31 | 2017-04-18 | Sandisk Technologies Llc | Conditional updates for reducing frequency of data modification operations |
US9697267B2 (en) | 2014-04-03 | 2017-07-04 | Sandisk Technologies Llc | Methods and systems for performing efficient snapshots in tiered data structures |
US9703491B2 (en) | 2014-05-30 | 2017-07-11 | Sandisk Technologies Llc | Using history of unaligned writes to cache data and avoid read-modify-writes in a non-volatile storage device |
US10114557B2 (en) | 2014-05-30 | 2018-10-30 | Sandisk Technologies Llc | Identification of hot regions to enhance performance and endurance of a non-volatile storage device |
US10162748B2 (en) | 2014-05-30 | 2018-12-25 | Sandisk Technologies Llc | Prioritizing garbage collection and block allocation based on I/O history for logical address regions |
US10656842B2 (en) | 2014-05-30 | 2020-05-19 | Sandisk Technologies Llc | Using history of I/O sizes and I/O sequences to trigger coalesced writes in a non-volatile storage device |
US10656840B2 (en) | 2014-05-30 | 2020-05-19 | Sandisk Technologies Llc | Real-time I/O pattern recognition to enhance performance and endurance of a storage device |
US10146448B2 (en) | 2014-05-30 | 2018-12-04 | Sandisk Technologies Llc | Using history of I/O sequences to trigger cached read ahead in a non-volatile storage device |
US10372613B2 (en) | 2014-05-30 | 2019-08-06 | Sandisk Technologies Llc | Using sub-region I/O history to cache repeatedly accessed sub-regions in a non-volatile storage device |
US9652381B2 (en) | 2014-06-19 | 2017-05-16 | Sandisk Technologies Llc | Sub-block garbage collection |
CN105575432B (zh) * | 2015-12-15 | 2019-08-23 | 上海华虹宏力半导体制造有限公司 | 一种分栅式双位存储单元闪存的数据读取方法 |
Family Cites Families (14)
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US6222762B1 (en) * | 1992-01-14 | 2001-04-24 | Sandisk Corporation | Multi-state memory |
US5687114A (en) * | 1995-10-06 | 1997-11-11 | Agate Semiconductor, Inc. | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
US5629892A (en) * | 1995-10-16 | 1997-05-13 | Advanced Micro Devices, Inc. | Flash EEPROM memory with separate reference array |
US5717632A (en) * | 1996-11-27 | 1998-02-10 | Advanced Micro Devices, Inc. | Apparatus and method for multiple-level storage in non-volatile memories |
US5999451A (en) * | 1998-07-13 | 1999-12-07 | Macronix International Co., Ltd. | Byte-wide write scheme for a page flash device |
US6975539B2 (en) * | 1999-01-14 | 2005-12-13 | Silicon Storage Technology, Inc. | Digital multilevel non-volatile memory system |
US6211697B1 (en) * | 1999-05-25 | 2001-04-03 | Actel | Integrated circuit that includes a field-programmable gate array and a hard gate array having the same underlying structure |
KR100386296B1 (ko) | 2000-12-30 | 2003-06-02 | 주식회사 하이닉스반도체 | 멀티레벨을 가지는 플래쉬 메모리를 프로그램/리드하기위한 회로 및 그 방법 |
US6584017B2 (en) * | 2001-04-05 | 2003-06-24 | Saifun Semiconductors Ltd. | Method for programming a reference cell |
US6512701B1 (en) * | 2001-06-21 | 2003-01-28 | Advanced Micro Devices, Inc. | Erase method for dual bit virtual ground flash |
US6684173B2 (en) * | 2001-10-09 | 2004-01-27 | Micron Technology, Inc. | System and method of testing non-volatile memory cells |
US6700818B2 (en) * | 2002-01-31 | 2004-03-02 | Saifun Semiconductors Ltd. | Method for operating a memory device |
US6700815B2 (en) * | 2002-04-08 | 2004-03-02 | Advanced Micro Devices, Inc. | Refresh scheme for dynamic page programming |
US6799256B2 (en) | 2002-04-12 | 2004-09-28 | Advanced Micro Devices, Inc. | System and method for multi-bit flash reads using dual dynamic references |
-
2004
- 2004-09-22 US US10/946,809 patent/US7038948B2/en active Active
-
2005
- 2005-09-20 WO PCT/US2005/034135 patent/WO2006036783A1/en active Application Filing
- 2005-09-20 GB GB0703570A patent/GB2432699B/en not_active Expired - Fee Related
- 2005-09-20 DE DE112005002275T patent/DE112005002275B4/de active Active
- 2005-09-20 JP JP2007532684A patent/JP4465009B2/ja active Active
- 2005-09-20 KR KR1020077008253A patent/KR100873206B1/ko not_active IP Right Cessation
- 2005-09-20 CN CN2005800314169A patent/CN101023495B/zh active Active
- 2005-09-21 TW TW094132616A patent/TWI402857B/zh active
Also Published As
Publication number | Publication date |
---|---|
US20060062054A1 (en) | 2006-03-23 |
GB0703570D0 (en) | 2007-04-04 |
US7038948B2 (en) | 2006-05-02 |
GB2432699B (en) | 2008-05-14 |
KR20070061866A (ko) | 2007-06-14 |
DE112005002275B4 (de) | 2013-07-04 |
DE112005002275T5 (de) | 2007-08-23 |
TWI402857B (zh) | 2013-07-21 |
GB2432699A (en) | 2007-05-30 |
JP4465009B2 (ja) | 2010-05-19 |
CN101023495A (zh) | 2007-08-22 |
CN101023495B (zh) | 2011-04-06 |
JP2008513928A (ja) | 2008-05-01 |
WO2006036783A1 (en) | 2006-04-06 |
KR100873206B1 (ko) | 2008-12-10 |
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