TW200616126A - Methods of forming lead free solder bumps and related structures - Google Patents

Methods of forming lead free solder bumps and related structures

Info

Publication number
TW200616126A
TW200616126A TW094121987A TW94121987A TW200616126A TW 200616126 A TW200616126 A TW 200616126A TW 094121987 A TW094121987 A TW 094121987A TW 94121987 A TW94121987 A TW 94121987A TW 200616126 A TW200616126 A TW 200616126A
Authority
TW
Taiwan
Prior art keywords
layer
under bump
bump seed
seed metallurgy
methods
Prior art date
Application number
TW094121987A
Other languages
English (en)
Inventor
J Daniel Mis
Gretchen Adema
Susan Bumgarner
Pooja Chilukuri
Christine Rinne
Glenn A Rinne
Original Assignee
Unitive International Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Unitive International Ltd filed Critical Unitive International Ltd
Publication of TW200616126A publication Critical patent/TW200616126A/zh

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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
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    • H01L21/2885—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition using an external electrical current, i.e. electro-deposition
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
TW094121987A 2004-06-30 2005-06-29 Methods of forming lead free solder bumps and related structures TW200616126A (en)

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KR20090075883A (ko) * 2006-10-31 2009-07-09 어드밴스드 마이크로 디바이시즈, 인코포레이티드 알루미늄 단자 금속층이 없는 금속화층 스택
DE102006051491A1 (de) * 2006-10-31 2008-05-15 Advanced Micro Devices, Inc., Sunnyvale Metallisierungsschichtstapel mit einer Aluminiumabschlussmetallschicht
DE102007057689A1 (de) * 2007-11-30 2009-06-04 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit einem Chipgebiet, das für eine aluminiumfreie Lothöckerverbindung gestaltet ist, und eine Teststruktur, die für eine aluminiumfreie Drahtverbindung gestaltet ist
CN101740420B (zh) * 2008-11-05 2011-11-09 中芯国际集成电路制造(上海)有限公司 铜支柱制作工艺
US8637983B2 (en) * 2008-12-19 2014-01-28 Ati Technologies Ulc Face-to-face (F2F) hybrid structure for an integrated circuit
JP5659821B2 (ja) * 2011-01-26 2015-01-28 三菱マテリアル株式会社 Ｓｎ合金バンプの製造方法
US20130099371A1 (en) * 2011-10-21 2013-04-25 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor package having solder jointed region with controlled ag content
KR20150109213A (ko) * 2014-03-19 2015-10-01 에스케이하이닉스 주식회사 관통 전극을 갖는 반도체 소자 및 그 제조방법
KR102206113B1 (ko) * 2014-03-28 2021-01-25 에스케이하이닉스 주식회사 관통 전극을 갖는 반도체 소자, 이를 구비하는 반도체 패키지 및 반도체 소자의 제조방법
JP6217836B1 (ja) 2016-12-07 2017-10-25 千住金属工業株式会社 核材料および半導体パッケージおよびバンプ電極の形成方法
US20220216104A1 (en) * 2019-02-14 2022-07-07 Lam Research Corporation Gold through silicon mask plating
CN110444479B (zh) * 2019-07-22 2022-02-01 厦门通富微电子有限公司 一种金属凸点的制造方法和芯片

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US6224690B1 (en) * 1995-12-22 2001-05-01 International Business Machines Corporation Flip-Chip interconnections using lead-free solders
JP2000349111A (ja) * 1999-06-03 2000-12-15 Fujitsu Ltd はんだ接合用電極
US6638847B1 (en) * 2000-04-19 2003-10-28 Advanced Interconnect Technology Ltd. Method of forming lead-free bump interconnections
JP3682227B2 (ja) * 2000-12-27 2005-08-10 株式会社東芝 電極の形成方法

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