TW200616063A - Low-k dielectric etch - Google Patents

Low-k dielectric etch

Info

Publication number
TW200616063A
TW200616063A TW094124429A TW94124429A TW200616063A TW 200616063 A TW200616063 A TW 200616063A TW 094124429 A TW094124429 A TW 094124429A TW 94124429 A TW94124429 A TW 94124429A TW 200616063 A TW200616063 A TW 200616063A
Authority
TW
Taiwan
Prior art keywords
etch
flow rate
low
dielectric layer
dielectric etch
Prior art date
Application number
TW094124429A
Other languages
English (en)
Chinese (zh)
Inventor
Sean S Kang
Zhi-Song Huang
S M Reza Sadjadi
Original Assignee
Lam Res Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lam Res Corp filed Critical Lam Res Corp
Publication of TW200616063A publication Critical patent/TW200616063A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31144—Etching the insulating layers by chemical or physical means using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Plasma & Fusion (AREA)
  • Drying Of Semiconductors (AREA)
TW094124429A 2004-07-16 2005-07-15 Low-k dielectric etch TW200616063A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/892,945 US20060011578A1 (en) 2004-07-16 2004-07-16 Low-k dielectric etch

Publications (1)

Publication Number Publication Date
TW200616063A true TW200616063A (en) 2006-05-16

Family

ID=35159879

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094124429A TW200616063A (en) 2004-07-16 2005-07-15 Low-k dielectric etch

Country Status (6)

Country Link
US (1) US20060011578A1 (enExample)
JP (1) JP2008507137A (enExample)
KR (1) KR20070046095A (enExample)
CN (1) CN101027760A (enExample)
TW (1) TW200616063A (enExample)
WO (1) WO2006019849A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060032833A1 (en) * 2004-08-10 2006-02-16 Applied Materials, Inc. Encapsulation of post-etch halogenic residue
US20070269975A1 (en) * 2006-05-18 2007-11-22 Savas Stephen E System and method for removal of photoresist and stop layer following contact dielectric etch
US7704680B2 (en) * 2006-06-08 2010-04-27 Advanced Micro Devices, Inc. Double exposure technology using high etching selectivity

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3837856A (en) * 1967-04-04 1974-09-24 Signetics Corp Method for removing photoresist in manufacture of semiconductor devices
DE3420347A1 (de) * 1983-06-01 1984-12-06 Hitachi, Ltd., Tokio/Tokyo Gas und verfahren zum selektiven aetzen von siliciumnitrid
US5658425A (en) * 1991-10-16 1997-08-19 Lam Research Corporation Method of etching contact openings with reduced removal rate of underlying electrically conductive titanium silicide layer
JP3215151B2 (ja) * 1992-03-04 2001-10-02 株式会社東芝 ドライエッチング方法
EP0647163B1 (en) * 1992-06-22 1998-09-09 Lam Research Corporation A plasma cleaning method for removing residues in a plasma treatment chamber
GB9616225D0 (en) * 1996-08-01 1996-09-11 Surface Tech Sys Ltd Method of surface treatment of semiconductor substrates
US6270948B1 (en) * 1996-08-22 2001-08-07 Kabushiki Kaisha Toshiba Method of forming pattern
US5989353A (en) * 1996-10-11 1999-11-23 Mallinckrodt Baker, Inc. Cleaning wafer substrates of metal contamination while maintaining wafer smoothness
US6080680A (en) * 1997-12-19 2000-06-27 Lam Research Corporation Method and composition for dry etching in semiconductor fabrication
US6635185B2 (en) * 1997-12-31 2003-10-21 Alliedsignal Inc. Method of etching and cleaning using fluorinated carbonyl compounds
US6635335B1 (en) * 1999-06-29 2003-10-21 Micron Technology, Inc. Etching methods and apparatus and substrate assemblies produced therewith
KR100327346B1 (ko) * 1999-07-20 2002-03-06 윤종용 선택적 폴리머 증착을 이용한 플라즈마 식각방법 및 이를이용한 콘택홀 형성방법
US6265320B1 (en) * 1999-12-21 2001-07-24 Novellus Systems, Inc. Method of minimizing reactive ion etch damage of organic insulating layers in semiconductor fabrication
US6506678B1 (en) * 2000-05-19 2003-01-14 Lsi Logic Corporation Integrated circuit structures having low k porous aluminum oxide dielectric material separating aluminum lines, and method of making same
US6794109B2 (en) * 2001-02-23 2004-09-21 Massachusetts Institute Of Technology Low abosorbing resists for 157 nm lithography
US20030181034A1 (en) * 2002-03-19 2003-09-25 Ping Jiang Methods for forming vias and trenches with controlled SiC etch rate and selectivity
AU2003244166A1 (en) * 2002-06-27 2004-01-19 Tokyo Electron Limited Plasma processing method
US7169695B2 (en) * 2002-10-11 2007-01-30 Lam Research Corporation Method for forming a dual damascene structure
US6809028B2 (en) * 2002-10-29 2004-10-26 Taiwan Semiconductor Manufacturing Company, Ltd. Chemistry for liner removal in a dual damascene process
JP2007537602A (ja) * 2004-05-11 2007-12-20 アプライド　マテリアルズ　インコーポレイテッド フルオロカーボン化学エッチングにおけるｈ２添加物を使用しての炭素ドープ酸化ケイ素エッチング

Also Published As

Publication number Publication date
KR20070046095A (ko) 2007-05-02
WO2006019849A1 (en) 2006-02-23
JP2008507137A (ja) 2008-03-06
US20060011578A1 (en) 2006-01-19
CN101027760A (zh) 2007-08-29

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