200522107 玖、發明說明： 發明所屬之技術領域 本發明係關於一種積層式IX濾波模組之結構及其製 作方法。 先前技術 在電子産品走向輕、薄、短、小與多功能之趨勢下， 使得電子被動元件朝向陣列化或模組化發展，因此在一積 層晶片濾波元件中，常常需要組合數個電感器和電容器， 經電路設計及積層晶片組件製程整合爲一體，成爲一積層 式電感電容模組。-般的傳統的製法將元件分爲兩部分， -爲電感材料部分’包括模組中所有的電感…爲電容材 料部分’包括所有電容；亦即，把所有電感線路設計在磁 1·生材料層’所有電容線路設計在介電材料層，二者分別燒 成再加以黏合’或是將二者疊在_起共燒。由於磁性材料 與介電材料之收縮率差異’因此傳統的製法很容易因爲收 縮匹配㈣’在電感材料與電容材料之界面上，發生應力 集中，而使元件容易有麵曲、破裂之問題。此夕卜，由於元 件的小型化與多功能化’元件中線路高度整合的結果，使 各元件間容易相互干擾而産生串音（㈣ss論)問題。 製備積層式電感電容模組的先前技術還有日本專利 則6-325977,其中將電感部分與電容部分分別燒結之後再 加以黏合。 美國專利_4111揭示由—電感部分與一電容部分 200522107 二者共燒而成的積層式電感電容模組。日本專利 JP2003-051729揭示由電感層之堆疊與電容層之堆疊構成 的積層式電感電容模組。美國專利US558347〇揭示一電感 陣列’其以-低導磁率之隔絕層，將元件隔開爲兩部分， 以減少電感間磁力線耦合。美國專利US5〇23578揭示三端 子電容型之濾波器陣列，其線路佈局主要在兩個平面上， 一平面爲各信號線之線路，另—平面爲一共同電極。 發明内容 本發明的-目的在提出—種積層式IX瀘、波模組，利用 電感層與電容層在厚度方向分散之結構，將電感層盘電容 層分開來，使電感之間之串音（cr〇sstalk)降低。 用兼一目的在提出一種積層式LC滤波模組，使 =率與介電常數之材料同時作為積層UC遽波 模、、且的電感層與電容 裂問題。 m專統製法中元件之翹曲、破 本發明的再_日Μ + # , φ . φ ^ ^ 的在美出一種積層式LC濾波模組，其 中的電感線路與雷交蕾士 。布局設計均可利用到元件整體 面積，使面積利用率裎古 回’製程之精度亦較好控制。 本發明的還一目的在 的製備方法。 積層式心慮波模組之結構 為達成上述本發明的目 層式LC滤波模組包含一 毛月所構桌疋成-種積 介電常數介於4 7 -有-導磁率介於5與1300與一 .至2750的結構材料；及被形成於該結構 200522107 材料内的不同水平面上的電感線路與電容電極，其中該。 感線路與電容電極於垂直方向互相交替。 八 ^電 較佳的，該電感線路與電容電極涵 嚴邊水平面之實暫 上全面積。 $貝 較佳的，中該肖冑# t (Ti〇2)x(M〇.Fe2〇3)y，其中 x+y=1，〇gx$ 、、·成 〜丄M爲Μη、Ni、200522107 (ii) Description of the invention: Technical field to which the invention belongs The present invention relates to the structure and manufacturing method of a laminated IX filter module. In the prior art, electronic products are becoming lighter, thinner, shorter, smaller, and more versatile. As a result, electronic passive components have developed toward arrays or modularization. Therefore, in a multilayer chip filter component, it is often necessary to combine several inductors and The capacitor is integrated into a whole through circuit design and multi-layer chip assembly manufacturing process, and becomes a multi-layer inductor-capacitor module. -The general traditional manufacturing method divides the element into two parts,-the part of the inductive material 'includes all the inductors in the module ... the part of the capacitive material' includes all the capacitors; that is, all inductive circuits are designed in magnetic materials Layer 'all capacitor lines are designed in a dielectric material layer, the two are fired separately and then bonded' or the two are stacked and fired together. Due to the difference in shrinkage between magnetic materials and dielectric materials, the traditional manufacturing method is easy to cause stress concentration at the interface between the inductive material and the capacitive material due to shrinkage matching, which makes the components prone to surface curvature and cracking. In addition, due to the miniaturization of the components and the high integration of the lines in the components, the components are likely to interfere with each other and cause crosstalk (㈣ss theory). The previous technology for manufacturing multilayer inductor and capacitor modules is also Japanese Patent No. 6-325977, in which the inductor part and the capacitor part are sintered and then bonded. US patent_4111 discloses a multilayer inductor-capacitor module formed by co-firing both an inductor portion and a capacitor portion 200522107. Japanese patent JP2003-051729 discloses a multilayer inductor-capacitor module composed of a stack of inductor layers and a stack of capacitor layers. U.S. Patent No. 5,558,740 discloses an inductor array 'with a low-permeability insulation layer that separates the element into two parts to reduce magnetic line-to-line coupling between the inductors. U.S. Patent No. 5,023,578 discloses a three-terminal capacitor-type filter array whose circuit layout is mainly on two planes, one plane is a line for each signal line, and the other plane is a common electrode. SUMMARY OF THE INVENTION The purpose of the present invention is to propose a multilayer IX 泸, wave module, which uses a structure in which the inductor layer and the capacitor layer are dispersed in the thickness direction to separate the capacitor layer and the capacitor layer to make crosstalk between the inductors ( cr0sstalk). The purpose of this paper is to propose a multi-layer LC filter module, so that the material with the rate and the dielectric constant can be used as the multi-layer UC mode, and the inductor layer and the capacitor should be split. The warpage and breakage of components in the m-specialized control method of the present invention is a multilayer LC filter module in the United States. The inductor circuit and the lightning circuit are included in the United States. The layout design can make use of the overall area of the component, so that the accuracy of the area utilization process can be better controlled. A further object of the present invention is a method for preparing. The structure of the multilayer mind wave module is to achieve the above-mentioned objective layer LC filter module of the present invention, which includes a table constructed by one month-a kind of dielectric constant between 4 7-yes-a permeability between 5 and 1300 and I. to 2750 structural materials; and inductive lines and capacitor electrodes formed on different horizontal planes within the material of the structure 200522107, among which. The sense lines and the capacitor electrodes alternate with each other in the vertical direction. It is preferable that the inductive line and the capacitive electrode culvert have a strictly full horizontal area for the time being. $ 贝 Preferably, in this Xiao 胄 # t (Ti〇2) x (M〇.Fe2〇3) y, where x + y = 1, 〇gx $ ,, ~~ ~ M is Mη, Ni,
Cu、Mg、U、Zn金屬或它們的任意組合。 M j =二電感線路與電容電極獨立的爲金、銀、飽、 鶴或匕們的任意組合。 人本發明亦提出-種製備積層式Lc遽波模組的方法，包 3將電感線路分別印刷於一第一 將雪交雷托八^ C 何枓片的表面上； ，電：電極刀別印刷於一第二組生胚材料片的表面 印刷有電錢路的第—組生 、 篦- έ日；i U _n , 门1 P刷有電容電極的 第一組生胚材料片以互相上下交替方式疊 結構體；然後將該結構體在 " 曰多 中m 4 稱體而成積層式lc瀘、波模組，其 中以第'，且生胚材料片及該第二組 組成（Ti〇2)x(MO‘Fe2〇3)，並φ 何科片具有下列的 e2〇3)y，其中 x + y = 1,Cu, Mg, U, Zn metals or any combination thereof. M j = the two inductor lines and the capacitor electrode are independently any combination of gold, silver, saturated, crane or dagger. The present invention also proposes a method for preparing a multi-layered LC wave module, including 3 printed inductive circuits on the surface of a first snow-capped Rayto ^ C Ho chip, respectively; electric: electrode knife Printed on the surface of a second group of green embryonic material pieces with the first group of green money, 篦-日 日; i U _n, gate 1 P brushed the first group of green embryonic material pieces with capacitor electrodes on top of each other The structure is stacked in an alternating manner; then the structure is laminated in " m 4 to form a laminated lc 泸, wave module, in which the first, and the raw material sheet and the second group (Ti 〇2) x (MO'Fe2〇3), and φHeke film has the following e2〇3) y, where x + y = 1,
Ni、Cn、Mg、Li、7 人琉 ' Μ ^ Μη ^ g U Zn金屬或它們的任意組合。 較佳的，該電感線路 表面之實質上全^ $ 生胚材料片的 立的爲金、、銀二的’該電感線路與電容電極獨 E鶴或它們的任意組合。 實施方式 LC濾波模組，利用電感層與電 本發明提出一種積層式 200522107 容層在厚度方向分散之結構，如圖工所示，將電感層1〇與 電容層20間隔開，相較於傳統製法將所有電感整合在磁性 材料層，本發明的電感之間之串音（cr〇sstalk)會因而大幅度 降低、極接近於零。 本發明的電感層與電容層之材料均使用兼具導磁率與 介電常數之同一系列材料（但不一定完全相同），導磁率在5 至1300之間，介電常數在4.7至2750之間，而使各個電 感層及電容層間無燒結收縮匹配問題而使其内應力降低。 本發明的各個電感層及電容層的線路佈局可使用其層 結構之全面積而提高了面積利用率及線路佈局的彈性。 本發明提出一種積層式LC濾波模組，此模組由數個電 感與數個電容構成’利用電感層與電容層在厚度方向分散 之結構’冑電感層與電容層分開來。例如將電感線路與電 容電極分別依設計印刷於電感層生胚材料與電容層生胚材 料的表面丨。若積層之方式如傳統方式，則由於二材料之 收縮率差異，很容易在介面上發生應力集中 而造成元件 有麵曲、破裂之問題。若積層之方式如本發明之分散結構， 且電感層與電容層生胚材料均使用兼具導磁率與介電常數 之材料，則無收縮匹配之應力問題。再加上端電極或内部 via對元件亦具有失持作用，可解決元件之趣曲、破裂問 題，提高元件之可靠度。 利用本發明之結構，電容層之電極設計可充分利用元 件整體面積’使電感與電容之線路佈局更有彈性。3216尺 寸爲例，如圖2a所示，若分割爲4個16〇8尺寸在同一介 200522107 電層做佈局設計，則每個電 A ^ 冤谷之電極面積可設計爲1.2 mm x0,4mm。若利用整體面 谓师局’如圖2b所示，電極面積 可設計爲2.8 mm X 1.2 mm，；接泣 面積爲前者之7倍。因此，若 要得到相同於以整體面積佈 檟饰局一張生胚可得之電容量，則 4分割之佈局必須用7張 張生胚’利用本創作之結構只需4 張生胚。電感層之線路佈局亦古 巧方有相同情形，同樣以3 21 6尺 寸爲例，線路可設計爲直線 ^折線（meander line)、或是螺 旋（spiral)單層或多層設計， 右』為4個ι608尺寸，則必須 增加電感之圈數才能獲得相同 祁门之電感，增加製程之複雜度。 實施例及對照例 元件尺寸爲3216。電感線路採用單層之折線由銀膠網 印而成，線寬0·1 mm。生胚使用 (Ti〇2)〇,(Ni〇,2Cu〇.28Zn〇.6〇.Fe2〇3)〇9#^ ? u=5〇> )ι電㊉數k 1700。將電感線路u與電容電極2i分別依設 計印刷於生胚的表面上。如圖&一 如圖3a所不，將電感層生胚與電 ♦層生胚以上下父替方式疊置成爲_結構體，然後將結構 體以_ C ’ 2小時燒結而成本發明的積層式lc滤波模 組，其中電感層10與電容層20爲交替間隔的結構。圖3b 爲對照例的制式LC毅模組，其製備方法除了疊置方式 不同外，其它步驟類同於實施例。 以间頻電磁場模擬來評估實施例與對照例的兩積層式 LC濾波模組的電感間之串音（cr〇sstalk)。模擬結果如下： 200522107 ^—----- 串音（dB) 實施例 ----~--—_____ <-100 對照例 — ------ -1 0 〜，2 0 圖式簡單説明 圖1顯示本發明的積層式LC濾波模組之示意圖。Ni, Cn, Mg, Li, 7 人 ^ ^ ^ η ^ g U Zn metal or any combination thereof. Preferably, the surface of the inductive circuit is substantially entirely of gold, silver and silver, and the inductive circuit and the capacitor electrode are independent of each other or any combination thereof. Embodiment The LC filter module utilizes an inductor layer and an electric current. The present invention proposes a multilayer structure of 200522107. The capacitor layer is dispersed in the thickness direction. As shown in the figure, the inductor layer 10 and the capacitor layer 20 are spaced apart, compared with the traditional The manufacturing method integrates all the inductors in the magnetic material layer, so the crosstalk between the inductors of the present invention will be greatly reduced, which is very close to zero. The materials of the inductor layer and the capacitor layer of the present invention use the same series of materials (but not necessarily completely the same) having both magnetic permeability and dielectric constant. The magnetic permeability is between 5 and 1300, and the dielectric constant is between 4.7 and 2750. , So that there is no sintering shrinkage matching problem between each inductance layer and the capacitor layer, which reduces its internal stress. The circuit layout of each inductance layer and capacitor layer of the present invention can use the full area of its layer structure to improve the area utilization rate and the flexibility of the circuit layout. The present invention proposes a multilayer LC filter module, which is composed of a plurality of inductors and a plurality of capacitors. The structure in which the inductor layer and the capacitor layer are dispersed in the thickness direction is used. The inductor layer and the capacitor layer are separated. For example, the inductor circuit and the capacitor electrode are printed on the surface of the inductor layer and the capacitor layer according to the design. If the lamination method is the traditional method, due to the difference in shrinkage of the two materials, it is easy to cause stress concentration on the interface and cause surface bending and cracking of the component. If the lamination method is like the dispersed structure of the present invention, and the raw material of the inductor layer and the capacitor layer uses a material having both magnetic permeability and dielectric constant, there is no stress problem of shrinkage matching. In addition, the terminal electrode or the internal via also has a dislodging effect on the component, which can solve the problem of fun and crack of the component and improve the reliability of the component. With the structure of the present invention, the electrode design of the capacitor layer can make full use of the entire area of the element 'to make the circuit layout of the inductor and capacitor more flexible. As an example, as shown in FIG. 2a, if the size is divided into four 1608 sizes and the layout is designed in the same layer of 200522107, the electrode area of each electrode can be designed to be 1.2 mm x 0.4 mm. If the overall surface is used as shown in Figure 2b, the electrode area can be designed to be 2.8 mm X 1.2 mm; the area of the electrode is 7 times that of the former. Therefore, in order to obtain the same capacitance as that obtained by decorating the board with a whole area, the layout of 4 divisions must use 7 sheets of raw embryos'. Only 4 sheets of raw embryos are required to use the structure of this creation. The circuit layout of the inductor layer also has the same situation. The size of 3 21 6 is also taken as an example. The line can be designed as a straight ^ meander line or a spiral single or multi-layer design. The right side is 4 Ι608 size, you must increase the number of turns of the inductor to obtain the same Qimen's inductance, increasing the complexity of the process. Examples and Comparative Examples The element size was 3216. Inductive lines are printed with a single layer of polysilicon screened by silver plastic with a line width of 0.1 mm. The raw embryos used (Ti〇2) 〇, (Ni〇, 2Cu〇.28Zn0.6.Fe2〇3) 〇9 # ^ = u = 50 and the number of k 1700. The inductive line u and the capacitive electrode 2i are printed on the surface of the green embryo according to the design, respectively. As shown in Figure & 1 as shown in Figure 3a, the inductor layered embryo and the electric layered embryo are superimposed to form a _ structure, and then the structure is sintered in _ C '2 hours to form a laminate of the invention The lc filter module has a structure in which the inductance layer 10 and the capacitance layer 20 are alternately spaced. Figure 3b shows the LC LC module of the comparative example. The manufacturing method is the same as that of the embodiment except that the stacking method is different. The inter-frequency electromagnetic field simulation was used to evaluate the crosstalk between the inductors of the two laminated LC filter modules of the embodiment and the comparative example. The simulation results are as follows: 200522107 ^ —----- Crosstalk (dB) Example ---- ~ ---_____ < -100 Comparative Example ------- -1 0 ～, 2 0 Schematic Brief Description FIG. 1 shows a schematic diagram of a multilayer LC filter module according to the present invention.
圖2a顯不習知技藝的積層式lc濾波模組之電容電極 佈局的有效面積示意圖。 圖2b顯不本發明的積層式LC濾波模組之電容電極佈 。的有效面積示意圖。 ☆圖3a顯示本發明的積層式lc濾波模組之電感層與電 令㈢的疊置情形的示意圖。Fig. 2a is a schematic diagram showing the effective area of the capacitor electrode layout of a multilayer lc filter module with unfamiliar technology. FIG. 2b shows the capacitor electrode cloth of the multilayer LC filter module of the present invention. Schematic diagram of the effective area. ☆ Fig. 3a is a schematic diagram showing the superposition of the inductor layer and the electric coil of the multilayer lc filter module of the present invention.
圖3b顯不習知技藝的積層式濾波模組之電感層與 〜層的疊置情形的示意圖。 t要元件之圖號說明 lG··電感層 20··電容層 U··電感線路 21··電容電極 10FIG. 3b is a schematic diagram showing the superposition of the inductor layer and the ~ layer of the multilayer filter module of unfamiliar technology. tParameter description of the required components lG · Inductive layer 20 · Capacitive layer U · Inductive line 21 · Capacitive electrode 10