TW200506607A - Data processing device and mobile device - Google Patents

Data processing device and mobile device

Info

Publication number
TW200506607A
TW200506607A TW093111123A TW93111123A TW200506607A TW 200506607 A TW200506607 A TW 200506607A TW 093111123 A TW093111123 A TW 093111123A TW 93111123 A TW93111123 A TW 93111123A TW 200506607 A TW200506607 A TW 200506607A
Authority
TW
Taiwan
Prior art keywords
clock signal
interface
memory card
card
data processing
Prior art date
Application number
TW093111123A
Other languages
English (en)
Inventor
Kazuo Sakamoto
Naozumi Morino
Ikuo Kudo
Original Assignee
Renesas Tech Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200506607A publication Critical patent/TW200506607A/zh

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F5/00Methods or arrangements for data conversion without changing the order or content of the data handled
    • G06F5/06Methods or arrangements for data conversion without changing the order or content of the data handled for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor
    • EFIXED CONSTRUCTIONS
    • E02HYDRAULIC ENGINEERING; FOUNDATIONS; SOIL SHIFTING
    • E02DFOUNDATIONS; EXCAVATIONS; EMBANKMENTS; UNDERGROUND OR UNDERWATER STRUCTURES
    • E02D23/00Caissons; Construction or placing of caissons
    • EFIXED CONSTRUCTIONS
    • E02HYDRAULIC ENGINEERING; FOUNDATIONS; SOIL SHIFTING
    • E02BHYDRAULIC ENGINEERING
    • E02B3/00Engineering works in connection with control or use of streams, rivers, coasts, or other marine sites; Sealings or joints for engineering works in general
    • E02B3/16Sealings or joints
    • EFIXED CONSTRUCTIONS
    • E02HYDRAULIC ENGINEERING; FOUNDATIONS; SOIL SHIFTING
    • E02DFOUNDATIONS; EXCAVATIONS; EMBANKMENTS; UNDERGROUND OR UNDERWATER STRUCTURES
    • E02D19/00Keeping dry foundation sites or other areas in the ground
    • E02D19/02Restraining of open water
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10Distribution of clock signals, e.g. skew
    • EFIXED CONSTRUCTIONS
    • E02HYDRAULIC ENGINEERING; FOUNDATIONS; SOIL SHIFTING
    • E02DFOUNDATIONS; EXCAVATIONS; EMBANKMENTS; UNDERGROUND OR UNDERWATER STRUCTURES
    • E02D2250/00Production methods
    • E02D2250/0061Production methods for working underwater

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Structural Engineering (AREA)
  • Civil Engineering (AREA)
  • Paleontology (AREA)
  • Mining & Mineral Resources (AREA)
  • General Life Sciences & Earth Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Environmental & Geological Engineering (AREA)
  • Ocean & Marine Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Microcomputers (AREA)
TW093111123A 2003-05-28 2004-04-21 Data processing device and mobile device TW200506607A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003150031A JP2004355163A (ja) 2003-05-28 2003-05-28 データ処理装置および電子機器

Publications (1)

Publication Number Publication Date
TW200506607A true TW200506607A (en) 2005-02-16

Family

ID=33447711

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093111123A TW200506607A (en) 2003-05-28 2004-04-21 Data processing device and mobile device

Country Status (5)

Country Link
US (4) US7490258B2 (zh)
JP (1) JP2004355163A (zh)
KR (1) KR20040103324A (zh)
CN (1) CN100409163C (zh)
TW (1) TW200506607A (zh)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007072922A (ja) * 2005-09-09 2007-03-22 Sharp Corp メモリカード用レベルシフタ
US8291295B2 (en) * 2005-09-26 2012-10-16 Sandisk Il Ltd. NAND flash memory controller exporting a NAND interface
US7631245B2 (en) * 2005-09-26 2009-12-08 Sandisk Il Ltd. NAND flash memory controller exporting a NAND interface
KR101177555B1 (ko) * 2006-02-01 2012-08-27 삼성전자주식회사 메모리 카드, 메모리 카드의 데이터 구동 방법, 그리고메모리 카드 시스템
WO2007147629A1 (en) * 2006-06-23 2007-12-27 Fractus, S.A. Chip module, sim card, wireless device and wireless communication method
US7827323B2 (en) * 2006-12-08 2010-11-02 Marvell Israel (M.I.S.L.) Ltd. System and method for peripheral device communications
WO2009014182A1 (ja) * 2007-07-24 2009-01-29 Nec Corporation データ転送装置およびデータ転送方法
US8412878B2 (en) * 2008-07-14 2013-04-02 Marvell World Trade Ltd. Combined mobile device and solid state disk with a shared memory architecture
CN101847082B (zh) * 2009-03-24 2013-12-11 鸿富锦精密工业(深圳)有限公司 外部设备接口控制电路
JP4772891B2 (ja) * 2009-06-30 2011-09-14 株式会社東芝 ホストコントローラ、コンピュータ端末およびカードアクセス方法
US20110041005A1 (en) * 2009-08-11 2011-02-17 Selinger Robert D Controller and Method for Providing Read Status and Spare Block Management Information in a Flash Memory System
US20110040924A1 (en) * 2009-08-11 2011-02-17 Selinger Robert D Controller and Method for Detecting a Transmission Error Over a NAND Interface Using Error Detection Code
US20110041039A1 (en) * 2009-08-11 2011-02-17 Eliyahou Harari Controller and Method for Interfacing Between a Host Controller in a Host and a Flash Memory Device
WO2012014475A1 (ja) * 2010-07-29 2012-02-02 パナソニック株式会社 メモリ管理ユニット、画像処理装置および集積回路
JP2012114839A (ja) * 2010-11-26 2012-06-14 Nikon Corp 電子機器
US9772651B2 (en) 2012-09-14 2017-09-26 Samsung Electronics Co., Ltd. Embedded multimedia card (eMMC), host controlling eMMC, and method operating eMMC system including the use of a switch command defining an adjustment delay for a data signal
JP7121465B2 (ja) 2016-08-18 2022-08-18 ラピスセミコンダクタ株式会社 出力信号生成回路
CN109194459B (zh) * 2018-10-08 2020-11-06 惠科股份有限公司 传输信号的数据提取方法、装置及存储介质
CN111399613B (zh) 2018-12-14 2023-03-03 华为技术有限公司 一种存储装置以及电子设备
US11520940B2 (en) * 2020-06-21 2022-12-06 Nuvoton Technology Corporation Secured communication by monitoring bus transactions using selectively delayed clock signal

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JPH08221315A (ja) * 1995-02-15 1996-08-30 Hitachi Ltd 情報処理装置
US6081146A (en) * 1996-09-25 2000-06-27 Kabushiki Kaisha Toshiba Interface circuit and interface circuit delay time controlling method
JP2993463B2 (ja) * 1997-05-08 1999-12-20 日本電気株式会社 同期回路制御装置
US5905391A (en) * 1997-07-14 1999-05-18 Intel Corporation Master-slave delay locked loop for accurate delay or non-periodic signals
US6829316B1 (en) * 1998-04-28 2004-12-07 Matsushita Electric Industrial Co., Ltd. Input circuit and output circuit
US6934461B1 (en) * 1999-01-05 2005-08-23 Interval Research Corporation Low attention recording, with particular application to social recording
US6895522B2 (en) * 2001-03-15 2005-05-17 Micron Technology, Inc. Method and apparatus for compensating duty cycle distortion in a data output signal from a memory device by delaying and distorting a reference clock
US6810486B2 (en) * 2001-03-28 2004-10-26 Intel Corporation Method and apparatus for de-skewing a clock using a first and second phase locked loop and a clock tree
US20030061429A1 (en) * 2001-09-24 2003-03-27 Wu Ming Hsiu Synchronizer for processor facility and PCMCIA card
US6650589B2 (en) * 2001-11-29 2003-11-18 Intel Corporation Low voltage operation of static random access memory
CN2526905Y (zh) * 2002-01-30 2002-12-18 记忆科技(深圳)有限公司 兼容多种移动存储卡的存储驱动装置
US6917561B2 (en) * 2002-04-29 2005-07-12 Lsi Logic Corporation Memory controller and method of aligning write data to a memory device
US6930949B2 (en) * 2002-08-26 2005-08-16 Micron Technology, Inc. Power savings in active standby mode
US7076012B2 (en) * 2002-08-29 2006-07-11 Micron Technology, Inc. Measure-controlled delay circuit with reduced playback error
US20040064749A1 (en) * 2002-09-30 2004-04-01 Grossnickle Byron D. Fully digitally controlled delay element with wide delay tuning range and small tuning error
US6839301B2 (en) * 2003-04-28 2005-01-04 Micron Technology, Inc. Method and apparatus for improving stability and lock time for synchronous circuits
US20050114725A1 (en) * 2003-11-24 2005-05-26 Qualcomm, Inc. Calibrating an integrated circuit to an electronic device

Also Published As

Publication number Publication date
US20090113231A1 (en) 2009-04-30
CN100409163C (zh) 2008-08-06
KR20040103324A (ko) 2004-12-08
US20040243877A1 (en) 2004-12-02
CN1573675A (zh) 2005-02-02
US7966512B2 (en) 2011-06-21
US20120284554A1 (en) 2012-11-08
JP2004355163A (ja) 2004-12-16
US7490258B2 (en) 2009-02-10
US8572425B2 (en) 2013-10-29
US20110231694A1 (en) 2011-09-22
US8327180B2 (en) 2012-12-04

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