TW200419765A - Semiconductor multi-package module having wire bond interconnection between stacked packages - Google Patents
Semiconductor multi-package module having wire bond interconnection between stacked packagesInfo
- Publication number
- TW200419765A TW200419765A TW092125625A TW92125625A TW200419765A TW 200419765 A TW200419765 A TW 200419765A TW 092125625 A TW092125625 A TW 092125625A TW 92125625 A TW92125625 A TW 92125625A TW 200419765 A TW200419765 A TW 200419765A
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor multi
- package module
- wire bond
- stacked packages
- package
- Prior art date
Links
Classifications
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/15321—Connection portion the connection portion being formed on the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
- H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
- H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Abstract
A semiconductor multi-package module having stacked lower and upper packages, each package including a die attached to a substrate, in which the upper and lower substrates are interconnected by wire bonding. Also, a method for making a semiconductor multi-package module, by providing a lower molded package including a lower substrate and a die, affixing an upper molded package including an upper substrate onto the upper surface of the lower package, and forming z-interconnects between the upper and lower substrates.
Applications Claiming Priority (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US41159002P | 2002-09-17 | 2002-09-17 | |
US10/632,551 US6838761B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having wire bond interconnect between stacked packages and having electrical shield |
US10/632,549 US7064426B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having wire bond interconnect between stacked packages |
US10/632,553 US7053476B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over die-down flip chip ball grid array package and having wire bond interconnect between stacked packages |
US10/632,550 US6972481B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module including stacked-die package and having wire bond interconnect between stacked packages |
US10/632,568 US7205647B2 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over ball grid array package and having wire bond interconnect between stacked packages |
US10/632,552 US20040061213A1 (en) | 2002-09-17 | 2003-08-02 | Semiconductor multi-package module having package stacked over die-up flip chip ball grid array package and having wire bond interconnect between stacked packages |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200419765A true TW200419765A (en) | 2004-10-01 |
TWI329918B TWI329918B (en) | 2010-09-01 |
Family
ID=32034538
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW100113640A TWI469301B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
TW092125625A TWI329918B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
TW098139252A TWI378548B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW100113640A TWI469301B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW098139252A TWI378548B (en) | 2002-09-17 | 2003-09-17 | Semiconductor multi-package module having wire bond interconnection between stacked packages |
Country Status (6)
Country | Link |
---|---|
EP (1) | EP1547141A4 (en) |
JP (3) | JP4800625B2 (en) |
KR (1) | KR101166575B1 (en) |
AU (1) | AU2003272405A1 (en) |
TW (3) | TWI469301B (en) |
WO (1) | WO2004027823A2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI650840B (en) * | 2014-07-09 | 2019-02-11 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
Families Citing this family (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3858854B2 (en) * | 2003-06-24 | 2006-12-20 | 富士通株式会社 | Multilayer semiconductor device |
US7364945B2 (en) | 2005-03-31 | 2008-04-29 | Stats Chippac Ltd. | Method of mounting an integrated circuit package in an encapsulant cavity |
US7429787B2 (en) * | 2005-03-31 | 2008-09-30 | Stats Chippac Ltd. | Semiconductor assembly including chip scale package and second substrate with exposed surfaces on upper and lower sides |
US7394148B2 (en) | 2005-06-20 | 2008-07-01 | Stats Chippac Ltd. | Module having stacked chip scale semiconductor packages |
SG130055A1 (en) | 2005-08-19 | 2007-03-20 | Micron Technology Inc | Microelectronic devices, stacked microelectronic devices, and methods for manufacturing microelectronic devices |
SG130066A1 (en) | 2005-08-26 | 2007-03-20 | Micron Technology Inc | Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices |
JP5522561B2 (en) * | 2005-08-31 | 2014-06-18 | マイクロン テクノロジー, インク. | Microelectronic device package, stacked microelectronic device package, and method of manufacturing microelectronic device |
US8198735B2 (en) | 2006-12-31 | 2012-06-12 | Stats Chippac Ltd. | Integrated circuit package with molded cavity |
US8124451B2 (en) | 2007-09-21 | 2012-02-28 | Stats Chippac Ltd. | Integrated circuit packaging system with interposer |
KR101688005B1 (en) * | 2010-05-10 | 2016-12-20 | 삼성전자주식회사 | Semiconductor package having dual land and related device |
KR20110124063A (en) | 2010-05-10 | 2011-11-16 | 하나 마이크론(주) | Stack type semiconductor package |
KR20110124065A (en) | 2010-05-10 | 2011-11-16 | 하나 마이크론(주) | Stack type semiconductor package |
TWI406377B (en) * | 2010-12-27 | 2013-08-21 | Powertech Technology Inc | Ball grid array package with three-dimensional pin 1 mark and its manufacturing method |
US9165906B2 (en) | 2012-12-10 | 2015-10-20 | Invensas Corporation | High performance package on package |
JP6128993B2 (en) | 2013-06-28 | 2017-05-17 | キヤノン株式会社 | Multilayer semiconductor device, printed circuit board, electronic device, and method of manufacturing multilayer semiconductor device |
KR101563910B1 (en) * | 2013-10-24 | 2015-10-28 | 앰코 테크놀로지 코리아 주식회사 | EMI shielding device for semiconductor package and method for manufacturing the same |
EP3623785A1 (en) * | 2013-10-30 | 2020-03-18 | Honeywell International Inc. | Force sensor with gap-controlled over-force protection |
US9666730B2 (en) | 2014-08-18 | 2017-05-30 | Optiz, Inc. | Wire bond sensor package |
KR101961377B1 (en) * | 2015-07-31 | 2019-03-22 | 송영희 | Land Grid Array semiconductor package |
KR101799668B1 (en) * | 2016-04-07 | 2017-11-20 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor package and manufacturing method thereof |
DE112016007565T5 (en) * | 2016-12-30 | 2019-10-02 | Intel Corporation | MICROELECTRONIC COMPONENTS DESIGNED WITH 3D STACKED, ULTRADOUND HOUSING MODULES FOR HIGH FREQUENCY COMMUNICATIONS |
KR102283390B1 (en) | 2019-10-07 | 2021-07-29 | 제엠제코(주) | Semiconductor package for multi chip and method of fabricating the same |
KR102325217B1 (en) | 2020-05-18 | 2021-11-11 | 제엠제코(주) | Multi die stack semiconductor package |
Family Cites Families (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5222014A (en) * | 1992-03-02 | 1993-06-22 | Motorola, Inc. | Three-dimensional multi-chip pad array carrier |
JPH05283608A (en) * | 1992-03-31 | 1993-10-29 | Toshiba Corp | Resin-sealed semiconductor device and manufacture thereof |
US5247423A (en) * | 1992-05-26 | 1993-09-21 | Motorola, Inc. | Stacking three dimensional leadless multi-chip module and method for making the same |
FR2694840B1 (en) * | 1992-08-13 | 1994-09-09 | Commissariat Energie Atomique | Three-dimensional multi-chip module. |
US5436203A (en) * | 1994-07-05 | 1995-07-25 | Motorola, Inc. | Shielded liquid encapsulated semiconductor device and method for making the same |
US5652185A (en) * | 1995-04-07 | 1997-07-29 | National Semiconductor Corporation | Maximized substrate design for grid array based assemblies |
US6075289A (en) * | 1996-10-24 | 2000-06-13 | Tessera, Inc. | Thermally enhanced packaged semiconductor assemblies |
JP3644662B2 (en) * | 1997-10-29 | 2005-05-11 | 株式会社ルネサステクノロジ | Semiconductor module |
JPH11243175A (en) * | 1998-02-25 | 1999-09-07 | Rohm Co Ltd | Composite semiconductor device |
JPH11265975A (en) * | 1998-03-17 | 1999-09-28 | Mitsubishi Electric Corp | Multi-layer integrated circuit device |
JP2000058691A (en) * | 1998-08-07 | 2000-02-25 | Sharp Corp | Millimeter wave semiconductor device |
US6201302B1 (en) * | 1998-12-31 | 2001-03-13 | Sampo Semiconductor Corporation | Semiconductor package having multi-dies |
JP2000269411A (en) * | 1999-03-17 | 2000-09-29 | Shinko Electric Ind Co Ltd | Semiconductor device and manufacture thereof |
JP4075204B2 (en) * | 1999-04-09 | 2008-04-16 | 松下電器産業株式会社 | Multilayer semiconductor device |
JP4284744B2 (en) * | 1999-04-13 | 2009-06-24 | ソニー株式会社 | High frequency integrated circuit device |
JP2000340736A (en) * | 1999-05-26 | 2000-12-08 | Sony Corp | Semiconductor device, packaging structure thereof and manufacturing method of them |
JP2001127246A (en) * | 1999-10-29 | 2001-05-11 | Fujitsu Ltd | Semiconductor device |
JP2001223326A (en) * | 2000-02-09 | 2001-08-17 | Hitachi Ltd | Semiconductor device |
JP2001358280A (en) * | 2000-04-12 | 2001-12-26 | Sony Corp | Lead frame, its manufacturing method, semiconductor integrated circuit device, and its manufacturing method |
JP3916854B2 (en) * | 2000-06-28 | 2007-05-23 | シャープ株式会社 | Wiring board, semiconductor device, and package stack semiconductor device |
JP2002040095A (en) * | 2000-07-26 | 2002-02-06 | Nec Corp | Semiconductor device and mounting method thereof |
JP4570809B2 (en) | 2000-09-04 | 2010-10-27 | 富士通セミコンダクター株式会社 | Multilayer semiconductor device and manufacturing method thereof |
JP2002158326A (en) * | 2000-11-08 | 2002-05-31 | Apack Technologies Inc | Semiconductor device and manufacturing method thereof |
JP3798620B2 (en) * | 2000-12-04 | 2006-07-19 | 富士通株式会社 | Manufacturing method of semiconductor device |
US6340846B1 (en) * | 2000-12-06 | 2002-01-22 | Amkor Technology, Inc. | Making semiconductor packages with stacked dies and reinforced wire bonds |
JP2002184936A (en) * | 2000-12-11 | 2002-06-28 | Matsushita Electric Ind Co Ltd | Semiconductor device and its manufacturing method |
JP2002217354A (en) * | 2001-01-15 | 2002-08-02 | Shinko Electric Ind Co Ltd | Semiconductor device |
-
2003
- 2003-09-15 WO PCT/US2003/028919 patent/WO2004027823A2/en active Application Filing
- 2003-09-15 JP JP2004568930A patent/JP4800625B2/en not_active Expired - Lifetime
- 2003-09-15 EP EP03754585A patent/EP1547141A4/en not_active Ceased
- 2003-09-15 KR KR1020057004551A patent/KR101166575B1/en active IP Right Grant
- 2003-09-15 AU AU2003272405A patent/AU2003272405A1/en not_active Abandoned
- 2003-09-17 TW TW100113640A patent/TWI469301B/en not_active IP Right Cessation
- 2003-09-17 TW TW092125625A patent/TWI329918B/en active
- 2003-09-17 TW TW098139252A patent/TWI378548B/en not_active IP Right Cessation
-
2011
- 2011-06-21 JP JP2011137096A patent/JP5602685B2/en not_active Expired - Lifetime
-
2013
- 2013-06-12 JP JP2013123601A patent/JP5856103B2/en not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI650840B (en) * | 2014-07-09 | 2019-02-11 | 日商新光電氣工業股份有限公司 | Lead frame, semiconductor device, and method for manufacturing lead frame |
Also Published As
Publication number | Publication date |
---|---|
TWI378548B (en) | 2012-12-01 |
JP4800625B2 (en) | 2011-10-26 |
TW201131731A (en) | 2011-09-16 |
JP2005539403A (en) | 2005-12-22 |
WO2004027823A3 (en) | 2004-05-21 |
KR101166575B1 (en) | 2012-07-18 |
KR20050044925A (en) | 2005-05-13 |
JP2011181971A (en) | 2011-09-15 |
EP1547141A2 (en) | 2005-06-29 |
TWI469301B (en) | 2015-01-11 |
AU2003272405A8 (en) | 2004-04-08 |
TWI329918B (en) | 2010-09-01 |
EP1547141A4 (en) | 2010-02-24 |
JP5602685B2 (en) | 2014-10-08 |
TW201017853A (en) | 2010-05-01 |
AU2003272405A1 (en) | 2004-04-08 |
JP5856103B2 (en) | 2016-02-09 |
WO2004027823A2 (en) | 2004-04-01 |
JP2013211589A (en) | 2013-10-10 |
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