玖、發明說明： 本申明案依據2002年8月23日在美國提出之案號6〇/4〇5 369臨時專 利申請案主張優先權。 【發明所屬之技術領域】 本發明與半導體侧，特別是與金屬氧化物半導體場效電晶體相關。 【先前技術】 金屬氧化物半導體場效電晶體在切換器領域有廣泛的應用（例如電 原供應開關）’而且金屬氧化物轉體場效電晶體_顧於其他類型 電曰曰版不適用的情形，金屬氧化物半導體場效電晶體之所以能適用於 1類項域’主要疋因為它們具有的高速切換能力及極低的電力需求， 」而在金屬氧化物半導體場效電晶體中所出現的動能損失佔了電壓 準位轉換(D〇tG-DG)總損失的-大部分，其雜損失與裝置電壓升降 的人數成正比，亚與漏極閘電容，也就是裝置的米勒電容❿或⑹成 正比。 如圖3所示的米勒電容會在傳統金屬氧化物半導體場效電晶體的 甲 1或曲線中造成「平坦」的區域，這塊稱之為米勒區的區域代表裝置 正由凌結狀_換為傳導狀態，或正由料狀雜換躲結狀態。切 Ή貝主要錢生麵植，@為裝置的電流與賴在那個時候都报 ν降低料電容可，少裝置在傳導與賴狀態_換所耗費的時 間，從而減少切換乾損。 降低米勒私各的方式，是減少閘極與沒極重疊的範圍，在先前的裝 200409458 置中，重叠的區域包括·溝渠的底部，因此，之前有許多企圖減少 米勒電容的技麟重點放在縮傾渠的寬度，以咖溝渠底部的寬度 並縮小重_圍’然而，進-步縮減溝渠寬度的能力受限於颠刻狹窄 溝渠的能力及使用閘極電極材質填充狹窄溝渠的需求。 因此，在這項技術中所需要的，是降低金屬氧化物半導體場效電晶 體的米勒電容，以減少切絲損，更明確地說，是要降低制特定溝 渠寬度的金屬氧化物半導體場效電晶體的米勒電容。 【發明内容】 本發明提出一項適用於半導體裝置的閘門結構。 本發明的形式有-種，該形式由城電極及遮蔽電極所組成，遮蔽電 極的各部分被安置於紐極及該井區，城電齡部分縣置於該井 區及該源極，在切換電極、井區及源極間安裝有第二介電層，第二介 電層則安裝於遮蔽電極與切換電極間。 本發明的優點在於，在使用指定溝渠寬度的半導體裴置上，該裝置的 米勒電容比先前裝置要小。 本發明更大的優點在於縮短裝置切換的時間，並減少切換耗損。 【實施方式】 現在請參考圖式’ _是圖丨’該圖巾展* 了先前溝渠閘n式金屬氧化 物半導體場效電晶體裝置的概魏關，金騎化物轉體場效電晶 體裝置10包括沒極12、井區14、本體區16、源極18、閘門電極2〇 及溝渠24，前述這些項目皆位於基底26上。 7 α羊兒Ν+型基底26包括構成Ν-汲極12的上層26a，Ρ-型井 品I展至;及極12，在上層26a的上方表面（未緣出）及井區μ的 一部分裡形成了高度換雜式P+本體區16，上層26a及井區14的一部 f與鄰近的_4職成高度_式N職18，_4的側邊與底 (未、曰出）以"电材負28 (如氧化物）作為襯裡，閘門電極2〇以傳 導材質30 (如摻雜式多砂）組成，放置於溝渠24中，並由溝渠24 /緊卻上層26a的上方表面，如此一來，閘門電極2〇就能連接並 或貝牙L道區32 ’内層介電層％ (如硼鱗石夕玻璃）延展至閘門電極 2〇及源極18的一部分上，源極金屬層36延展至上層26a的上方表面， 並接觸到本體區16與源極18。 現在請參相2，射展林發明之溝渠式金屬氧化物半導體場效 電曰曰版裝置之具體形式的概要截面圖，金屬氧化物半導體場效電晶體 100包含許多與金屬氧化物半導體場效電晶體1〇大致上或基本上類似 的特性與結構，如同金屬氧化物半導體場效電晶體1()，金屬氧化物半 導體場效電晶體議包含沒極112、井區114、本體116、源極118、 閘門結構120及溝渠124，前述各項皆位於基底126之上，然而，有別 於金屬氧化物半導體場效電晶體j 〇的閘門電極2〇，金屬氧化物半導體 場效電晶體1〇〇的閘門電極12〇包含可以降低米勒電容並提高切換速 度的雙重豎閘門結構，該結構將會進一步詳細說明。 金屬氧化物半導體場效電晶體1〇〇位於N+型基底126上方，該基底 包含一個構成N-沒極112的上層腿，在上層126a的上方表面（未 繪幻靡m的—部顺了高梅心輸ii 上方表面、井區114 —部份及緊鄰的溝 …層· 源極118，側邊下方部分緊、亚構成了喊穆雜式财 I刀家一遮臧電極12〇b 出）則以介電材㈣為概裡，例如氧化物⑤24的底部（未繪 金屬氧化物铸體場效電晶體⑽的 半導體場嫌伽她單，、蝴 被分Γ此分麵目互咖切換電極與峨極，更精確地說 紙。構120包3閘門電極12〇a與閘門電極㈣，内層介電層⑶覆 盖在間門電極結構12Qa上方，並延展至源極m，電謂a與電極 都由傳導材質組成，例如摻雜式多㈣，並放置於溝渠124中， 由一層料材魏成㈣—或頂部電極咖水平於或向_入上層 施的上方表面。第一/頂部電極_由緊鄰的上層腕第一表面開 始’與源極m以共面延伸的方式向溝渠124底部延伸一定的距離， 使第一/頂部電極12〇a與井區114水平共面。 由第二層傳導材質構成的第二或底部電極應則由溝渠124的底 狀伸第一電極1施的（下方部份和沒極⑴及井區⑽的結籲 合面（未繪出）水平共面’第二(底部）電極屢的另-（上方）部分 則與源極118 *第-電極聰水平共面，如此一來，第—電極· 與第二電極12Gb個別相對於溝渠124的深度彼此覆蓋 ，側邊緊鄰切換 電極12Ga及遮蔽電極’顧的±方部分以介電材質138覆蓋，例 如氧化物，如此-來，介電材質138將被配置於閘門電極胸與腿 一如先前所述，遮蔽電極120b與切換電極120a至少有一部份會隨 著溝渠124的深度相互重疊，特別是在圖2的具體呈現中，由於閘門 電極120a位於表面，使得緊鄰的遮蔽電極i2〇a構成了一個凹室14〇， «亥凹至位側邊142及遮蔽電極i2〇b頂蓋部分144之間，及受到側邊142 的包圍’切換電極120a的側邊142與遮蔽電極120b的頂蓋部分144 在轴向或相對於溝渠124的深度方向至少有一部份相重疊，因此，便 提供了重疊的閘門結構，下文將更進一步地說明，遮蔽電極12〇b的頂 盍部分144及其壁架146係由蝕刻構成遮蔽電極i2〇b之傳導材質層的 上方表面（未繪出）的側邊、上方及下方的介電層128部分造成的。 基本上，閘門或切換電極12〇a的功能是做為切換電極以開關金屬 氧化物半導體場效電晶體，閘門或遮蔽電極膽的功能則是構成通道 132的一部分，為了使金屬氧化物半導體場效電晶體1〇〇進入傳導模 式，底部/遮蔽電極12〇b必須適當地加壓及/或開啟，底部或遮蔽電極 12〇b可以持續加壓至開啟或傳導狀態，也可以在_事件前加壓，以 便使其進入傳導模式將裝置準備妥當，當底部/遮蔽電極·開啟時， 將以閘門/底部電極120讀流經金屬氧化物半導體場效電晶體⑽的 電流進行控制。 如同對先前技術金屬氧化物半導體場效電晶體10的描述及圖示i 所不’介於閘極20與難12間的重疊區域〇L包括閘門溝渠^的底 部，她之下，閘門切換電極並未與沒極112重疊，閘門切換電 極施與汲極112間唯一重疊的部分，是通道區132的寬度w，其寬 度通常為數百埃。通道132是以對遮蔽電極·加賴來製造，通道 132由沒極U2沿著溝渠124及遮蔽電極ι施貫通至井區⑴，因此， 金屬氧化物半導體場效電晶體議中的漏極閘重疊(也就是通道區谈 的寬度）比金屬氧化物半導體場效電晶體1〇中的漏極間重疊（也就是 溝渠24的底部，通常介於〇· 3到h ◎個微米間）大為減少，如此一來， 月)述”漏極閘重區域基本上成正比的米勒電容在金屬氧化物半導體 場效電晶體100中也比金屬氧化物半導體場效電晶體1〇大為減少。 米勒電容在金屬氧化物半導體場效電晶體100中相對於金屬氧化物 半V體:W效電晶體10的改善（也就是減少）繪於圖3，該圖中繪出了 各裝置的電壓波形。金屬氧化物半導體場效電晶體1() _極龍 波形圖VgH)在閘極電壓Qgate由接近〇 〇 (零）到接近2 〇〇 χ 1〇_ls庫侖 每微米時，有一塊幾近平坦的區域，而金屬氧化物半導體場效電晶體 1〇〇的閘極電壓波形Vgl。。幾乎沒有這種常見的平坦區域，因此，該圖顯 示出米勒電容有戲劇性的減少。 必須要特別注意的一點是，為了避免對金屬氧化物半導體場效電晶 體100中的電流造成任何重大的不利影響，當裝置由僅將遮蔽電極12〇b 加壓的狀癌、轉變為主或切換閘門12〇b也被加壓的狀況時，通道區132 必須出現並維持在開啟狀態，這項轉變發生的臨界電壓及最終的驅動 電壓強度是由P-型井區114及源極118結合處的交叉摻雜濃度決定。 圖4顯示源極118在井區114中不同深度時的淨摻雜刺激分析圖， 200409458 圖4的垂直軸對應於源極118與井區114的分界面（也就是井區114 的「頂端」），所以它會被指定為相對於井區零深度的值，遮蔽電 極120b位於零深度以下0· 6到〇· 8微米處，井區的漏極邊約位於零深 度以下0· 7至0.9微米處，因此，在井區U4中的淨摻雜相當高，舉 例來說’源極118約接近1· 0 X ι〇π，並由該數值降低至貼近遮蔽電極 120b與汲極112之井區114部分的3.〇 x 1(^到15 χ 1〇-16的摻雜濃 度，井區114與汲極112的分界面可由最小摻雜濃度找出來，大約位 在零深度以下0· 84到0· 86微米處。 由於臨界與驅動電壓直接與氧化物厚度及淨摻雜程度成正比，前述擊 摻雜分析能確保使用足夠厚度的氧化物層，例如在汲極1C附近的厚 度為100至1500埃，增加的氧化物層能夠確保遮蔽閘門12〇b轉化成 切換閘門120a，並維持通道區132中電流的連續。 在操作時，遮蔽電極12〇b會被升壓或加壓至足夠維持驅動電壓電 位的電壓量’在效果上，遮蔽電極12〇1)會將漏極閘重疊區予以充電， 該部分是在傳統裝置中產生米勒電容的區域，當漏極閘重疊區被遮蔽 電極120a充電之後，金屬氧化物半導體場效電晶體1〇〇就能以施加在_ 切換電極120a上的極小電壓輕鬆地開啟及/或關閉。 &又计為垂直式溝渠金屬氧化物半導體場效電晶體的金屬氧化物半 導體場效電晶體1〇〇的製作可由圖1〇中描繪的處理流程3〇〇來完成， 處理流程300 到製造12〇前，採用的都是傳統上製造溝渠閘門 式金屬氧化物半導體場效電晶體的製造流程，更明確地說，溝渠124 12 電層128會被覆蓋在側 係由傳統溝渠製造程序302蝕刻而成，然後介 邊及溝渠124的底部’這道程序是傳紅㈣_介電層製程购，在這 之後’製造金屬氧化物半導體場效電晶體⑽的製矛呈就與傳統製 程不同。 在第-介電層製程謝安置好介電層128後，傳導材質的第一層會 被安置在側邊氧化過的溝渠124中，成為安裝遮蔽電極步驟咖的Y 部分，然後，第-層傳導材質會在遮蔽電極侧步驟3〇8被侧為所 需的厚度，例如使収應式離子等向侧，接下來，間介電層 在閘η介電層飯刻步驟·進行侧，閘門介電姓刻步驟_(例如採攀 用等向也會移除介電材質128旁指定數量的傳導材f丨鳥，形 成遮蔽電極120b的頂蓋結構144及其壁架146，可以額外採取一道或 數道侧步驟312移除遮蔽電極120b中的尖銳邊緣及/或尖角，接下 來’在第二介電層安置步驟314中會安置閘門介電層138，介電層138 會塗裝在遮蔽電極聰的頂蓋144及壁架146的上方表面（未繪出） 及。玄電極上方溝渠124的側邊，然後，在安置切換電極步驟3丨6中， 第二傳導材質層會安置於溝渠124中，纖步驟318包括該技術中所_ 使用的傳統步驟及結束步驟。 現在，請參考圖5，圖中顯示本發明的第二個具體實施例，金屬氧 化物半‘體場效電晶體是一個表面閘門垂直式金屬氧化物半導體場效 電晶體’其中包含一個與金屬氧化物半導體場效電晶體1〇()大致類似 的雙重豐閘門結構，金屬氧化物半導體場效電晶體4〇〇包含許多與金 屬氧化物半導體場效電晶體1GG大致類似的特性與結構，與金屬氧化 物半導體場效電晶體100 -樣，金屬氧化物半導體場效電晶體獅包 含祕412、井區414、本體416、源極418及閘門結構，前述各 項皆位於基底426上，相較於金屬氧化物半導體場效電晶體觸，金屬 氧化物半導體場效電晶體侧崎絲面省技直式金屬氧化物半導 體場效電晶體，不過，就如關結構⑽—樣，閘門電極結構物包 含-個能減少傳統金屬氧化物半導體場效電晶體裝置中的米勒電容及 切換耗損的雙重疊閘式結構。 金屬氧化物半導體場效電晶體4〇〇位於N+型基底概±，該基底包 各位在N及極412中的上層426a，P-井區414延伸至沒極412的區域， 在上層426a的上方表面（未緣出）及井區414的相關位置構成了高度 摻雜P+本體區416，源極418也由上層426的上方表面及井區414的 相對αΡ位構成。源極418形成於本體區416附近，並/或與之相連，使 源極418裝置於本體區416間，閘門介電層428，例如氧化物，塗裝於 上層416a的上方表面上，閘門介電層428並遮蓋了井區414及源極418 的一部分。 金屬氧化物半導體場效電晶體400的閘門結構420如同金屬氧化物 半導體場效電晶體100的閘門電極結構丨2〇，被分割為彼此相互重疊的 切換電極與遮蔽電極，閘Η結構420包含-對切換電極她及-對遮 蔽電極420b，這些電極安置在介電層428、434及438及/或其上方。 切換電極420a由一層傳導材質構成，例如摻雜式多晶矽，介(誘） 電極安置於閘門介電層428之上’並經過钱刻，形成兩個分離的切換 電極420a ’各切換電極420a的各部分被安置在相對應的源極418及井 區414上方，並/或與各舰垂直共面，然後切換電極她與問門介 電層428被第二介電層438覆蓋，例如氧化物，第二介電層伽延伸 至介於切換電極420a區域中閘門介電層似的部分會在一祕刻手續 中移除’紐刻手續會涵蓋切換電極她，但不影響第二介電層錢。 接下來，藉由在第-介電層428及第二介電層438上方安置第二層 傳導物質’例如摻雜式多晶石夕’形成遮蔽電極概，第二層傳導材質 會被蚀刻成遮蔽電極傷，各遮蔽電極伽的各部分會安置在相對應馨 的井區4U及相鄰的沒極412上方，並/或與其垂直共面以形成重疊 的雙閘門結構420。尤其，遮蔽電極娜驗刻將在切換電極條上 方（也就是與其重疊）留下預先決定好的第二層傳導材質，且不會影 響切換電極’如此一來，各遮蔽電極雜就會安置在相對應的切換電 極420a上方並與之重疊，形成能減少傳統金屬氧化物半導體場效電晶 體裝置中求勒電容並改善切換速度的雙重疊表面閘門式結構伽。接下 來’内層介電層434會被塗裝在間Π結構420及介電層428與438上。籲 現在，請參 6，這是本發明另—項具體實施例，金屬氧化物半 導虹暴效電曰曰體5〇〇也被設計成表面間門垂直式金屬氧化物半導體場 效電晶體，其包含與金屬氧化物半導體場效電晶體侧的閉η結構42〇 類似的雙重疊表面閘門結構52〇。在間門結構42〇中，是由各遮蔽電極 420b的-部分覆蓋了相對應的切換電極伽，但在閘門結構咖中， 15 各切換電極麵航含績桃是㈣置在上方)姆應遮蔽電 極420a的相對部位(未繪出），金屬氧化物半導體場效電晶體_剩下 來的結構大致上與金屬氧化物半導體場效電晶體棚_，财贊述。 現在請參相7，這是本發明之金屬氧錄半導體場效電晶體進一 步的具體實施例，金屬氧化物半導體場效電晶體_被設計成側式金 屬氧化物半導體場效電晶體，除了重疊閘門結構620之外，在結構上 ”傳、、、先金屬氧化物半導體場效電晶體相同，金屬氧化物半導體場效電 晶體600的閘門結構620被區分為切換電極620a與遮蔽電極620b，這 兩者相互重疊，而特別安置在介電層628、防4及防8及/或其上方。 在閘門介電層628的上方安置了-層傳導材質，例如摻雜式多晶 矽，該材質會在之後被蝕刻成遮蔽電極620b。其各部位在安置時至少 有部分位在井區614及汲極612之上，並/或與之垂直共面，遮蔽電極 620a與閘門介電層628之上覆蓋著第二介電層638，例如氧化物，之 後會進行餘刻製程，讓遮蔽電極620b的頂端及側邊覆蓋著第二介電層 638，並由閘門介電層628上移除第二介電層638。 然後，在第一介電層628及第二介電層638上方放置了第二層傳導 材質，例如摻雜式多晶矽，以製造切換電極62〇a，第二層傳導材質會 被蝕刻成切換電極620a，其各部分會被安放在井區614及源極618上 方，並/或與其垂直共面，以形成重疊式雙閘門結構620，尤其，有一 部份的切換電極620a被安置在第二介電層638上，並延伸至遮蔽電極 620b以形成重疊閘門結構620，減少傳統金屬氧化物半導體場效電晶 體裝置中的米勒電容並加快切換速度。 現在請參考圖8，這仍是本發明的金屬氧化物半導體場效電晶體的 、步”體只知例，金屬氧化物半導體場效電晶體700是設計上與金 屬氧化物半導體場效電晶體咖大致類似的側式金屬氧化物半導體場 效電晶體，但是在金屬氧化物半導體場效電晶體600中，切換電極620a P认伸並重豐遮蔽電極62〇b，在金屬氧化物半導體場效電晶體 中’則包含有-部份延伸，且/或與切換電極挪t疊的遮蔽電極 雇’金屬氧化物半導體場效電晶體7〇〇剩餘的結構與金屬氧化物半 ‘體场效電晶體6〇〇類似，茲不贅述。 現在請參考圖9 ’這是本發明的金屬氧化物半導體場效電晶體另一 項具版實細例’金屬氧化物半導體場效電晶體_被設計成溝渠閘門 式金屬氧化物半導體場效電晶體，除了重疊閘門結構的細節外， 與金屬氧化物半導體場效電晶邀100大致相同，簡單的來說，相較於 以重叠閘門結構120中的方式形成凹室及頂蓋結構使閘門結構重疊， 金屬氧化物半導體場效電晶體_以分別製造凸面體及凹面體來構成 切換及遮蔽電極的相反或相對表面來完成重疊_結構·。 更明確地說’金屬氧化物半導體場效電晶體_包含一個重疊間門 結構820 ’該結構在溝渠824中形成一個切換電極8施及遮蔽電極 _，切換電極驗有個向外凸的τ表面82k，舰_祕則有 向内凹的上表面·’其上覆有—層介電層_，這使得上表面具有 與下凹的上表面821b幾乎_的鲜，切縣極驗安置於介電材 貝838的下凹層上方，使得切換電極8施的外凸下表面犯^擁有與 下凹的上表面821b幾乎相同的凸起，下凹上表面⑽的凹度能射 保切換to 8施與遮蔽電極嶋以相對於溝渠似的方向或深度相 且如此來在金屬氧化物半導體場效電晶體⑼〇終究形成了 月b降低雜電容並提升娜速度的重疊溝渠關式結構8⑼。 必須特別注意的-點是，在圖9的具體實施例及先前敘述卜切換 電極820a有外凸的下表面821a，遮蔽電極獅則有内凹的上表面 821b，内凹上表面821b的凹度與外凸下表面821a的凸度使得切換電 極820a與遮蔽電極·在溝渠似的方向或深度上相互重疊，不過， 必須瞭解到金屬氧化物半導體場效電晶體咖的結構也可予以改變， 例如讓切換雜82Ga有内凹的下表面821a，讓遮蔽電極獅擁有外 凸的上表面821b，並讓外凸上表面821b的凸度及内凹下表面82la的 凹度相配合，讓切換電極820a及遮蔽電極82〇b在溝渠824的方向或 深度上相互重疊，形成重疊溝渠閘門式結構。 在圖2的具體貫施例中，切換電極12〇a的側邊142及遮蔽電極12〇b 的頂蓋部分144在相對於溝渠124的軸向或深度方向上有部分重疊， 形成重疊’電極結構，然*，金屬氧化物半導體場效電晶體1〇〇的 閘門結構也可以予以改變，例如，軸換電極具有頂蓋或投影部位， 並讓遮蔽電極擁有凹室，以提供類似的重疊閘門電極結構，這基本上 疋金屬氧化物半導體場效電晶體1〇〇的閘門12〇的上下顛倒版。 雖然本發明的描述使得它看起來有偏好的設計模式，但本發明仍可 ^0409458 在本揭露資訊的精神與範圍内進一步修改，因此，本發明專利申請案 企圖涵蓋任何使用此處揭露之基本原則所為對本發明的改變、使用或 適用’此外，本發明專利申請案企圖涵蓋在該技術領域中由目前揭露 資訊所衍生的、與其相關且在附加申請專利範園内已知或成為慣例的 作法。 10金屬氧化物半導體場效電晶體 12 N-沒極 14井區 16本體區 18 N+源極 20閘門電極 24溝渠 26 N+型基底 26a基底上層 28介電材質 30傳導材質 32通道區 34内層介電層 36源極金屬層 100金屬氧化物半導體場效電晶體 112 N-汲極 114井區 116本體區 118 N+源極 120閘門電極 120a閘門電極、第一（頂部）電極 200409458 120b閘門電極、第二(底部）電極 124溝渠 126 N+型基底 126a基底上層 128介電層 132通道區 134内層介電層 138介電材質/介電層 140凹室 142側邊 144頂蓋部分 | 146壁架 300處理流程 302蝕刻溝渠 304安置第一介電層 30Θ安置遮蔽電極 308蝕刻遮蔽電極 310閘門介電層蝕刻 312附加#刻 314安置第二介電層 316安置切換電極 <1 318剩餘步驟 400金屬氧化物半導體場效電晶體 412 N-汲極 414井區 416本體區 418 N+源極 420閘門結構 420a切換電極 20 200409458 420b遮蔽電極 426 N+型基底 426a基底上層 428介電層 434介電層 438介電層 500金屬氧化物半導體場效電晶體 512 N-汲極 514井區 516本體區 518 N+源極 520閘門結構 520a切換電極 520b遮蔽電極 526 N+型基底 528介電層 534介電層 538介電層 600金屬氧化物半導體場效電晶體 612 N-汲極 614井區 616本體區 618 N+源極 620閘門結構 620a切換電極 620b遮蔽電極 628第一介電層 634介電層 638第二介電層 200409458 700金屬氧化物半導體場效電晶體 712 N-沒極 714井區 716本體區 718 N+源極 720閘門結構 720a切換電極 720b遮蔽電極 800金屬氧化物半導體場效電晶體 812 N->及極 814井區 816本體區 818 N+源極 820閘門結構 824溝渠 820a切換電極 820b遮蔽電極 828介電層 834介電層 838介電層 【圖式簡單說明】 參照下列關於發明的具體說明及其圖示，將能夠容易明白及瞭解前 述發明及該發明其他特性與優點及其達成的方式。 圖1是先前溝渠金躲化辨導體赋結構技躺概要截面圖。 圖2是本發明之金屬氧化物半導體閉式架構的概要截面圖。 圖3是先前金屬氧化物半導_式結構與圖示2之金屬氧化物轉體说明 Description of the invention: The present declaration claims priority based on the provisional patent application No. 60/4055369 filed in the United States on August 23, 2002. [Technical Field to which the Invention belongs] The present invention relates to a semiconductor side, and particularly to a metal oxide semiconductor field effect transistor. [Previous technology] Metal oxide semiconductor field effect transistors have a wide range of applications in the field of switchers (such as electrogen supply switches), and metal oxide swivel field effect transistors are not suitable for other types of electricity. In some cases, the reason why metal oxide semiconductor field-effect transistors can be applied to the first category is mainly because of their high-speed switching capabilities and extremely low power requirements. The loss of kinetic energy accounts for most of the total loss of voltage level conversion (DotG-DG), and its miscellaneous loss is directly proportional to the number of people going up and down the device voltage, and the drain gate capacitance, which is the Miller capacitance of the device. Or ⑹ is directly proportional. The Miller capacitor shown in Figure 3 will cause a "flat" area in the A1 or curve of a traditional metal oxide semiconductor field effect transistor. This area, called the Miller area, represents that the device is in the form of a Ling junction. _ Change to a conductive state, or to avoid knotting by material miscellaneous exchange. The main source of money is to cut the surface, @@ means that the current of the device and Lai are reported at that time. Ν can reduce the material capacitance, and reduce the time it takes for the device to conduct and switch, thereby reducing the switching dry loss. The way to reduce Miller ’s individuality is to reduce the overlap between the gate and the non-pole. In the previous installation of 200409458, the overlapping area includes the bottom of the trench. Therefore, there have been many previous technical focuses to reduce Miller ’s capacitance. It is placed on the width of the diversion canal to reduce the width of the trench and reduce the weight. However, the ability to further reduce the width of the trench is limited by the ability to invert the narrow trench and the need to fill the narrow trench with the gate electrode material. . Therefore, what is needed in this technology is to reduce the Miller capacitance of the metal oxide semiconductor field effect transistor to reduce the wire loss, and more specifically, to reduce the metal oxide semiconductor field with a specific trench width. Miller Capacitors for Effect Transistors. SUMMARY OF THE INVENTION The present invention provides a gate structure suitable for a semiconductor device. The form of the present invention is one kind. The form is composed of a city electrode and a shielding electrode. Each part of the shielding electrode is placed in the New Zealand and the well area. Some counties of the city electricity age are placed in the well area and the source electrode. A second dielectric layer is installed between the switching electrode, the well region and the source, and the second dielectric layer is installed between the shielding electrode and the switching electrode. An advantage of the present invention is that the device has a smaller Miller capacitance than a previous device on a semiconductor device using a specified trench width. The greater advantage of the present invention is that it shortens the switching time of the device and reduces the switching loss. [Embodiment] Now please refer to the drawing '_is a figure 丨' This drawing shows the general outline of the previous trench gate n-type metal oxide semiconductor field effect transistor device 10 includes the electrode 12, the well region 14, the body region 16, the source electrode 18, the gate electrode 20, and the trench 24. The foregoing items are all located on the substrate 26. 7 α Shepherd N + -type substrate 26 includes an upper layer 26a constituting the N-drain electrode 12 and a P-type well product I; and pole 12, on the upper surface (not margined) of the upper layer 26a and a portion of the well area μ A height-changing hybrid P + body area 16 is formed here, an upper part 26a and a part f of the well area 14 are adjacent to the _4 post height_form N post 18, and the sides and bottom of the _4 (not, say) The negative electrode 28 (such as oxide) is used as a lining, and the gate electrode 20 is composed of a conductive material 30 (such as doped poly-sand), and is placed in the trench 24, and is formed by the trench 24 / tight upper layer 26a, In this way, the gate electrode 20 can be connected and extended to the gate electrode 20 and a portion of the dielectric layer 32 '(such as borosilicate glass) on the gate electrode 20 and a portion of the source 18, and the source metal The layer 36 extends to the upper surface of the upper layer 26 a and contacts the body region 16 and the source electrode 18. Now please refer to Phase 2. A schematic cross-sectional view of a specific form of a trench-type metal-oxide-semiconductor field-effect device invented by Shezhan Lin. The metal-oxide-semiconductor field-effect transistor 100 includes many The transistor 10 has substantially or substantially similar characteristics and structure, as the metal oxide semiconductor field effect transistor 1 (). The metal oxide semiconductor field effect transistor includes a pole 112, a well 114, a body 116, and a source. The electrode 118, the gate structure 120 and the trench 124 are all located on the substrate 126. However, the gate electrode 20 and the metal oxide semiconductor field effect transistor 1 are different from the metal oxide semiconductor field effect transistor 1 The gate electrode 12 of 〇〇 includes a double vertical gate structure that can reduce the Miller capacitance and increase the switching speed. This structure will be further explained in detail. The metal oxide semiconductor field effect transistor 100 is located above the N + type substrate 126, which includes an upper leg constituting the N-pole 112, on the upper surface of the upper layer 126a. The upper surface of Meixin Lost II, the well area 114 — part and the adjacent trench ... layer · source 118, the part below the side is tight, and the sub-composition constitutes a mixed electrode (a knife and a hidden electrode 12b) Dielectric materials are used as an example, such as the bottom of the oxide ⑤24 (the semiconductor field of the unpainted metal oxide cast field effect transistor 嫌 semiconductor is suspected to be catalyzed, and the butterfly is divided into different facets. And Eji, more precisely paper. Construct 120 packs of 3 gate electrodes 120a and gate electrodes ㈣, the inner dielectric layer ⑶ covers the gate electrode structure 12Qa and extends to the source electrode m, which is called a and the electrode Both are made of conductive materials, such as doped polyfluoride, and are placed in the trench 124, with a layer of material Weicheng ㈣—or the top electrode cavities are horizontally or toward the upper surface of the upper layer. First / top electrode_ Starting from the first surface of the immediate upper wrist, it extends coplanarly with the source m. The bottom of the trench 124 extends a certain distance, so that the first / top electrode 120a is horizontally coplanar with the well 114. The second or bottom electrode composed of the second layer of conductive material should extend from the bottom of the trench 124 to the first electrode. The second (bottom) electrode of the second (bottom) electrode repeatedly with the-(upper) part of the source (118) -The electrodes are horizontally coplanar. In this way, the first electrode and the second electrode 12Gb individually cover each other with respect to the depth of the trench 124, and the sides are close to the switching electrode 12Ga and the shielding electrode's ± square part with a dielectric material 138. Overlays, such as oxides, so that the dielectric material 138 will be placed on the gate electrode chests and legs. As described previously, at least part of the shielding electrode 120b and the switching electrode 120a will overlap each other with the depth of the trench 124. Especially in the specific representation of FIG. 2, since the gate electrode 120 a is located on the surface, the shielding electrode i2 a immediately adjacent constitutes a cavity 14 〇, the recessed side 142 and the covering portion of the shielding electrode i 2 b Between 144, and receive side 142 bags The side 142 of the surrounding switching electrode 120a and the top cover portion 144 of the shielding electrode 120b overlap at least partially in the axial direction or the depth direction with respect to the trench 124. Therefore, an overlapping gate structure is provided, which will be further described below. To explain, the top part 144 of the shielding electrode 12b and its wall frame 146 are formed by etching the sides of the upper surface (not shown) of the conductive material layer of the shielding electrode i2b, the dielectric layer above and below. It is caused by 128. Basically, the function of the gate or the switching electrode 12a is to switch the metal oxide semiconductor field effect transistor as the switching electrode, and the function of the gate or the shielding electrode is to form a part of the channel 132. The metal oxide semiconductor field effect transistor 100 enters the conduction mode. The bottom / shielding electrode 120b must be appropriately pressurized and / or turned on. The bottom or shield electrode 120b can be continuously pressurized to the on or conductive state. It can be pressurized before the event in order to put it into conduction mode and prepare the device. When the bottom / shield electrode · opens, it will read through the gate / bottom electrode 120 to flow through the metal oxidation Crystal semiconductor field effect ⑽ current is controlled. As described and illustrated in the prior art metal oxide semiconductor field-effect transistor 10, the area between the gate 20 and the gate 12 is not overlapped. The gate includes the bottom of the gate trench ^. Below her, the gate switching electrode It does not overlap with the electrode 112, and the only overlap between the gate switching electrode and the drain electrode 112 is the width w of the channel region 132, which is usually several hundreds of angstroms. The channel 132 is made by shielding electrode Galais. The channel 132 is connected to the well area by the electrode U2 along the trench 124 and the shielding electrode. Therefore, the drain gate of the metal oxide semiconductor field effect transistor is discussed. The overlap (that is, the width of the channel area) is larger than the overlap between the drains in the MOSFET 10 (that is, the bottom of the trench 24, usually between 0.3 and h ◎ microns). As a result, the Miller capacitance, which is substantially proportional to the drain gate weight region, is also significantly reduced in the metal oxide semiconductor field effect transistor 100 compared to the metal oxide semiconductor field effect transistor 10. The improvement (ie, decrease) of the Miller capacitor in the metal oxide semiconductor field effect transistor 100 compared to the metal oxide half-V body: W effect transistor 10 is shown in FIG. 3, and the voltage of each device is shown in the figure. Waveform. Metal oxide semiconductor field-effect transistor 1 () _ polar dragon waveform VgH) When the gate voltage Qgate changes from close to 0 (zero) to close to 2 0 0 × 1 0_ls Coulomb per micron, there is a piece of several Near-flat area, while metal oxide semiconductor The gate voltage waveform Vgl of the effect transistor 100 has almost no such common flat area, so the figure shows a dramatic reduction in Miller capacitance. One point that must be paid special attention is to avoid metal oxidation The current in the biosemiconductor field-effect transistor 100 causes any significant adverse effect. When the device is changed from a cancerous state that only presses the shield electrode 12b, or the switching gate 12b is also pressurized, The channel region 132 must be present and maintained in the on state. The threshold voltage at which this transition occurs and the final drive voltage strength are determined by the cross-doping concentration at the junction of the P-type well region 114 and the source 118. Figure 4 shows the source Analysis diagram of net doping stimulus of 118 at different depths in well region 114, 200409458 The vertical axis of Figure 4 corresponds to the interface between source 118 and well region 114 (that is, the "top" of well region 114), so it will Designated as a value relative to the zero depth of the well area, the shielding electrode 120b is located at 0.6 to 0.8 micrometers below zero depth, and the drain edge of the well area is approximately 0.7 to 0.9 micrometers below zero depth. Therefore, U4 in the well The net doping is quite high, for example, 'source 118 is approximately close to 1.0 0 X ιππ, and decreases from this value to 3.0 × 1 (close to the part of the well region 114 of the shield electrode 120b and the drain 112). ^ To 15 χ 1〇-16 doping concentration, the interface between the well region 114 and the drain electrode 112 can be found out by the minimum doping concentration, about 0. 84 to 0. 86 microns below the zero depth. The driving voltage is directly proportional to the oxide thickness and net doping degree. The foregoing doping analysis can ensure that an oxide layer of sufficient thickness is used. For example, the thickness near the drain electrode 1C is 100 to 1500 angstroms. The added oxide layer can It is ensured that the shielding gate 120b is converted into the switching gate 120a, and the continuity of the current in the passage area 132 is maintained. In operation, the shielding electrode 12b will be boosted or pressurized to a voltage amount sufficient to maintain the driving voltage potential. In effect, the shielding electrode 12b will charge the drain gate overlap area, which is in In the area where the Miller capacitance is generated in the conventional device, after the drain gate overlap area is charged by the shield electrode 120a, the metal oxide semiconductor field effect transistor 100 can be easily turned on with a very small voltage applied to the _ switching electrode 120a. And / or closed. & Production of a metal oxide semiconductor field effect transistor, which is also referred to as a vertical trench metal oxide semiconductor field effect transistor, can be completed by the process flow 300 depicted in FIG. 10, and the process flow 300 to manufacturing Before 12 o’clock, the traditional manufacturing process of trench gate metal oxide semiconductor field effect transistors was used. More specifically, the trench 124 12 electrical layer 128 will be covered on the side by the traditional trench manufacturing process 302. It is then formed, and then the process of the junction edge and the bottom of the trench 124 is passed through the process of dielectric layer manufacturing. After that, the manufacturing method of the metal oxide semiconductor field effect transistor is different from the traditional process. After the dielectric layer 128 is placed in the first dielectric layer process, the first layer of conductive material will be placed in the oxidized trench 124 on the side to become the Y part of the step of installing the shielding electrode. Then, the first layer The conductive material will be shielded to the desired thickness at step 308. For example, the receptive ions will be isotropic. Next, the interlayer dielectric layer will be etched in the gate and the dielectric layer. Dielectric name engraving steps (for example, the use of isotropy will also remove a specified number of conductive materials f 丨 next to the dielectric material 128 to form a top cover structure 144 and a wall frame 146 of the shielding electrode 120b, which can be taken in addition Or several side steps 312 remove the sharp edges and / or sharp corners in the shielding electrode 120b. Next, in the second dielectric layer placement step 314, a gate dielectric layer 138 will be placed, and the dielectric layer 138 will be coated on The top surface (not shown) of the top cover 144 and the wall frame 146 of the electrode Cong are shielded. The side of the trench 124 above the xuan electrode, and then, in the step of placing the switching electrode 3, 6, the second conductive material layer will be placed on In the trench 124, the fiber step 318 includes the tradition used in this technique. Now, please refer to FIG. 5, which shows a second specific embodiment of the present invention. The metal oxide semi-bulk field effect transistor is a surface gate vertical metal oxide semiconductor field effect transistor. It contains a double gate structure that is roughly similar to the metal oxide semiconductor field effect transistor 10 (). The metal oxide semiconductor field effect transistor 400 contains many similar to the metal oxide semiconductor field effect transistor 1GG. Features and structure, similar to 100 MOSFETs, which include secret 412, well area 414, body 416, source 418 and gate structure, all of which are located on the substrate 426, compared with the metal oxide semiconductor field-effect transistor, the metal oxide semiconductor field-effect transistor side satin silk surface technology-saving straight metal oxide semiconductor field-effect transistor, but, just like the structure The gate electrode structure includes a double-overlap gate junction which can reduce the Miller capacitance and switching loss in the traditional metal oxide semiconductor field effect transistor device. The metal oxide semiconductor field-effect transistor 400 is located on an N + -type substrate, and the substrate includes an upper layer 426a in the N and the pole 412, and the P-well region 414 extends to the region of the non-electrode 412 and in the upper layer 426a. The upper surface (not edged out) and the relative position of the well region 414 constitute a highly doped P + body region 416, and the source electrode 418 is also composed of the upper surface of the upper layer 426 and the relative αP position of the well region 414. The source electrode 418 is formed at The body region 416 is adjacent to and / or connected with the source electrode 418 between the body regions 416, and a gate dielectric layer 428, such as an oxide, is coated on the upper surface of the upper layer 416a, and the gate dielectric layer 428 covers and covers A portion of the well region 414 and the source electrode 418 is provided. The gate structure 420 of the metal oxide semiconductor field effect transistor 400 is like the gate electrode structure of the metal oxide semiconductor field effect transistor 100, and is divided into mutually overlapping switches. The electrode and the shielding electrode. The gate structure 420 includes a pair of switching electrodes and a pair of shielding electrodes 420b. These electrodes are disposed on the dielectric layers 428, 434, and 438 and / or above them. The switching electrode 420a is composed of a layer of conductive material, such as doped polycrystalline silicon, and a dielectric (attractive) electrode is disposed on the gate dielectric layer 428 'and is engraved to form two separate switching electrodes 420a. Each of the switching electrodes 420a Partly placed above the corresponding source electrode 418 and well area 414, and / or perpendicular to each ship, and then the switching electrode and the gate dielectric layer 428 are covered by a second dielectric layer 438, such as an oxide, The second dielectric layer is extended to a portion similar to the gate dielectric layer in the region of the switching electrode 420a and will be removed in a secret process. The button process will cover the switching electrode, but it will not affect the second dielectric layer. . Next, by placing a second layer of conductive material 'such as doped polycrystalline silicon' on the first dielectric layer 428 and the second dielectric layer 438 to form a shield electrode, the second layer of conductive material will be etched into For shielding electrode wounds, each part of each shielding electrode gamma will be placed above the well area 4U corresponding to Xin and the adjacent pole 412, and / or perpendicularly coplanar with it to form an overlapping double gate structure 420. In particular, the shielding electrode will leave a predetermined second-layer conductive material above the switching electrode bar (that is, overlap it) without affecting the switching electrode. In this way, each shielding electrode will be placed on The corresponding switching electrode 420a is above and overlaps with it, forming a double-overlap surface gate structure gamma that can reduce the seeking capacitance and improve the switching speed in the conventional metal oxide semiconductor field effect transistor device. Next, the inner dielectric layer 434 is coated on the intermediate structure 420 and the dielectric layers 428 and 438. Now, please refer to 6. This is another specific embodiment of the present invention. The metal oxide semiconducting violent diode is also designed as a vertical metal oxide semiconductor field effect transistor with a surface-to-gate gate. It includes a double overlapping surface gate structure 52 similar to the closed n-structure 42 on the metal oxide semiconductor field effect transistor side. In the gate structure 42, the corresponding switching electrodes are partially covered by the shielding electrodes 420b-, but in the gate structure, 15 switching electrode surfaces are placed on top). The opposite part of the shielding electrode 420a (not shown), the remaining structure of the metal oxide semiconductor field effect transistor is roughly the same as that of the metal oxide semiconductor field effect transistor. Now please refer to phase 7. This is a further specific embodiment of the metal oxide semiconductor field effect transistor of the present invention. The metal oxide semiconductor field effect transistor is designed as a side type metal oxide semiconductor field effect transistor, except for the overlap The gate structure 620 of the metal oxide semiconductor field effect transistor is the same as the gate structure 620 except for the gate structure 620. The gate structure 620 of the metal oxide semiconductor field effect transistor 600 is divided into a switching electrode 620a and a shielding electrode 620b. The two overlap each other, and are particularly disposed on the dielectric layer 628, the anti-4 and the anti-8 and / or above them. A-layer conductive material, such as doped polycrystalline silicon, is disposed above the gate dielectric layer 628. It is then etched into the shielding electrode 620b. At the time of installation, at least part of the parts are located on the well area 614 and the drain electrode 612, and / or are perpendicular to the same plane, covering the shielding electrode 620a and the gate dielectric layer 628. After the second dielectric layer 638, such as an oxide, is subjected to a post-etching process, the top and sides of the shielding electrode 620b are covered with the second dielectric layer 638, and the second dielectric layer is removed from the gate dielectric layer 628. Electricity 638. Then, a second layer of conductive material, such as doped polycrystalline silicon, is placed over the first dielectric layer 628 and the second dielectric layer 638 to make the switching electrode 62〇a, and the second layer of conductive material will be etched into Each part of the switching electrode 620a will be placed above the well area 614 and the source electrode 618 and / or vertically coplanar with it to form an overlapping double-gate structure 620. In particular, a part of the switching electrode 620a is placed at the first The second dielectric layer 638 extends to the shielding electrode 620b to form the overlapping gate structure 620, which reduces the Miller capacitance in the conventional metal oxide semiconductor field effect transistor device and accelerates the switching speed. Now refer to FIG. 8, which is still The steps of the metal oxide semiconductor field-effect transistor of the present invention are only known. The metal oxide semiconductor field-effect transistor 700 is a side-type metal oxide whose design is substantially similar to that of a metal oxide semiconductor field-effect transistor. Semiconductor field-effect transistor, but in the metal-oxide-semiconductor field-effect transistor 600, the switching electrode 620a P is extended and the shielding electrode 62b is extended. In the body, it includes-a partial extension, and / or a shielding electrode that overlaps with the switching electrode. The metal oxide semiconductor field effect transistor 700 is left over. The remaining structure and metal oxide half field body transistor Similar to 600, I will not repeat them here. Please refer to FIG. 9 'this is another detailed example of the metal oxide semiconductor field effect transistor of the present invention' metal oxide semiconductor field effect transistor _ is designed as a trench gate type metal oxide semiconductor field effect transistor The crystal, except for the details of the overlapping gate structure, is substantially the same as the metal oxide semiconductor field effect transistor 100. In simple terms, compared with the formation of the recess and cover structure in the overlapping gate structure 120, the gate structure Overlapping, metal oxide semiconductor field effect transistor_Complete overlapping structure by making convex body and concave body respectively to constitute the opposite or opposite surface of the switching and shielding electrode. More specifically, 'the metal oxide semiconductor field effect transistor _ includes an overlapping gate structure 820' This structure forms a switching electrode 8 and a shielding electrode _ in the trench 824. The switching electrode has an outwardly convex τ surface 82k, the ship _ secret has an inwardly concave upper surface. 'It is covered with-a dielectric layer _, which makes the upper surface almost as fresh as the concave upper surface 821b. The top of the concave layer of the electric material shell 838 makes the convex lower surface of the switching electrode 8 have almost the same convexity as the concave upper surface 821b. The concaveness of the concave upper surface can be switched to 8 The shield electrode is applied in a direction or depth relative to the trench, and the metal oxide semiconductor field effect transistor is thus formed. Finally, an overlapping trench closed structure 8 is formed to reduce the capacitance and increase the nano-speed. It must be particularly noted that in the specific embodiment of FIG. 9 and previously described, the switching electrode 820a has a convex lower surface 821a, and the shield electrode lion has a concave upper surface 821b and a concave upper surface 821b. The convexity with the convex lower surface 821a makes the switching electrode 820a and the shielding electrode overlap each other in a trench-like direction or depth, but it must be understood that the structure of the metal oxide semiconductor field effect transistor can also be changed, for example Let the switching impurity 82Ga have a concave lower surface 821a, let the shielding electrode lion have a convex upper surface 821b, and let the convexity of the convex upper surface 821b and the concaveness of the concave concave surface 82la match to allow the switching electrode 820a And the shielding electrode 820b overlaps with each other in the direction or depth of the trench 824 to form an overlapping trench gate structure. In the specific embodiment of FIG. 2, the side 142 of the switching electrode 120a and the top cover portion 144 of the shielding electrode 12b partially overlap in the axial or depth direction with respect to the trench 124 to form an overlapping electrode. Structure, of course *, the gate structure of the metal oxide semiconductor field effect transistor 100 can also be changed, for example, the shaft-changing electrode has a top cover or a projection part, and the shielding electrode has a recess to provide a similar overlapping gate The electrode structure is basically an upside-down version of the gate 12 of the metal oxide semiconductor field effect transistor 100. Although the description of the present invention makes it appear to have a preferred design pattern, the present invention can still be further modified within the spirit and scope of the disclosed information. Therefore, the patent application of the present invention is intended to cover any basic use of the disclosure herein. The principle is to modify, use or apply the present invention. In addition, the present invention patent application is intended to cover practices derived from the presently disclosed information in this technical field, related to them, and known or common practice in the field of additional patent applications. 10 Metal oxide semiconductor field effect transistor 12 N-pole 14 Well area 16 Body area 18 N + Source 20 Gate electrode 24 Ditch 26 N + type substrate 26a Base layer 28 Dielectric material 30 Conductive material 32 Channel area 34 Inner layer dielectric Layer 36 source metal layer 100 metal oxide semiconductor field effect transistor 112 N-drain 114 well region 116 body region 118 N + source 120 gate electrode 120a gate electrode, first (top) electrode 200409458 120b gate electrode, second (Bottom) electrode 124 trench 126 N + type substrate 126a substrate upper layer 128 dielectric layer 132 channel area 134 inner dielectric layer 138 dielectric material / dielectric layer 140 recess 142 side 144 top cover portion | 146 ledge 300 processing flow 302 etch trench 304 place first dielectric layer 30Θ place shield electrode 308 etch shield electrode 310 gate dielectric layer etch 312 additional #etch 314 place second dielectric layer 316 place switch electrode < 1 318 remaining steps 400 metal oxide semiconductor Field effect transistor 412 N-drain 414 well area 416 body area 418 N + source 420 gate structure 420a switching electrode 20 200409458 420b shield electrode 426 N + type substrate 426a upper substrate 428 dielectric layer 434 Dielectric layer 438 dielectric layer 500 metal oxide semiconductor field effect transistor 512 N-drain 514 well region 516 body region 518 N + source 520 gate structure 520a switching electrode 520b shield electrode 526 N + type substrate 528 dielectric layer 534 dielectric Electrical layer 538 Dielectric layer 600 Metal oxide semiconductor field effect transistor 612 N-drain 614 well region 616 body region 618 N + source 620 gate structure 620a switching electrode 620b shield electrode 628 first dielectric layer 634 dielectric layer 638 Second dielectric layer 200409458 700 MOS field effect transistor 712 N-pole 714 well region 716 body region 718 N + source 720 gate structure 720a switching electrode 720b shield electrode 800 metal oxide semiconductor field effect transistor 812 N -> and pole 814 well area 816 body area 818 N + source electrode 820 gate structure 824 trench 820a switching electrode 820b shielding electrode 828 dielectric layer 834 dielectric layer 838 dielectric layer [Simplified illustration of the drawing] Refer to the following details about the invention The description and its illustrations will make it easy to understand and understand the aforementioned invention and other characteristics and advantages of the invention and the manner in which it is achieved. FIG. 1 is a schematic cross-sectional view of the prior trench metal structure identification structure. FIG. 2 is a schematic cross-sectional view of a closed structure of a metal oxide semiconductor according to the present invention. Figure 3 shows the previous metal oxide semiconducting structure and the metal oxide rotation shown in Figure 2.
22 閘式結構的閘門切換波形曲線圖。 =是圖2之金屬氧化物轉_式結構的賴典型淨摻雜分析曲線 圖5是本發明具體呈現之金屬氧化物半導體場效電晶體的平面概要截 面圖。 圖6是本發明第二個具體呈現之平面式金屬氧化物半導體場效體 的概要截面圖。 圖7疋本發明具體呈現之側式金屬氧化物轉體場效電晶體的概要截 面圖。 圖8疋本發明第二個频呈現之側式金屬氧化物半導體場效電晶體概 要截面圖。 圖9疋本發明具體呈現之溝渠金屬氧化物半導體閘式結構的概要截面 圖。 圖10是製造圖2之裝置的具體流程圖。 相對應的參考元件符絲各圖式巾指示相對應的零件，此處提出的範 例聞述翻本發明的具體方式，但本範例减被轉成紐明範圍的 限制。 2322 The gate switching waveform curve of the gate structure. = Is a typical net doping analysis curve of the metal oxide transition structure of FIG. 2. FIG. 5 is a schematic cross-sectional view of a plane of a metal oxide semiconductor field effect transistor specifically embodied by the present invention. Fig. 6 is a schematic cross-sectional view of a planar metal oxide semiconductor field effector according to a second embodiment of the present invention. Fig. 7 is a schematic cross-sectional view of a side-type metal oxide swivel field-effect transistor specifically embodied in the present invention. Fig. 8 is a schematic cross-sectional view of a side-type metal-oxide-semiconductor field-effect transistor exhibited at the second frequency of the present invention. Fig. 9 is a schematic cross-sectional view of a trench metal oxide semiconductor gate structure embodied in the present invention. FIG. 10 is a specific flowchart for manufacturing the device of FIG. 2. Corresponding reference element rune patterns indicate corresponding parts. The example presented here describes the specific way of translating the present invention, but this example is reduced to the limit of the scope of Newming. twenty three