SU905812A1 - Subscriber polling device - Google Patents

Description

I

The invention relates to computing and can be used, for example, in computing systems for cyclically connecting subscribers to a digital computer.

Devices for communicating digital computers with subscribers are known, comprising a memory unit, a feature generation unit, a comparison unit, a local control device and a switch 1.

The disadvantages of these devices are in their complexity and high equipment costs.

Closest to the proposed technical entity is a device for generating an address, containing a matrix switch connected by information inputs to a group of information outputs of a trigger receiving unit, an address input with an allocator's output, an inverse input of the first OR element, and an address input of an address encryption unit, and outputs - with the corresponding inputs of the second OR element, the output of which is connected to the control input of the address encryption unit and the inverse input of the AND element, the second input and the output of which is connected respectively to the output of the pulse generator and the input of the counter-distributor / itel, and the third input to the output of the first OR element, the second input of which and the control output of the address encryption unit are connected respectively to the control output and input of the start-up receiving unit 2 .

The disadvantage of this device lies in the large hardware costs, which is caused by the need to use complex blocks due to the impossibility of operating the device with pulse control signals.

The aim of the invention is to reduce hardware costs.

The goal is achieved by the fact that the device containing

the switch, the group of information inputs and the group of information outputs of which are the corresponding groups of information inputs and outputs of the device, two information outputs connected respectively to the first to the second information outputs of the device and the inputs of the first OR element, and the address input to the output of the counter whose input is connected to the output of the element And, connected by the first input with the output of the pulse generator, and the second element OR, introduced a trigger, a delay element, a threshold delay element and two keys elements, the first information input of the switch is connected to the first information input of the device and the third input of the first OR element, and the second information input to the output of the second OR element, the first input of which is connected via the delay element to the output of the AND element, and the second input to the second information input. the input of the device and the fourth input of the first element OR, the output of which is connected to the first inputs of the trigger and the first key element, the output of the trigger is connected to its second input, the second input of the element and D and the first input of the second key element, and the third input - with the output of threshold delay element input coupled to you, moves the first and second key element, the second inputs of which are connected to an earth bus

The drawing shows the block diagram of the device.

The device contains buses of information outputs and device inputs, frequency switch 5, switch 6, counter 7, tires 8-11 of the first subscriber from groups of information outputs and device inputs, output 12 of the frequency first key switch, buses 13-16 of the second subscriber from groups of information Sbixodes and the device inputs, the delay element 17, the second element OR 18, the last subscriber bus from the groups of information outputs and device inputs. The frequency switch 5 consists of trgger 23, the second key element 2, the capacitor 25, the threshold element 26, the first element OR 27, the resistor 28, the first key element

29, the pulse generator 30 and the AND element 31- The threshold element 26, the capacitor 25 and the resistor 28 constitute the threshold delay element. 5 The device operates as follows.

In the process of information exchange on one of the buses 1-4 there are pulses arriving at the inputs of the frequency

o switch 5, which operates so that at its output there are no pulses in the presence of pulses at least at one of its inputs. The pulses at the output of frequency switch 5 are missing until then. until the exchange of information between subscribers and the digital computer is completed. Information paraphase signals 1 and O, coming through tires 3 and from a digital computer, are transmitted by the switch 6 to a subscriber whose number corresponds to the code in counter 7. Information paraphase signals 1 and D to and) 1 and 2 are transmitted by the / mutator 6 also from the subscriber number

5 of which corresponds to the code in counter 7. Let, for example, only in the low-order discharge of the counter be 1, and in the remaining bits - O. In this case, the information signals 1 and O from the digital computer go only to the first subscriber (bus 8 -9)) and information signals 1 and O (tires 1C and 11) only from the first subscriber are transmitted to

5 tires 1 and 2 and further in digital computers. After the information exchange between the first subscriber and the digital computer is finished (the sign of the end of the exchange is the absence of pulses on buses 1-),

0 output 12, a pulse appears, which, arriving at the counting input of counter 7, sets 1 in its second bit, and from that permits the passage of information signals 1

Claims (2)

1. USSR author's certificate N 225562, cl. G 06 F 9 / 18,1967. five 2. USSR author's certificate fi, cl. G 06 F 9/20, 1975 Gprototype).