SU860299A1 - Pulse selector - Google Patents

Description

(54) PULSE SELECTOR

I

The device relates to a pulse technique and can be used in measuring devices and control devices.

A device comprising two channels is known in which the first input bus is connected through the first one-shot to the input of the element AND and a differentiating element that passes the leading edge of the pulse of the one-shot, and the second through the second one-shot, to the input of the element OR, and through the differentiating element that passes the leading front pulse with the second input element And, you-. the course of which through the third one-shot is connected to the second input of the element OR Q3.

; Disadvantage; This device consists in the fact that it allows the separation of pulses that follow simultaneously along two channels, but cannot be used for simultaneous selection of pulses in duration.

The closest in technical essence to the proposed device for temporarily separating two pulse signals containing a constant delay element and a driver, whose inputs are connected to the first input of the device, a coincidence element, the first input of which through the inverter is connected to the output of the former, the second input through sequentially connected delay element; the second driver is connected to the second input of the device, and the output of the coincidence element is connected to the first input of the trigger, the second input of which is connected not with the second device input f2j.

A disadvantage of the known device is that it cannot solve the problem of selecting pulses by duration, arriving through one of the channels, which limits its funcionality.

The purpose of the invention is to expand the functionality by allowing the selection of pulses by duration, arriving through one of the input channels.

To achieve this goal, a device that holds a delay element, the input of which is connected to the first input bus, the first element, the inputs of which are connected to the first and second input buses, a trigger, the first input of which is connected to the first element of the NAND, and the second to the second the input bus through the first pulse shaper, introduced three elements IS-NOT, the pulse generator of the reference duration and two pulse shapers, with the first trigger output through the second pulse shaper connected to the first input of the second ele I-NOT, the second input of which is connected to the output of a pulse generator of reference duration, the input of which is connected to the second input bus through the third shaper and pulses, the output of the delay element is connected to the first input of the third AND-NOT element, the second input of which is connected to the second output of the trigger , and the outputs of the second and third elements AND-NOT connected to the inputs of the fourth element AND-NOT.

The drawing shows the pulse selector.

The device contains a power element 1, the delay time of which is determined by internal delays in the device circuit and is realized as an even number of AND-NOT, ORINE elements, connected in series, AND-NOT 2 first, trigger 3, performed on two elements AND- NOT; the first pulse generator 4, which forms a short pulse corresponding to a logical zero along the trailing edge of the input pulse, i.e. at the moment the input signal is changed from the level corresponding to the logical unit to the logical zero level, the AND-NOT elements of the second, third and fourth shaper 8 pulses the second, corresponding to a logical one at the edge of the pulse coming from the zero output of the trigger 3 at the moment of changing its output a potential from a level corresponding to a logical unit to a level corresponding to a logical zero, the generator 9 pulses of the reference duration, made, for example, in the form of a one-shot (standby multivibrator ) on the four elements OR-NOT, and the shaper 10 pulses, the third forming pulse, corresponding to logical unit on the leading edge of the input pulse, i.e. at the moment of changing the input potential from the level of logical zero to the level of logical unit.

The first input of the trigger 3 is connected to the output of the AND-HE element 2, the first input of which is connected to the first input bus and the input of the delay element 7, and the second input to the second input and the input of the driver W, and through the driver 4 to the second input trigger 3, the zero output of which is connected through the driver 8 to the first input of element 5, the second input of which is connected via generator 9 to the output of the driver 10, and the single output of trigger 3 is connected to the second input of the element AND-NOT 6, the first input of which is connected to the output of the element one delays and the output to one of the inputs of the element AND-NOT 7, the other input of which is connected to the output of the element

AND-NOT 5,

Despite the fact that forcing devices 4, 8 and} 0 fork (f) T are different pulses from different input pulses, they are built according to a single scheme on two logical elements AND-NOT (ESH-NOT). If necessary, an inverter is installed at the input (or output) of such a driver. A tick, for example, a shaper 8 consists of two two-input YLI-NE elements, the inputs of the first of which are combined and connected to one of the inputs of the second, and the output is connected to the second input of the second element OR-NOT, the combined inputs of the OR-NOT elements are the input of the imager, output the second element of the SHS-NOT - the output of the imager - {the usual differentiating resistive-capacitive (inductive) circuits cannot be used as the formers).

The device works as follows.

In the initial state (when there are no pulses on the device input buses) at the input of the delay element 1, therefore, one of the inputs of the AND-NOT element 6 contains a logical zero, and at the second input of the logging unit there is a unit coming from the single trigger trigger 3 (therefore, at the output element AND-NOT 6 logs chesky unit). At both inputs of the AND-NOT element there are 5 logical zeros, one of which comes from the output of the driver 8, controlled from the zero output of trigger 3, the output of which is a logical zero, and the second from the output of the generator 9, at the input of which logical zero therefore, at the output of the element AND-NOT 5 logical unit. Since at both inputs of the NAND 7 element there is a logical unit, at its: output (device bus) there is a logical zero. At the output of the element AND-2, there is a logical one, since at both its inputs there are logical zeros. At the second input of the trigger 3, there is a logical unit coming from the output of the driver 4. At the output of the driver 10 there is a logical zero. The initial state of the trigger 3 is provided by means of additional circuits of the installation (not shown in the diagram). There are three cases of the device. In the case when the impulses arriving at the first and second shshn do not coincide in time, the impulse received at the first input bus, passed delay element 1, goes to one of the inputs of the AND-NOT element 6, at the second input of which there is a logical one from the unit trigger output 3. Therefore, the pulse time at the first input shih at the output of element IS-NOT 6 is set to a logical zero, which is followed by a pulse at the output of the output {output of element AND-NOT 7) The impulse received on the first input bus of the device, ohodit at its output unimpeded (not taking into account its low delay element 1). The IS-NOT 2 element does not work, since there is no coincidence of the signals at its inputs, sweat to this state of the trigger 3 does not change. The exit state of the imaging unit 8 also does not change. When a pulse device arrives at the second input bus, the duration of this pulse can vary widely, for example, from few microseconds to tens of milliseconds along its leading edge by the shaper 10 for a short time a short pulse is formed, corresponding to a logical unit. A signal from the output of the imaging unit 10 starts the generator 9, the output of which forms a reference time interval in the form of a logical unit, which is applied to one of the inputs of the AND-NOT element 5. At the same time, the output state of the AND-NOT element 5 cannot be changed. As in its second input, there is a logical zero provided by the driver 8. On the falling edge of an impulse arriving at the second input bus of the device, the driver 4 generates a logical zero for a short time. This pulse, arriving at the second input of trigger 3, only confirms its initial state. Thus, a signal, regardless of its duration, arriving at the device’s second input bus, does not affect its operation. The considered case is characterized by the fact that there is no temporal separation of pulses arriving through two channels, if they do not coincide in time. The selection of pulses in duration is also absent here. In the case when the pulses arriving at the inputs, the devices coincide the pulse duration on the second input bus is less than the duration of the reference pulse, a logical zero is set at the output of the AND-HE element 2. This is accompanied by a change in the state of trigger 3. In this case, a logical zero appears at the input of the element AND-NE 6, which prohibits the production of a pulse delayed by the element I through the element AND-NOT 6 to the input width of the device. As before, with the help of the imaging unit 10, a generator 9 is started at the leading edge of the pulse arriving at the second input bus of the device. The reference impulse arrives at the input of the AND-NO element 5, at the other input of which it is present. input bus device. On the trailing edge of this pulse, shaper 4 establishes a logical zero at the input of trigger 3, which is accompanied by resetting trigger 3 to its initial state. At the same time, at the input of the imager 8, the signal is mete eta from a high level to a low one. The shaper 8, at the same time, produces a logical unit at its output. Under these conditions, logical units are simultaneously present at the input of the element AND-5, which is accompanied by the appearance of a logical zero at its output and the appearance of a signal on the output bus of the device. Thus, in the second case, the pulse at the output of the device appears with some delay after the pulse of the pulse arriving at the second input bus of the device. This means that the input pulses turned out to be separated in time. The presence of a pulse at the output of the device indicates that the pulse arriving at the second input bus is shorter than the reference one, and this means that in this case, there is also a selection of pulses in duration. In the case when the pulses arriving at the first and second input buses coincide, but the pulse duration of the device arriving at the second input bus is longer than the duration of the reference pulse. The device operates as in the previous case with the only difference that the pulse generated by shaper 8 at the input of the AND-HE element 5 does not fall within the zone of action of the reference pulse (formed after the end of the reference pulse). Therefore, the output state of the element AND-NOT 5 does not change, and therefore, there is no impulse at the output of the device. The absence of a pulse at the output of the device in this case indicates that there is a pulse longer than the reference pulse on the second input bus, which means there is a selection of pulses in duration. Thus, the use of newly introduced elements of the NAND shaper and the pulse generator of the reference duration favorably distinguishes the proposed device from the previously known devices for separating two signals, since the functionality of the proposed device is expanded by providing the possibility of pulse selection. Claims of the invention Pulse selector containing a delay element, the input of which is connected to the first input bus, the first NAND element, whose inputs are connected to the first and second input buses, a trigger, the first input of which is connected to the output of the first NAND element, and the second with the second input bus through the first pulse shaper, characterized in that, in order to extend the functionality, it introduces three AND-NOT elements, a pulse generator of the reference duration and two pulse shapers, with the first output the second through the second shaper impulses connected to the first input of the second element AND-NOT, the second input of which is connected to the output of the pulse generator of the reference duration, the input of which through the third driver of the pulses connected to the second input bus, the output of the delay element connected to the first input of the third element AND-NOT, the second input of which is connected to the second output of the trigger, and the outputs of the second and third elements AND-NOT are connected to the inputs of the fourth element AND-NOT. Sources of information taken into account in the examination 1.Avtrpskoe certificate of the USSR №296100, cl. S 06 5/02, 1970. 2. USSR author's certificate No. ZA9097, cl. H 03 K 5/20, 1970.

Claims (1)

Claim A pulse selector containing a delay element, the input of which is connected to the first input bus, the first NAND element, the inputs of which are connected to the first and second input buses ^ trigger, the first input of which is connected to the output of the first NAND element, and the second to the second input bus through the first pulse shaper, characterized in that, in order to expand the functionality, three NAND elements, a pulse generator of a standard duration and two pulse shapers are introduced into it, the first trigger output through the second form the pulse driver is connected to the first input of the second AND-NOT element, the second input of which is connected to the output of the pulse generator of a standard duration whose input is connected to the second input bus through the third pulse driver, the output of the delay element is connected to the first input of the third AND-NOT element, the second input of which connected to the second output of the trigger, and the outputs of the second and third elements AND NOT connected to the inputs of the fourth element AND.