SU822137A1 - Device for automatic referencing of time scales - Google Patents

Description

The invention relates to the synchronization of high-precision measures of time and frequency, and can it be applied at receiving points of radio engineering time and navigation systems using reference amplitude-manipulated time signals?

A device is known for binding time scales for reference radio signals, comprising a radio receiver, a reference generator, a device for primary processing of information on the phase of the carrier frequency and device *, a secondary processing unit for processing information on the phase of the envelope, built on the principle of multi-channel signal detection and automatic setting of the local time scale in accordance with detection results £ 1].

The closest in technical essence to the invention is a device for automatically referencing time scales containing a reference generator, a time keeper, a primary signal processing circuit, a radio receiver, a reading device and a secondary signal processing circuit, including a controlled frequency divider, frequency switch, first switch channels, multichannel drive counters, time counter, polling counter, logic device and command unit, and the output of the reference generator is connected to the input For time, the first output of which is connected to the first input of the primary signal processing circuit, and the second to the first input of the controlled frequency divider, the second input of the primary signal processing circuit is connected to the output of the radio, and the output to the first input of the first channel switch, the first output of the controlled divider frequency is connected to the first input of the frequency switcher, and the second to the input of the reading device, the output of the frequency switcher is connected to the first input of the time counter and to the second input of the first channel switcher, the first Exit time counter connected to the first input of the survey meter, and the second - the third input '822137 primary signal processing circuit, the first switch channel outputs are connected to inputs of counters drives, the logical unit cos ~ yield of the connections to the input command block, per- ₅ vy. the output of which is connected to the second input of the time counter, the third input of the first channel switcher, the second inputs of the controlled frequency divider and frequency switcher and the fourth input of the circuit, primary signal processing, the second output is command a unit connected to the second input polling counter [2].

The disadvantage of this device is- _{) 5} long binding time, which ultimately reduces the information throughput of the receiving point and the quality of the stored time scale. The large binding time is due to the sequential ₂₀ method of accumulation and binding to the reference signals of various manipulation frequencies, at which the binding to signals 10 , 1, 1/10 and 1/60 Hz are divided into the corresponding cycles and _{25 are} performed separately and sequentially for each manipulation frequency.

The purpose of the invention is to reduce the binding time.

This goal is achieved by the fact that a code converter, a memory circuit, a second channel switcher, adders and a threshold device are introduced into the device ₃ θ of automatic time scales, and the inputs of the code converter are connected to the outputs of the counters – drives, the output ^{35 of} the code converter is connected to the signal the input of the memory circuit, the output of which is connected to the first input of the second channel switch, the outputs of which are connected to the inputs of the adders, and the outputs of the adders are connected to the inputs of the threshold device, the output of which connected with the input logical device, and the output counter polling control input coupled to the memory device and the second house ⁴⁵ vho- second switch channels, the second output of the command block connected to the third input of the second switch channels.

In FIG. 1 shows a block diagram of a device; in FIG. 2 - ⁵⁰ diagram the temporal di- explaining the essence of the work unit.

The device comprises a reference generator 1, a time keeper 2, a primary signal processing circuit 3, a secondary signal processing circuit 4 55, a controlled frequency divider 5, a frequency switch 6, a time counter 7, a polling counter 8, a first channel switch 9, storage counters 10, code converter 11, memory circuit 12, second channel switch 13, adders 14, threshold device 15, logic device 16, command unit 17, radio receiver 18, reading device 19.

The output of the opera generator 1 is connected to the input of the time keeper 2, the first output of which is connected to the first input of the primary signal processing circuit 3, the second to the first input of the controlled frequency divider 5, the second and third inputs of the primary signal processing circuit 3 are connected respectively to the output of the radio 18 and the second output of the time counter * 7, the output of the primary signal processing circuit 3 is connected to the first input of the first switch 9 channels, the first output of the controlled frequency divider 5 is connected to the first input of the frequency switch 6, and the second with the input of the reading device 19, the output of the frequency switch 6 is connected to the first input of the time counter 7 and the second input of the first switch 9 channels, the first output of the time counter 7 is connected to: the first input of the polling counter 8, the output of the polling counter 8 is connected to the control input memory devices 12 and second, the input of the second switch 13 channels, the outputs of the first switch 9 channels are connected to the inputs of the counters 10, the outputs of the counters-drives 10 are connected to the inputs of the code converter 11, the output, the device 12 memory connected to the first input of the second channel 13 switch, the outputs of the second channel 13 switch through adders 14 are connected to the inputs of the threshold device 15, the output of the threshold device 15 is connected to the input of the logical device 16, the output of the logical device 16 is connected to the input of the command unit 17, the first output of the command apple 17 is connected to the second input of the time counter 7, with the third input of the first switch 9 channels, the fourth input of the circuit 3 of the primary image. signal, the second inputs of the controlled frequency divider 5 'and the switch 6 frequencies, the second output of the command device 17 is connected to the second input of the counter 8 of the survey and the third input of the second switch 13 channels.

Device automatic, timeline binding works as follows.

Reference signals of type A1 (Fig. 2a) mixed with noise are pre-filtered with a radio receiver 18 and fed to the second input of the primary signal processing circuit 3. The signals of the local 5th reference generator 1 are supplied to the custodian 2 time s. with the help of which a local time scale is formed, combined in phase with the carrier and the envelope of the highest frequency of manipulation (40 lit) at the previous stages of operation of the receiving unit ^! KTA and arriving at the first input of the circuit 3 of the primary signal processing. With the help of the latter, code units are formed as a result of the coincidence of the phase of the signals, for example, 5 moments of the transition through zero of the reference signals ^ with the pulses of the local time scale. Since the phase of noise is random, and the phase of the mixture of signal and noise is regular, the number of 20 units of the code of the mixture of signal and noise over a fixed interval is more than the number of units, the code of noise, which is a prerequisite for determining the temporary position of the reference signals and binding 25 to nim of the local timeline. At the Start command, using the command block 17, the time counter 7 and the poll 8, the first 9 and second TK of the channel switches 30 and the frequency switch 6 are initially set up, the counters-drives 10 are reset to zero, and units of code are allowed to enter the first 9 channel switch. With the latter in the range 60 to ₃₅ Canada are formed ly accumulation (figures FIG. 26) corresponding to the duration (25) the pulse frequency 10 Hz manipulation, there is a distribution code storage units and the filling channels of the corresponding _4-q boiling counters drives 10 (figb, d) during the time determined by the counter 7 time. The number of units of code received at the counters-drives 10 is converted with the help of the converter _{<5 for} 11 code into a form convenient for writing, and is written into the corresponding cells of the memory circuit 12. At the end of the analysis time, the signals from the counter 7 time prohibit the passage of units of code on _J0 first switch 9 channels. At the signal of the time counter 7, the polling counter 8 is also started. Using its signals, the contents of the memory circuit 12 are sequentially read into the second channel switch 13 ′ and launched. Using the second switch 13, four channels are formed (Fig. 2c), the readable codes are distributed from the memory circuit 12 and the corresponding adders 14 are connected in such a way that each channel of the second switch 13 receives the channel codes of the first switch 9, which follow with a signal repetition period of 10 Hz . In this case, the first channel and adder 14 perceives the code of the drive counters 10 channels of the first switch 9 1 ', 5 ¹ , 9 *, 13 ..., the second channel - channels 2 *, 6 ¹ ,

20 ' ¹ , 14 · ..., the third - channels 3 *, 7 ¹ , II ¹ , 15 ¹ .. ,, the fourth - channels 4 *, 8, 12 *, 16 * ... Thus, using adders 14 is being merged. codes corresponding to a 10 Hz signal (channels I ¹ , 5 ¹ , 9 *, 13 * ... Fig. 26) and noise (channels 2 ', 3' _r '4 *, e', 7 ', 8' .. Fig. 26). As a result of combining, the adder 14 corresponding to the signal contains a number substantially larger than the numbers in Other adders (Fig. 2c). Using the threshold device 15, the codes of the adders 14 are compared with the threshold. The threshold value delimits the presence and absence of a reference signal at the input

Λ, of the device, thereby eliminating the false operation of the binding device in the absence of a reference signal. The output of the threshold device 15 passes adder codes, the value of which is higher. threshold level. Using the logical device 16, by selecting the maximum number recorded in the adders, the adder’s channel number is set, which corresponds to a signal of 10 Hz. The signal from the output of the logical device 16 pos · ^ is dumb in the command unit 17, with the help of which the scale of the controlled divider 5 is set under the channel of the 10 Hz signal and the counter 8 is polled and the second switch 13 channels for binding according to 1 Hz signals. At the same time, with the help of the signals of the counter 8, the polling is again carried out sequentially, reading the codes of the memory device 12 into the second channel switch 13 and starting it. Using the switch 13, ten channels are formed, the read codes of the memory device 12 are distributed over them and the corresponding adders are connected 14.

At the same time, each of the channels and adders of the second switch 13 perceives the codes of the channel groups of the first switch 9, each of which begins with a katsap corresponding to the 10 HD signal, and the group duration corresponds to the desired signal duration of 1 Hz (i.e. 4 channels), and following groups co622167 sets the signal repetition period to 1 Hz. Thus, the first channel and adder perceives the code of the counter-accumulators of channels 1 *, 2 ¹ , 3 *, 4 ¹ ; 41 ?, 42, 43, 44 second - channels 5 ^r , 6 ^V , 7 ' ¹ , in'? 45 \ 46 ', 47 *, 48 *, the third is the roll of channels 9 ¹ , 10', 11 ^, 12¼ 49 ^ 50 *, 51, 52 ', ... ”the tenth - channels 37, 38, 39', 40 *; 77 ^{/ , 78 *, 79 *. 80 ¹ ... Thus, with the help of adders 14, codes are combined, COOT- (which drive the signal 1 Hz (channels 1-4, 41'- 44 ¹ ... Fig. 2 g) and noise (channels 5 '- 8' j 45 * - 48 ”· ...; 9'- 12 ¹ , 40 ¹ 52 ¹ , ... etc.). As a result of combining, the adder 14 corresponding to the signal contains a number substantially larger than the numbers in the other ' adders (Fig. 2e). Using the threshold device 15, codes of adders 14 that exceed the threshold are allocated, and the logic device 16 sets the number of the adder and channel to the maximum code, which corresponds to a signal of 1 Hz. device 16 using the command unit 17 sets the scale of the controlled frequency divider 5 under the signal channel 1 Hz and switches the counter 8 of the survey and the second switch 13 channels to bind to signals 1/10 Hz and 1/60 Hz. Information processing and binding to signals 1/10 Hz and 1/60 Gy are produced in a similar way with the only difference being that the combined codes of the drive counters 10 correspond to groups of channels, each of which begins with a channel of 1 Hz (1/10 Hz), the duration of the group corresponds to the duration of the desired signal ala (40 channels; 400 channels), and the repetition period of the groups is the repetition period of signals 1/10 Hz (1/60 Hz). In this case, the binding time is determined with the main accumulation time of code units in the storage counters 10.

Thus, the introduction of a code converter, a memory circuit, a second channel switcher, adders, and a threshold device into the device for automatically linking time scales provides multiple processing of the information accumulated in the drive counters, thereby reducing the binding time.

Claims (2)

1. USSR Author's Certificate No. 327441, C 04 C 11/02, 1971. .ten 2. USSR author's certificate No. 443360, cl. C 04 C 11 / O2, 10.16.72. G T nijCi Riga.1 7Ш4  Tyhz I fzX, (.. {SCHSHSHGYaa l., ll .l L | w h , 0 - .. .. rmrrmbTF Ott11Shm {. Vall