SU809474A1 - Digital sweep generator - Google Patents

Description

one

The invention relates to radio engineering and can be used to control the operation and tune the frequencies of CHIUJX radio engineering circuits.

A known digital oscillator is a oscillating frequency, containing a series-connected master oscillator, a control clock frequency generator, a counter and accumulating adder, the control input of which is connected to the output of the controlled clock frequency generator, and a digital-analog converter (1.

However, in this device the increase in the frequency deviation and, therefore, the central operating frequency is limited by the speed of the digital nodes of the device.

The purpose of the invention is to increase the frequency deviation while simultaneously increasing the central operating frequency.

This goal is achieved by the fact that in a digital oscillator the oscillating frequency, containing a series-connected master oscillator, a controlled clock frequency generator, a counter and accumulating adder, the control input of which is connected to the forward lead of the controlled oscillator of the frequency, and the digital-analog converter is designed as a converter - phase, to the input of which the output of the input generator of the central operating frequency is connected, and between the control output of the counter and the control inputs of the converter code phase shifters administered serially connected countable

0 trigger and reversible counter, the counting input of which is connected to the output of the accumulating adder.

The drawing shows a structural electrical circuit of the proposed device.

The digital oscillator of the oscillating frequency contains the master oscillator 1, the control oscar 2 oscillator 2 clock frequency, counter 3, accumulating adder 4, counting trigger 5, reversible counter 6, generator 7 of the central operating frequency, digital-analog converter (DAC) 8,

The device works as follows. ,

Claims (1)

The master oscillator 1 generates a periodic sequence of pulses of the frequency FT, which is fed to the first input of the controlled oscillator 2 clock frequency. Managed generator, Ator 2 is a accumulating adder with a Counting Module that adds a multi-digit number N to its readings, specifying the frequency deviation of the frequency supplied to its second input when a pulse arrives at the first input. The output frequency signal is generated at the output of the controlled generator 2 F; i FT-N / NO, where the number N determines the magnitude of the deviation and can be selected within N O, 1, 2, ... This signal is fed to the input of a variable function generator consisting of counter 3 and accumulating adder 4 with mod Lem, At the output of accumulating adder 4, a sequence of impulses increasing in time according to the linear law of the frequency F4 FjM / M at М О, -L / f t f and falling frequency is formed, at М, 1 .... And since M is the counter reading 3, vary within M 0, 1, 2 ,. - 1,0,1, ... according to the sawtooth law. This pulse sequence arrives at the counting end of the reversible counter b with the module K d. The operation mode of the reversible counter 6 is controlled by a signal taken from the output of the trigger trigger 5, the input of which is connected to the high discharge output of the counter Z. it works in the summation mode and its readings increase in time according to a quadratic law, and in the second half-period - in the subtraction mode and its readings decrease according to a quadratic law. The signal from the output of the reversible counter 6 in the form of a multi-digit K is converted by the digital-to-analog converter 8 to the phase of a harmonic signal generated by the generator 7 of the central operating part (tonxS 3Kfot + | 5 .t). since the readings of the reversible counter b vary in time according to a quadratic law, the frequency of the output signal; if the analogue analogue transform 8 changes linearly in the range fo-oi-FyM / iN cixK и.с, x in the first half-period of operation and in the range fo ... fo-FT-N / 2N c, IN the second, when the reversible counter 6 is operating in subtraction mode. When the number N is changed, the frequency deviation value is changed, which is maximum D F uFma, with M N WOX The proposed device provides frequency deviation in the ffl Fma range. . . f + F, i.e. the deviation is doubled, with the center frequency of operation fo, which can switch over a wide frequency range. DETAILED DESCRIPTION OF THE INVENTION A digital oscillating frequency oscillator comprising a serially connected master oscillator, a controlled clock frequency generator, a counter and accumulating adder, the control input of which is connected to the output of the controlled clock frequency generator, and a digital-analog converter the fact that, in order to increase the frequency deviation while simultaneously increasing the center operating frequency, the digital-to-analog (the converter is made in the form of a code-phase converter, to the input of which The output of the input generator of the central operating frequency is connected, and between the control output of the counter and the control 1 "and the code-phase converter inputs there are serially connected counting trigger and reversible counter, the counting input of which is connected to the output of accumulating adder. Information sources taken into account examination 1. The patent of Germany 2241810, CL H 03 W 23/00, 1976 (prototype).