SU734659A1 - Information gathering device - Google Patents

Description

(54) DEVICE COLLECTION INFORMATION

I

The invention relates to computing and can be used in a hybrid computing system for collecting, converting and transmitting a solution from a grid electric model to a digital computer.

Data processing and transmission systems are known, including an input switchboard, isolation units, analog-digital converters and an output switchboard and allowing you to convert and transfer the solution from the grid electric model to a digital computer (CVM) 1.,

However, the known system does not provide sufficient accuracy and speed in processing and transferring solutions from the grid electric model to a digital computer.

Closest to the invention, the technical entity is a grid-type electrical switchboard comprising a program control unit associated with a correction unit, a control unit and a sampling decoder connected by a correction unit 20 and a selection unit connected to the inputs of analog-to-digital converters connected by the first inputs with keys, and the second with a correction unit, inputs

A / D converter controls are connected to a control unit. This switch has sufficient accuracy and speed 2.

However, it used sophisticated sampling decoder and selection unit, the structure of which is rigidly associated with the number of analog-to-digital converters, and as the number of analog-digital converters changes, the structure of these blocks must be changed.

The purpose of the invention is to simplify the design.

The goal is achieved by the fact that an information collection device comprising a sampling unit, a multiplexer, a correction unit, a program control unit, a startup unit, a group of analog-to-digital converters, a decoder, the inputs of the sampling unit being the device inputs, the output of the multiplexer is the output of the device and the multiplexer inputs are connected to the first outputs of analog-to-digital converters of the group, the second outputs of which are connected to the inputs of the correction unit, the first output of which is connected to the first input of the block and launch, and the second

the output of the correction unit is connected to the input of the software control unit whose input output is the input-output of the device, the first output of the software control unit is connected to the second input of the startup unit, the second output of the software control unit is connected to the input of the decoder, the output of which is connected to the input of the sampling unit, is entered a group of analog blocks. pam and a group of delay elements, the first inputs of the analog memory blocks of the group are connected to the output of the sampling block, the second inputs of the analog memory blocks g uppy delay elements and the inputs connected to outputs of the group start block, and outputs the analog memory block group are connected to first inputs of respective analog-converters group, the second inputs of which are connected to the outputs of respective delay elements of the group.

The drawing shows a block diagram of the proposed device.

The software control unit 1 is connected to the multiplexer control output. The inputs of the multiplexer 2 are connected to the first outputs of the group of analog-to-digital converters 3-5, the second outputs of which are connected to the inputs of the correction unit 6 associated with the program control unit 1 and with the first input of the start unit 7. The second input of the start-up unit 7 is connected to the program control unit 1, and the outputs are connected to the control inputs of a group of analogue memory blocks 8-10 and through a group of delay elements 11-13 to the control inputs of the group of analog-to-digital converters 3-5 connected by inputs the outputs of a group of blocks 8-10 of analog memory, the information inputs of which are connected to the output of block 14 of the sample. The control input of the sampling unit 14 is connected to the decoder 15 associated with the program control unit 1.

The number of analog-to-digital converters is chosen so as to exclude the switching time of the nodal points, the time of transients and the conversion time during the conversion and transfer of the solution to the grid electric model.

The information collection device is connected through the sampling unit 14 to the grid electric model (not shown in the drawing). The input of software control unit 1 and the output of multiplexer 2 are connected to a digital computer (not shown in the drawing).

In the program control unit 1, a program of operation of the device is recorded. According to the program, the program control unit 1 transmits to the decoder 15 the code of the first node point of the grid electric model and sends the signal to the start unit 7. The decrypted signal from the output of the decoder 15 is fed to the input of block 14 of the sample, which connects the first anchor point

grid electric models to the inputs of a group of blocks of 8-10 analog memory. The signal from block 1 of the program control turns on the start block 7 and generates the start signals of blocks 8-10 of analog

5 group memories and analog-to-digital converters 3-5 groups, delayed relative to each other. The first trigger signal is fed to the input of the delay unit 11 and to the control input of the unit 8 of the analog group memory, starting it.

 The potential of the first node point is written to block 8 of the analog memory of the group, which is disconnected from block 14 of the sample. With a delay determined by the transient time in block 8 of the analog memory, the start signal from the output of the delay element 11 of the group enters the control input of the a-tax-digital converter 3 which starts the conversion of the stored potential. From block 1 of software control, the code of the next node point is written into the register of the decoder 15 and the next node point is connected to the inputs of analog-digital converters 8-10 of the group. The second trigger signal, delayed in time relative to the first signal, is fed to the input element 12

 delays and control input of an analog memory block 9. The potential of the next node point is written into the analog memory block 9, which is disconnected from the sampling block 14. The delayed start signal triggers the analog-to-digital converter 4. The program control unit 1 sends to the decoder register 15 the code of the next node point, which is connected to the analog memory unit 10. The next start signal from block 7 run

5 is fed to the input of the delay element 13 and the control input of the analog memory block 10 and the analog digital converter 5 is started with a delay. By this time the conversion of the analog digital converter 3 ends.

The software control unit 1 sends to the multiplexer 2 a signal that sends the code from the output of the analog-digital converter 3 to the memory of the digital computer. Finishes the conversion of the analog-to-digital converter 4. The signal of the end of the conversion goes through the correction block 6 to the program control block I and to the start block 7. The start-up unit 7 generates a new series of delayed signals, and the program control unit 1 sends the signal to multiplexer 2, and the code from the output of analog-digital converter 4 is transmitted to the memory of the digital computer. From the program control unit 1, the code of the next node point is written to the decoder register 15 and connected to the inputs of blocks 8-10 of the analog group memory using the decoder 15 and the sampling unit 14. The second cycle of the device operation begins. The analog-to-digital converter 3 is started. It finishes the conversion of the analog-to-digital converter 5. The signal of the end of the conversion goes through the correction unit 6 to the program control unit 1. The analog-to-digital converter 4 is started. The software control unit 1 sends the signal to the multiplexer 2 and the code from the output of the analog-to-digital converter 5 enters the memory of the digital computer. Analog-to-digital converter 5 is started. Ends the conversion to analog-to-digital converter 3 and the device operates as described above.

The proposed device for collecting information allows an increase in the speed of collecting and processing information by increasing the number of analog-to-digital converters up to the interrogation frequency of node points:

T. + TlA.

where - the storage time of the analog value in the analog memory block.

, - switching time of the node sample block. The indicated performance is achieved without introducing changes in the sampling unit and the decoder.

The proposed device allows polling of nodal points in any sequence without loss of time associated with the presence of rigid attachment of nodal points to a group of analog-to-digital converters in a known switch.

Claims (2)

1. USSR Author's Certificate No. 399882, cl. G 06 F 7/48, 1971. 2. USSR author's certificate according to the application No. 2421907 / 18-24, cl. G 06 F 7/06, 1965 (prototype).