SU705660A1 - Short pulse former operating in response to leading and trailing input pulse edges - Google Patents

Description

(54) FORMS OF PULSE OF LOW DURATION PULTS FORWARD AND BACK FRONT OF INPUT PULSE

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The invention relates to a pulse technique and can be used in computing.

Known impulser: short duration, containing two flip-flops AND a match element 1.

The disadvantage of this driver is the impossibility of forming a pulse on the trailing edge of the input cHmaJifa. -,

- Closest to the proposed invention, a pulse shaper of short duration along the leading and falling edges of the input pulse, containing two coincidence elements, an inverter and a trigger, the outputs of which are connected to one input of the coincidence elements, the other inputs of which are interconnected via inverter 2.

The disadvantage of such an impul-cvr driver is low reliability, due to the fact that when the pause between the input signals decreases to a value characterized by the signal delay time by the logic element (IV}, the output pulse 1 on the falling front of the input signal is rejected.

body polarity is distorted in duration.

The purpose of inventions is reliability.

This is achieved feM, 4to to a pulse shaper of short duration along the front and rear edges of the input pulse, containing a static trigger, two coincidence elements and an inverter, with the outputs of the static trigger connected to the first inputs of the coincidence elements. The second inputs of which are interconnected through an inverter, and the first trigger input is connected to the output of the first element, the second static trigger is entered, the first input; which is connected to the output of the second element coincidence, the first input of which is connected to the second input of the second trigger, the output of which is connected to the second input of the first trigger.

The drawing shows the structure of the pulse former.

Claims (2)

The pulse shaper contains Hireep-, torus 1, elements 2 and 3 coincidence, triggers 4 and 5, made on elements 6–9, coincidence .37, input bus 10, and output tires 11 and 12. The Iltulse driver works as follows. In the initial state of izhie 10 there is a level of logical unit. This leads to the presence of a zero level at the output of the inverter 1, and a logical one at the output of the element 2. At output 11, there is a high voltage level. Triggers 4 and 5 are in the zero state. At the same time, elements 6 and 8 of coincidence have low potentials at the outputs and elements 7 and 9 coincide with high potentials. The output of element 3 matches, as well as; the output bus 12 has a high voltage level, since the second input of element 3 matches coincidence and element 6 receives a low potential. The input impulse of the negative temperature rating goes to bus 10. In this case, the zero level acts on the first input of element 3, and the unit level from the input of inverter 1 on the first input of element 2 coincides. The presence of two unit levels on both inputs of element 2 coincides with This step is shown in his code in the urbvn of the Logic zero, which enters the first input of trigger 4 and transfers it to the opposite initial state. Zero Zfaven from the output of the element 7 SquDnIs begins to act at the second input of the element 2 of the OooaPadeni and leads to the appearance of this element of the level of a logical unit. On the output bus 11, the formation of a negative polarity pulse from the leading edge of the input pulse arriving on the bus 10 occurs. The pulse duration is determined by the delay of the –yiradsia element 2, 6, 7.:. . Switching trigger 4 does not cause a change in the state of element 3 to match, Tisk as it is held back by the input Zero potential on the first input. After the end of the action. a negative pulse on bus 10 starts forcing a pulse on output bus 12. When a high potential coincidence element appears on the wallpaper inputs, a low potential is set at the output, which triggers trigger 5. The output of element 9 matches the zero level to the second trigger input 4 and Converts it to a state in which zero logic level occurs at the output of element 6. In this case, the output of the coincidence element 3 is set to a high level. A negative polarity pulse is generated on the output bus. From the trailing edge of the input signal. The duration of the output pulse is related to the signal passing time through elements 3, 6, 7, 8, 9. The shaper assumes the initial state, which is held until the next input pulse arrives. The process then repeats. Thus, the proposed shaper of short duration impulses along the leading and trailing edges of the input pulse makes it possible to increase the reliability of formation, since the output impulse along the trailing edge of the input signal of negative polarity is not distorted in duration when the pause is reduced to 2D. The invention Shaper pulses of short duration on the front and rear edges of the input pulse, containing a static trigger, two elements of coincidence and an inverter, the outputs of the trigger ctam4eckbro are connected to the first inputs of the elements. with the video of the first element of coincidence, characterized in that, in order to increase reliability, a second static trigger is introduced, the first input of which is connected to the output of the second element with of incidence, a first input coupled to the second input Btoporo trnggera whose output sub-key to the second input of the first flip-flop. Sources of information taken into account in the examination 1. USSR author's certificate №465727, cl. H 03 K 5/153, 03.30.75. 2. USSR author's certificate number 373864, cl. H 03 K 5/01, 05.04.71. L LT