SU692062A1 - Arrangement for controlling a controllable self-contained thyristor inverter with pulsewidth modulation - Google Patents

Description

one ibrator, trigger, current sensors and conversion ring are connected. The main disadvantage of this control device is the error in determining the output frequency of the inverter with the help of group-conducting relays and, accordingly, inaccuracies in determining the boundary points for changing the carrier frequency of the modulation. The circuit of the present invention is to increase the accuracy of control of the output frequency of the inverter. This goal is achieved by the fact that the device for controlling an adjustable autonomous inverter with pulse-width modulation is equipped with a frequency-to-frequency converter — a code containing an output counter with a reset bus, a reference frequency generator, a inhibit circuit, a delay line and a coincidence circuit, a tracking signal generation unit, containing two direct and two inverse outputs, a set of codes, an additional AND logic element, two formers in front of it of the front and a second inhibit circuit, the input of the frequency converter One is connected to the output of the master oscillator through the first front-edge former, and its output counter is connected to the tracking signal generation unit, to the input of which the dialing codes are also connected, and through the second front-front driver, the output of the frequency divider the tracking signal generation signals are connected respectively to the second input of the two and the above-mentioned AND logic gates and to the second output of the one-shot, and the two inverse outputs of the tracking signal generation unit n, as well as the output of the frequency dividers are connected to the inputs of the adjunctive logic element, and whose output is connected to the input of the logical element OR, the outputs of the coincidence circuit and the second inhibitor circuit are connected respectively to the reset terminals of the counter and the sump generation unit, and the first inputs are connected to The output of the first front-edge driver is directly, and the inputs are via the delay line. A device circuit for controlling a thyristor-controlled self-contained inverter is shown in FIG. 1. On fng. 2 shows a functional diagram of a signal generation unit for tracking a certain frequency range. FIG. 3 shows the analysis signals and the counter reset signals. The device circuit for controlling a thyristor adjustable self-contained inverter (see Fig. 1) contains a master oscillator 1, frequency divider 2, fs front-edge senders 3 and 4, frequency converter - code 5, inhibit circuit 6, dialer of frequency boundary code 7, generation unit tracking signals of a certain range 8, logic elements AND 9, 10,, 11, logic element OR 12 and one-shot 13, with delay line 14 between them, trigger 15, conversion ring 16, to the input of which signals 6 come from the frequency divider output , current sensors represented by block 17, as well as shapers of wide and short pulses 18. The principle of operation of the control device is as follows. The frequency divider arrives at the frequency divider input at 48 f. At the divider output, it receives a set of frequencies of 24, 12 f, and 6 f. The divider is, for example, a totalizer. Frequency pulses 48 are fed to the front-edge driver 3, at the output of which narrow pulses are formed, the duration of which is sufficient for analyzing the contents of the counter and resetting it to the code state. These pulses are sent to the frequency converter — code 5 and to the inhibitor circuit 6, the frequency converter — the code consists of a reference frequency generator 19, a delay line 20 with a residual time t for analyzing the contents of the counter, a ban circuit 21, a coincidence circuit 22, and a pulse counter 23 In the absence of a signal at the output of the imaging unit 3, the prohibition circuit 21 from the reference frequency generator receives pulses at the input of the counter 23, which are counted by it. The convincing signal at the output of the imaging unit before front 3 prohibits the passage of frequency to the input of counter 23, as well as passage through the prohibition circuit 6 to the input of the tracking signal generation unit of a certain range 8 allows the code recorded in counter 23 to be analyzed. The delay 2O (see FIG. 3a) analyzes the O1i code and starts it;

with resetting the counter to its original state

 Reset VtsoiA - - the frequency of the reference generator, as well as the discharge level

the counter and the dial are determined by the specified accuracy of the frequency to code conversion.

The tracking signal generation unit of a certain range, shown in FIG. 2, consists of comparison circuits 24, decoder 25, logic gates And 26 and 27, prohibition circuit 29, two flip-flops 29 and 30, as well as the leading front formers 31 and 32.

Comparison schemes compare the code recorded in the counter with the codes stored in the dialers. If the frequency, whose voltage is recorded in the counter, is less than, greater than or equal to the frequencies, which are written in the dialing number, then the comparison circuits produce a signal that is less, greater than or equal, respectively. From the comparison circuits, these signals are sent to the decoder 25, which analyzes them and produces or does not produce intermediate signals Rj h Pg.

The condition for the production of these signals:

dl -

R.

 ъг code- (

for

KOA-1 ZG KOD2.

from the output of the decoder, signals are sent to the logic elements And 26 and 27, as well as to the prohibition circuit 28. The other inputs of these circuits are received from the side of the prohibition circuit 6 (see Fig. 1) analysis resolution impulse and from the leading edge imager 4 sync on the leading edge of the frequency 6 f. When they appear together at the output of the element 26 or at the output; g: e of the element 27 and at the output of the prohibition circuit 28, the corresponding output signal appears. When the pulse at the output of the element AND 26 is received, the trigger 29 goes into one state, i.e. a sigpap P is formed, while the leading edge driver 31 resets the trigger 30 to the zero state. A similar process occurs when a signal appears on

the output element And 27. In this case, the trigger 30, i.e. a RE signal is generated, and cV trigger trigger 29. When a signal appears

5 la at the output of the prohibition scheme 28, i.e. in the absence of intermediate signals at the outputs of the decoder, both triggers are reset to the zero state. Thus, at the output of the tracking signal generation unit, three combinations of output signals are possible, namely: the upper frequency range of the master oscillator corresponds to single signals at the Ivers Output 6 and 4 of the flip-flops 29 and 30 and zero signals at the outputs 5 and 7; the average frequency range, f, correspond to single signals at terminals 5 and 4 and zero signals to

about clips 6 h 7; lower frequency range i, f. there are single signals at outputs 7 and 6 and zero at 5 and 4.

 According to FIG. 1, the signals 4, 5, 6, 7 arrive at the elements AND 9, S, 11. Accordingly, with these three combinations of frequencies, the signals at the input of the element OR 12 are inputted either from element II with often

that 6 f, or element 9 with frequency

12, or element Yu with frequency 24. In the future, the signals from the output of the element OR 12 arrive at the trigger 15, as well as through the delay line

 14 to the first input of the one-shot 13. In addition to TorOj, the signals from the outputs 5 and 7 of the signal-generating unit 8 (see Fig. I) are fed to the second input of the one-shot 13. Duration

0 of the output pulse of the one-shot 13 is inversely proportional to the magnitude of the control signal at the second input. With a non-linear implementation of a change in the input signal of the one-shot 13

5, at its second input, an ohmic divider is used, which receives signals synchronized with frequency 6 from the signal generator unit (j day 8. Block 18 contains shapers of wide and short pulses, which receive signals from the output of the single vibrator 13, trigger 15, and recalculation ring 16 , synchronized with frequency 6, as well as signals from current sensors 17. As a result, a sequence of pulses is formed that start the inverter's thyristors. Inverter can be said that the accuracy of controlling the output frequency of the inverter at the moments of transition from one structure of the output voltage curve to another is determined directly by the pulse frequency from the master oscillator to the inverter, and not by the input signal of the master oscillator and also depends on the frequency of filling the ZG period with reference pulses The frequency converter's generator is a code, depending on what the digit of the counter and the set of the dialer are chosen, as well as the tracking signal generation unit. In addition, the frequency of the master oscillator is monitored during each period, which also significantly improves the control accuracy. 6 pms of braces A device for controlling a thyristor adjuster is a stand-alone inverter with a pulse-width-modulated module containing a master oscillator connected to a frequency rapper whose direct output is connected to a recalculation ring, each of the intermediate outputs of a frequency divider is connected to one of the two inputs of the two logical elements AND, the conclusions of these elements through the logical element OR to the trigger and via the delay line to the first input of the fortrilator wide and short and thyristor trigger pulses, to the inputs of each of which are connected the outputs of a single vibrator, a trigger, current sensors, and a ring, which is equipped with a frequency pre-phase generator, to increase the accuracy of controlling the output frequency of the inverter - the code containing the output. a counter with a reset bus, a reference frequency generator, a inhibitor circuit, a delay line and a coincidence circuit, a tracking signal generation unit containing two forward and two inverse outputs, a dialing set, an additional logic element AND, two front-edge drivers and a second inhibitor circuit, moreover, the input of the frequency converter is connected to the output of the master oscillator through the first front-edge driver, and its output counter is connected to the tracking signal generation unit, the input of which is connected Also, the dials of the codes are output. Through the second front-edge driver, the output of the frequency divider, each of the two direct outputs of the tracking signal generation unit, are connected respectively to the second input of the two aforementioned logic elements And and the second input of the single-oscillator, as well as the output of the frequency divider is connected to the inputs of the additional logic element AND, the output of which is connected to the input of the logic element OR, the outputs of the coincidence circuit and the second the inhibit circuits are connected respectively to the reset buses of the counter and output unit: tracking signals, and their first inputs are connected to the output of the first front-edge driver directly, and the second inputs through the delay line. Sources of information taken into account during the examination 1. B. Kalashnikov, et al. Control systems for autonomous inverters. M., Energie, 1974, p. 23-25. 2. USSR author's certificate No. 318127, кп. H 02 M 1/08, 1971. 3. Application No. 2134417 Cl. H 0.2 R 13/18, 1976, by which the decision to issue the author's certificate was made (prototype). Si

I KoB code2 I

a

26

23

28

thirty

- 7

c4

(put.2