SU866753A1 - Digital controllable generator - Google Patents

Description

(54) DIGITAL CONTROLLED GENERATOR

Claims (1)

The invention relates to radio engineering and can be used in synchronization systems with a discrete auto racking frequency. A digital controlled oscillator is known that contains a generator-setting delay unit, a serially connected counter, a register, and a digital comparator, while the counter outputs are also connected to control inputs of the digital comparator 1.. However, when the frequency of the input signal decreases or the frequency of the master oscillator increases, the counting generator the trigger, also included in the device, is zeroed before the input signal period ends, which leads to a synchronization failure and, consequently, low reliability of the device. The purpose of the invention is to increase the reliability of operation when changing the frequency of the input signal. To achieve the goal, a digital controlled oscillator containing a second oscillator, a delay unit, a serially connected counter register and a digital comparator, while the counter outputs are also connected to the control inputs of the digital comparator, a pulse driver, a variable component analyzer and the element -And-and-or, while the inputs of the pulse generator and the analyzer of the presence of the variable component are combined and are the input of the digital controlled oscillator, the output of the pulse generator on It is connected to the installation input of the master oscillator phase, the register census resolution input and the first and second inputs of the element NOT-AND-OR, the analyzer output of the variable component is connected to the third input, and the digital comparator output is connected to the fourth input of the element NON-AND-OR, the output of which is connected to the input of the delay unit, the installation input of the counter is connected to the output of the delay unit, and the information input of the counter - with the output of the master oscillator. The drawing shows a structural electrical circuit of the proposed digital controlled oscillator. The scheme contains a master oscillator 1, a pulse shaper 2, a variable component analyzer 3, a NOT-AND-OR 4 element, a delay block b, counter 6, a register 7, a digital comparator 8. The device operates as follows. In the presence of an input signal, the digital controlled oscillator is synchronized by an input signal. The input signal is fed to the pulse shaper 2, which generates short output pulses once during the input signal period, atti pulses are phased into the master oscillator 1, the numbers from counter 6 are recorded in register 7 and the counter 6 is set to zero state in time block 5 delay. After being set to the zero state, the counter b during the input signal period counts the number of pulses from the master oscillator 1. By the time the pulse arrives from the output of the driver, 2 pulses to the register census resolution input 7 in the counter b will have recorded N pulses. This number is recorded in register 7. At this moment, the same number of N is supplied to both groups of inputs (control and information) of digital comparator 8. The output of digital comparator 8 results in a pulse, which is an output signal of a digital controlled oscillator. . Thereafter, the process is repeated. When the input signal disappears, the analyzer 3 having a variable component outputs to the third input of the NOT-AND-OR 4 element a potential allowing the pulses from the output of the digital comparator 8 to pass through the block 5 to the installation input of the counter 6. At the same time, the digital controlled oscillator works in generation mode. Counter 6 counts the number of pulses produced by the generator 1, since there are no pulses allowing data to be written to register 7, the last recorded number, for example, N, corresponding to the last value of the duration of the input signal period, is stored in register 7. When the counter b is set to the state corresponding to the number N, the same number (N) will appear on both inputs of the digital comparator 8. In this case, a pulse appears at the output of the digital collator 8. This impulse passes through the scheme of the AND-OR element NOT-AND-AND-OR 4 and the block 5 of the delay to the installation input of the counter 6, which has encircled the latter. Thereafter, the process is repeated. After the input signal appears, the digital controlled oscillator goes into synchronization mode. Thus, the application of the present invention makes it possible to increase the reliability of synchronization of a digital controlled oscillator when the frequency of the input signal is changed due to constant monitoring of the duration of the period of the input signal. DETAILED DESCRIPTION A digital controlled oscillator comprising a master oscillator, a delay unit, a serially connected counter, a register, and a digital comparator, wherein the counter outputs are also connected to the control inputs of a digital comparator, characterized in that, in order to increase reliability when changing the input frequency signal, the pulse former, the variable component presence analyzer and the AND-AND-OR element are entered into it, while the pulse generator inputs and the variable state analyzer are connected to the input of the installation, the phase of the master oscillator, the input resolution register and register to the first and second inputs of the element NOT-AND-AND, the analyzer output variable power connected to the third input, and the digital comparator output - to the fourth input of the element NEg: AND-OR, the output of which is connected to the input of the delay unit, the installation input of the counter is connected to the output of the delay unit, and the information input of the counter with the output of the master oscillator. Sources of information taken into account in the examination 1. USSR author's certificate 658707, KL..N 03 V 19/00, 20.02.78 (prototype). och - -) - r4 l J