SU691771A2 - Digital frequency meter - Google Patents

Description

I

The proposed digital frequency meter is intended for use in information and measurement technology, and in particular for measuring the frequency of a three-phase network voltage.

According to the main author. St. From 415599, a digital frequency meter is known comprising a pulse counter, a key, a generator of exemplary time intervals, a control and output blocks, a control unit for the first pulse counter trigger, and a pulse shaper formed by a frequency tripling unit including three two-input coincidence elements, one three-input assembly circuit, And also three phase voltage converters into rectangular pulses, the inputs of which are connected to the outputs of the source of the measured frequency, and the outputs are pairwise connected to the inputs of the elements with the same The outputs of which are connected to the inputs of the assembly circuit, the output of which is connected via a key to the input of the control unit by the first trigger of the pulse counter.

the direct and inverse outputs of which are connected to the separate inputs of this trigger l .. d.

The disadvantage of a pan device is that it does not exhaust all the possibilities offered by a three-phase network for improving speed.

The aim of the invention is to increase speed. This will entail an expansion of its range towards smaller values of measured frequencies.

For this purpose, in a digital frequency meter, a co-holding pulse counter, a key, a rei -rator of exemplary time intervals, a control unit, an output unit, a control unit for the first trigger of the pulse counter, and a main pulse shaper, formed by a triple frequency unit, including three two-input elements of coincidence and one three-input circuit assembly, and three phase voltage converters, the inputs of which are connected to the input buses of the device and the outputs are pairwise connected to the inputs — elements of coincidence, the outputs of which are bv with the inputs of the assembly, the output of which is connected to the key input, the output of which is connected to the input of the pulse counter trigger control unit, the direct and inverse outputs of which are connected to the separate inputs of the first pulse counter trigger, the BpQvieHH generator inputs are connected to the first key inputs and an output unit, the second and third control inputs of which are connected respectively to the output of the counter named bcofe and the first output of the control unit, the second output of which is connected to the control input of the counter and pulses, additionally introducing two inverters, two logical elements AND, a logical element OR, and an additional pulse former, the first and second inputs of the additional pulse maker are connected to the device’s first input bus, the third and fourth inputs of the additional pulse maker are connected to the second input bus, the fifth and sixth inputs of which are connected to the third input bus of the device, the outputs of the main and additional pulse shapers are connected directly to the input Am first AND gate, and through respective inverters to the inputs of the second AND gate, outputs of first and second AND gates by OR gate Con cheny to the first input ylyucha. The drawing shows a structural electrical circuit of a digital frequency meter. The frequency meter contains the main pulse shaper 1 and the additional pulse shaper 2, formed by blocks 3 and 4, tripling the frequency and converters 5, 6, 7 phase and 8, 9, 1 О linear voltages in direct voltages, inverters 11, 12, logic ELTENTS AND 13, 14, logical element OR 15, key 16, 17 pattern intervals, control unit 18 for controlling the first trigger of the counter impulses counter 19 impulses, control unit 20 g output unit 2 The device operates as follows. . -, - From the input busses of the device to the inputs of the transducers 5-7, the phase voltages of the three-phase current of the measured frequency are received. At the outputs of phase voltage transducers 5-7, rectangular impulses are formed with a duration equal to half the period of the measured frequency. Since the phase voltages are shifted relative to each other by 1/3 period, the rectangular pulses from the outputs of the phase voltage converters are also shifted relative to each other by 1/3 period. From the outputs of the transducers 5-7, the pulses arrive at the unit 3 of the frequency, at the output of which a uniform sequence of pulses is obtained with a frequency of three times greater, h amp l measured frequency at the input of the frequency meter. Transducers 8, 9, 10, subtracting the inputs of which ps are paired with the input buses of the device, convert the differences of the firing voltages (Hbie voltage line) to square pulses with a duration equal to half the period of the measured frequency. These pulses are shifted to each other by 1/3 periods, thus, at the output of block 4, the frequency of the resulting pajEi number is measured by the frequency of the pulses with a frequency three times as large, h @ измер measured frequency, and shifted by 1/2 Yeruida relatively shulpulsNYy sequence at the output of the input device 1. Jampuysy from the outputs of the formers. 1 and 2 are fed to the Bxog element I 13, as well as after iShearing in inverters ii, 12 on 1bHOD and I 14. At the outputs of the logic elements Ip and Im OjibHbie, the pulses are equal to 1/3 of the period and duration is 1 / 12 pfibya, in addition, pulsed signals at the outputs of the elements And 13 and 14 are shifted by another relative to each other by 1/12 of the period measured by the clock TdTbi. And at the output of the logical element OR 15, a uniform noc is formed, which is the number of pulses with a frequency of 6 times greater than the h, the measured frequency of all | in: 6 of the frequency meter. From the output of the element OR 15 Through the key 16, opened at the measurement of 17 sample intervals, the pulses reach the input of the unit 18. The impulse from the direct input of the unit 18 goes to the first separate input of the first trigger of the counter of the impulse 19 and sets it to the state 1, e after 1/1 period impulse from the input: block output 18 through the second separate input