SU661757A1

SU661757A1 - Pulse selector

Info

Publication number: SU661757A1
Application number: SU762414250A
Authority: SU
Inventors: Сергей Васильевич Попов
Original assignee: Предприятие П/Я В-8117
Priority date: 1976-10-25
Filing date: 1976-10-25
Publication date: 1979-05-05

Description

1one

.Изобретение относитс к импульсно технике., ,The invention relates to a pulse technique.,,

Известен селектор импульсов/ сост щий из триггера, двух элементов задержки , одновибратора и схемы совпадени 1 . Этот селектор вьздел ет из входного потока сигналов только те импульсы, частота которых лежит з определенных пределах. Кроме того, он не обладает достаточной помехоустойчивостью .A pulse selector is known / consisting of a trigger, two delay elements, a one-shot and a 1 matching circuit. This selector selects from the input signal stream only those pulses whose frequency lies within certain limits. In addition, it does not have sufficient noise immunity.

Наиболее близок к предлагаемому селектор импульсов, содержащий элемент ИЛИ, один вход которого соединен со входной шиной, а выход подк.лючен ко входу многосекционной линии задержки, многовходовый элемент И, первый вход которого соединен со входной шиной,а другие входы подключены к выходам секций многосекционной линии задержки, линию задержки , вход которой соединен с выходом элемента И, первый вход которого соединен со входной шиной, а второй пСй лючен к выходу многосекционной линии задержки, причем выход линии задержки соединен со вторШ входом элемента ИЛИ 2.Closest to the proposed pulse selector, which contains an OR element, one input of which is connected to the input bus, and the output is connected to the input of a multi-section delay line, a multiple-input element AND, the first input of which is connected to the input bus, and the other inputs are connected to the outputs of multi-section sections the delay line, the delay line, the input of which is connected to the output of the element I, the first input of which is connected to the input bus and the second PC is connected to the output of the multi-section delay line, the output of the delay line being connected to ORSH input of the OR 2.

Этот селектор недостаточно помехоустойчив .This selector is not robust enough.

Цель изобретени - повышение помехоустойчивости ,.The purpose of the invention is to improve noise immunity,.

Поставленна цель достигаетс тем, что в селектор импульсов, содержащий элемент ИЛИ, один вход которого coe-динен со входной шиной, а выход подключен ко входу й даьеёкцйЬнйой линии задержки, многовходовый элемент И, первый вход которого соединен со The goal is achieved by the fact that a pulse selector containing an OR element, one input of which is coe-dinin with an input bus, and an output is connected to the input of the last dwelling delay line, a multiple-input element AND, the first input of which is connected to

o входной шиной, а другие входы подключены к выходам секций многосекционной линии задержки, линию задержки, вход которой соединен с ВЕЛКОДОМ элемента И, первый вход которого соеди5 нен со входной шиной, а второй подк .пючен к выходу многосекционной линии задержки,причем выход линии задержки соединен со вторым входом элемента ИЛИ, введены дополнительные o input bus, and other inputs are connected to the outputs of sections of a multi-section delay line, a delay line whose input is connected to the ILCODE of the element I, the first input of which is connected to the input bus and the second connected to the output of the multi-section delay line, and the output of the delay line connected to the second input of the element OR, additional

0 элементы И, в линию -задержки введены дополнительные секции линии задержки , входы которых подключены к выходам упом нутых дополнительных элементов И, а выходы соединены с допол5 нительными входа1 а1 элемента ИЛИ, причем первый вход первого дополнительного элемента И соединен с выходом линии задержки, а его второй вход соединен со вторым входом элемента И 0 AND elements, additional delay line sections are introduced into the delay line, the inputs of which are connected to the outputs of the aforementioned additional AND elements, and the outputs are connected to additional inputs1 a1 of the OR element, the first input of the first additional AND element connected to the output of the delay line, and its second input is connected to the second input of the element AND

Claims

6 and with the first input of the second additional element and, the second input of which podklgochek to the output of the first additional section of the delay line. The structural electrical circuit of the selector described is shown in the drawing. The selector contains an OR 1 element, a multi-section delay line 2 with sections B, element AND 7, a delay line 8 from section 9 and additional sections 1.0.11, additional elements 12,13 , multi-input element And 14. The principle of operation of the selector is as follows. When a selectable sequence with a period T arrives on bus 15, the first pulse passes through the element OR 1, for: keeps for; time T in delay line 2 and arrives at element 7, to the other input of which at this moment comes the second pulse of the sequence. The output element has passed. And the 7 pulse is delayed in section 9 of delay line B for some interval - equal to the delay times of section b of delay line 2, and from section 9 of delay line 8 enters through the element OR 1 to delay line 2. Thus, delay line 2 after the second pulse of the selectable sequence moves an additional pulse delayed by time .t, (. The third pulse of the selectable sequence comes from the selector to element And 7 simultaneously with the second pulse delayed for a period And 7 with a scientific research institute of delay 2. A pulse coinciding with element AND 7 passes through section 9 of delay line 8, where it is delayed by time T, and arrives at delay line 2 (through element OR 1) and at element AND 12, to another input At this moment, an additional pulse arrives from the delay line 2, delayed relative to the second impulse for the time T ..., element 12. And the pulse coincides with the additional section 10 of the delay line 8, where it is delayed at interval f and arrives at the element And 13 and through the element OR 1 - on the line of the dead -. Ki 2, where do whether there is a third impulse of the sequence and a first additional impulse with respect to it per T. A pulse arriving at the AND li impulse delayed relative to the third pulse of the sequence for the time + Tg, the output of the And 13 element does not pass, since there is no pulse at the other input of the And 3.3 element at this moment. Thus, after the third pulse of the sequence, two additional pulses already follow delay line 2. Similarly, the fourth pulse of goodwill, coming from the bus 15 to the element And 7, coincides in time with the third one, delayed for a period, passes to the output of the element And 7, is delayed by t in section 9 of the delay line 8 and goes to the element OR 1 and the element AND 12. The output pulse of the AND 12 element is delayed in section 10 of the delay line 8 by Tg and fed to the element OR 1 and to the element 13, to the other input of which from the delay line 2 at this moment comes a second additional pulse away from the third delayed pulse on t + G. Output the pulse of the element And 13 is delayed by in section 11 of the delay line f and forms a third additional pulse delayed relative to the fourth by C t. This pulse from section 11 of delay line 8 goes through the element OR 1 to delay line 2, as a result of which the fourth pulse in the back-hold line 2 is followed by a group of three additional pulses at intervals of -1, At the moment the fifth pulse arrives A fourth pulse delayed for a period passes to the output of delay line 2. At the same time, three additional pulses are sent to the multi-input element AND 14 from the terminals of the delay line 2, resulting in the output of the AND 14 element pulses that are synchronous n to that and subsequent impulses of a selectable sequence, ..... When a selector randomly arranged in time for interference pulses arrives on bus 15 (e.g., due to noise spikes), single interference pulses are passed to the selector output only if the intervals between the pulses and the delay times in all sections of the delay line 2 coincide. - decreases rapidly with an increase in the number of compared time intervals; with a comparable frequency of following useful and interfering signals with an increase in the number of compared intervals by one, the coincidence probability decreases by one to two orders of magnitude. So, if at the output of an element And 8 the average frequency of false alarms is about hundreds of Hz, at the output of the multiple head element And 14 there is an interval between single false alarms for about ten seconds. The invention The pulse selector contains an OR logical element, one input of which is connected to the input bus, and the output is connected to the input of the delay line, a multi-input logic element AND, the first input of which is connected to the input bus, and the other inputs are connected to the outputs of sections of a multi-section line delay, the delay line, the input of which is connected to the output of the logic element And, the first input of which is connected to the bus, and the second is connected to the output of the multi-section delay line, the output of the rear line The cables are connected to the second input of the OR OR gate, so that, in order to improve noise immunity, additional AND logic gates have been introduced into it, and the delay line has been entered into: additional sections of the delay line, the inputs of which are connected to the aforementioned additional logical AND arguments, and the outputs are connected to the additional inputs of the OR logic element, the first input of the first additional element AND connected to the output of the delay line and its second input connected to the second input m of the AND gate and the first input of the second additional AND gate, the second input of which is connected to the output of the first additional section of the delay line.

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Sources of information taken into account in the examination

1, USSR Copyright Certificate No. 292228, H 03 K 5 / 20,13.04.67.

2. USSR author's certificate ff 420090 / H 03 K 5/18, 06.09.72,