SU1233271A1 - Multichannel device for time discrimination of pulsed signals - Google Patents

Abstract

The invention can be used in computational and impulse engineering when summing up and subtracting independent impulse sequences. The purpose of the invention is to expand the functionality achieved by increasing the number of signals to be resolved. The device contains drivers 1, triggers 2, delay lines 4, channels 3 of signal processing, each of which contains serially connected control units of blocks 5 each consisting of p-input logic element (LE) I 6, LE I 7 , LE OR 8 and 10, inverter 9 on LE. The last block 5 is made on LE And 6 and inverter 9. The device has input and output c: (L o o o to .IITUJ .. J

Description

tires 1 and 12 respectively. The impulses arriving at the tires 11 at arbitrary points in time cause a consistent appearance of ig-pulses of duration at the respective

I

The invention relates to a pulsed technique and can be used in computer technology for the summation and subtraction of independent sequences.

The purpose of the invention is to expand the functionality by increasing the number of allowed signals.

The drawing shows a block diagram of a multichannel device for temporal separation of pulse signals.

The device contains drivers 1, the inputs of which are the inputs of the device, and the outputs are connected to the S inputs of the trigger 2, the outputs connected to the first inputs of the signal processing channels 3, delay lines 4, Each channel 3 contains n-1 serially connected control blocks 5, Each of which, except the last, consists of a p-input element, nta AND 6, the first input of which is connected to one of the inputs of the two-input element AND 7, the other input of which is connected to the output of the element OR 8, which is the first Output from the control unit 5 o One of the inputs of which is connected to the output of an AND 7 element, and the other to the output of the multi-input element PI 6 and, through inverter 9, to one of the inputs of the two-input element OR 10, the other input of which is the BTOpbiM input b of the control unit 5, the output of the element OR 10 is the second input d of the control unit 5, the remaining n − 1 inputs of the control unit 5 are its interchannel inputs. The last control unit 5 consists of n input element 16, the output of which is height 12. The maximum permissible frequency of the pulses on the buses 11 of the n-channel device is (n1), where n is the number of input signals. 1 3.p. f-ly 3 I ill.

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channel 3 is connected simultaneously via a delay line 4 to trigger input 2, as well as to inverter input 9, the output of which is the second output d of the last control block in the channel.

All second outputs d of control blocks 5, in each channel 3 are connected to the n-1 mechanical channel inputs of the corresponding control blocks 5 of the remaining channels 3, and the first output from the control blocks 5 in each channel 3 is connected to the input of the previous one block 5 in channel 3. In addition, the device contains input I and output 12 of the bus.

The device works as follows.

In the absence of a pulse at the input buses of the device, at the outputs of the trigger 2, the potential O is established, the elements 6 and 7 of the first blocks 5 in each kangsha 3 become closed at the first input a, therefore the output of these blocks 5 sets the potential O and at the second output d is the potential 1. Thus, the elements 6 of all the first blocks 5 in the channels will be open along all P - 1 inputs 5 except the first a. The pulse at the input of any channel 3 is formed by the duration of the driver G to a value sufficient to switch the trigger 2 and sets this trigger to state 1, and the element 6 of the first block 5 in channel 3 opens, its second output d receives value O and closes one of the n-1 inputs of the element And 6 of the first blocks 5 of all other channels 3. In addition, the potential 1 from the output of the element ШШ 8 opens the element And 7 of the block 5 and

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 In this way, the state of output I from block 5 is blocked relative to the state of all inputs, except for the main a, and element 6 of block 5.

Potential 1 from the first output from the first in-channel 3 of block 5 is transmitted in a similar way to the next block in the channel 5, etc., and the state 1 of the output from blocks 5 is given to the second input b of block 5 and to output d through the element OR 10 previous to the channel of block 5, which leads to unlocking the state O of all other blocks 5 with the same sequence number in channel 3 as the previous one.

Thus, if the last pulse arriving on the bus 11 of the device has reached the output of some block 5, then in all channels 3 blocks 5 less than this number will be open in all n-1 inputs of the And 6 element except the first the entrance. Potential I, having appeared at the output of the last block 5 in the channel, is applied to delay line 4 and after time f - resets the trigger 2 of its channel 3 to the state O, a pulse of duration is formed on the bus 12 of channel 3 If before the pulse ends the output of any channel 3 to the input of another channel 3 in turn comes a pulse, then potential 1 only reaches the output of the penultimate block 5 of this channel 3, and its further flow is blocked by the closed element 6 of the next block 5 of this channel 3. Impulse which appeared then on to ode third channel only reach the exit trtego from the end block 5 etc. After the end of the pulse on bus 12, channel 3 unlocks the element And the last 6 blocks 5 in the remaining channels 3, and the potential 1 of the outputs of all the other blocks 5 are transmitted to the next blocks 5 in channel 5. In case the pulses are simultaneously in two or more By device buses 11, only one of the first blocks in channels 3 will open 5, since more than one block 5 with one serial number in channels 3 cannot be opened due to interlocking on interchannel input blocks 5 with identical numbers. Further, as the races

ten

of the signal space, one of the second blocks in channels 3 will open 5, etc.

Thus, impulses arriving at the devices 11 buses at arbitrary points in time will cause a consistent appearance of pulses of duration b on the corresponding buses 12 of the device.

The maximum permissible frequency of the pulses on the tires of an 11 n-channel device is equal to (n), where n is the number of input signals.

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formula of invention

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Claims (2)

1, A multichannel device for temporal separation of pulse signals, containing n-formers, the inputs of which are connected to the input buses of the device, and the outputs to the S-inputs of the flip-flops, the outputs of which are connected to the first inputs of processing channels: that, in order to expand the functionality due to an increase in the number of allowed signals, delay lines are inserted into it, and each of the n channels of signal processing 30 contains n- serially connected control blocks, with each channel Signal processing of each subsequent control unit is connected to the second input of the previous one, and the output of the last control unit n1 in each signal processing channel is connected to the R-input of the trigger of its channel O for the signal processing, the second outputs of all The control units in each signal processing channel are connected to the p-I interchannel inputs of the corresponding control units of the remaining n-1 signal processing channels. 2. The device according to claim 1, 1, 2, and 2, is that the control blocks of each signal processing channel, except the last one, contain the n-input element I, the two-input element I, the first and second elements SH and an inverter, the first input of an n-input element And is connected to one of the inputs of a two-input element And, the other input of which is connected to the output of the first element $ 12337-7 6 This OR, which is the first output of the control unit, the rest of the control unit, one of the input n-1 inputs of the control unit of which is connected to the output of the two-channel inputs, and the other input The control unit is connected to the output of the p-input. It has the p-input element AND, the output of which AND and through the inverter to the one-way circuit is the output of the processing channel - from the inputs of the second element OR, the other signals and is connected to the input The second input of which is the second inverter, the output of which th is input to the control unit, an output Auto-th second output of the last control cerned Yu-OR gate is vtorymschego block.