SU1007189A1 - Device for time division of pulse signals - Google Patents

Abstract

A DEVICE FOR TIME DIVIDEING PULSE SIGNALS, Keeping the first and second triggers, the counting inputs of which are connected to the first and second input buses, respectively, and a pulse key with a control signal, whose switching input is connected to the pulse clock frequency bus, and its first output is connected to the control input signal A second trigger, characterized in that, in order to improve speed and at the same time simplify the device, in a nominal impulse key with memory | The control signal is made with a paraphase control input, its direct and inverse inputs are connected to the corresponding outputs of the first and second triggers, and the second output of the impulse key with the memory of the control signal is connected to the input of the first zero trigger.

Description

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Yu

The invention relates to a pulse technique and can be used in computer systems, automation, in measuring devices and in microelectronics for temporal separation of two pulse signals.

A device for temporarily separating two pulse sequences is known, comprising two inputs of pulse signals, two outputs and an input of clock frequency pulses G.

The disadvantages of this device are the complexity, due to the presence in its composition of two memory blocks, a polling unit and a reading unit, as well as low speed, due to the structure of the device, in which the pulse signals are first stored in the memory blocks, and then alternately read

The closest in technical essence to the proposed device is a device for temporarily separating two pulse sequences, containing the first and second flip-flops, the counting inputs of which are connected to the input buses of the first and second pulse signals, respectively, the first and second pulse keys with memory of the control / geni signal, the control inputs | of which are connected to the outputs of the first and second triggers, respectively, and the first outputs of which are connected to the installation inputs zero, respectively, of the first and a second flip-flops and, accordingly, the first and second output bars, wherein the switching input of the first pulse switch latched control signal is connected to the bus clock, and its second output connected to the input of the second switching pulse wrench latched control signal 2.

The disadvantages of the known device are its complexity, due to the use of the second pulse key with the storage of the control signal, and the insufficient speed associated with the passage of the clock pulses through the second pulse, the key with the memory of the control signal.

The purpose of the invention is to increase speed while simplifying the device.

This goal is achieved by the fact that the device for temporal separation of pulse signals, containing the first and second triggers, the counting inputs of which are connected to the first and second input buses, and a pulse key with signal storage

control, the switching input of which is connected to the clock pulse frequency bus, and its first output is connected to the input. setting zero of the second flip-flop in the device, a pulse key with control signal memory is made with a paraphase control input, its direct and inverse inputs are connected to the outputs of the first one and the second trigger, and the second output of the pulse key with the storage of the control signal is connected to the installation input zero of the first trigger.

FIG. 1 shows the proposed device; in fig. 2 is a timing diagram of its operation in FIG. 3 is one of the possible implementations of a pulse key with control signal storage, an example.

The device for temporal separation of pulse signals (Fig. 1) contains the first 1 and second 2 triggers., A pulse key 3 with a memory of the control signal, input buses 4 and 5, a clock frequency pulse bus 6, output buses 7 and 8.

Initial state of the device: on buses 4 and 5 there are no pulses with gates, triggers 1 and 2 are in state O, on PR51MOM and inverse inputs of key 3 there are signals O, on the bus B pulses of the clock frequency are sent to the input switching key 3, however, does not pass to its outputs and output buses 7 and 8, since the forward and inverse inputs of key 3 have signals O.

The device operation is illustrated by timing diagrams, which show a pulse signal on the first input bus (Fig. 2a), a pulse signal on the second input bus (Fig. 2b), clock frequency pulses (Fig. 2b, pulses on the output of the first trigger 1 ( Fig. 2d), pulses at the output of the second trigger 2 (Fig. 2e), pulses on the first 7 and second 8 output tires (respectively Fig. 2e and 2g) o

When pulses are simultaneously received at the input buses 4 and 5, the first and second triggers 1 and 2 simultaneously switch to state 1. In this case, key 3 is in an undefined state, in which the clock pulses can be switched at one of its outputs. Assume that the switching of one of the clock pulses takes place on the second output 3. This pulse then goes to the input of setting zero of the trigger 1 and switches the trigger 1 to the state O. The next clock pulse will be transmitted to the first output of the key 3.

Thus, a temporary separation of the pulse signals occurs.

One of the possible implementations of a key switch with memory of a control signal, having a paraphase input, is shown in Fig. 3. The pulse key with signal recall of the control signal contains logic elements 9-13 AND-NOT or OR-NOT, depending on the choice of the element base, direct input 15, inverse input 16, clock input 14, first output 17 and second output 18.

The device can be used in automation systems, in computing technology, in measuring instruments.

Direct application - use in an automatic, system, sorting ore in a career.

The advantages of the proposed device in comparison with the imperative in-h are the speed hob, due to the fact that the clock pulses pass through only one pulse key with the memory of the control signal, and not through two key keys, as in the well-known device a decrease in the number of elements entering the device, since instead of two pulse keys with storing the control signal, it consists of only one such block.

Claims (1)

. DEVICE FOR TEMPORARY SEPARATION OF PULSE SIGNALS, containing the first and second triggers, the counting inputs of which are connected respectively to the first and second input buses * and a pulse switch with memory of the control signal, the switching input of which is connected to the pulse clock frequency bus, and its first output is connected to the input of the zero setting of the second trigger, characterized in that, in order to improve performance while simplifying the device, in nm the impulse key with storing the control signal is made from paragraph nym control input, its direct and inverse inputs respectively connected to outputs of the first minutes of the second flip-flops, and the second output pulse with a latching key control signal is coupled to the input, setting the first flip-flop zero. . $