SU656205A2 - Digital linearization device - Google Patents

Description

(54) DIGITAL LINEARIZER of control, connection of input with outputs of comparison units of caps, and output connected to frequency sharing, counters of impulses; Frequency and frequency divider, Programkty block is connected to the block of linearization sections selection. When the additional delimiter frequency is switched on between the inputs of the first pulse counter and the controlled frequency divider, the input of which receives pulses from the Generator, the state of the second pulse counter is described by the formula: where H is the state code of the first pulse counter; Kd is the division ratio of the additional frequency divider; Kdu is the division ratio of the controlled frequency divider. Considering the relation -tp in (1), we conclude that, by giving the integer values of the division ratio of the controllable and additional frequency dividers, we obtain the fractional values of the resulting division ratio. Therefore, the inclusion of an additional frequency divider will simplify the device while improving accuracy. FIG. Figure 1 shows the structural electrical circuit of the device. The device contains a code 1 detection unit, a pulse counter 2, a block for allocating linearization sections 3, a controlled frequency divider 4, a pulse counter 5, a frequency divider 6. The linearizer operates as follows. The input code is fed to one inputs of the code 1 detection unit, and the pulse counter 2 other status codes. At one time, this code is fed to the linearization section selection module 3, in which, according to a predetermined program, linearization and the dividing coefficients of the controllable frequency band 4 corresponding to these sections are set. The conversion cycle begins with the start of the start-up cycle. This signal resets the pulse counter 2, the amplified frequency divider 4, the frequency divider 6, sets the accumulation meter 5 to the initial frequency and allows the passage of patterns 1: s from the control unit (frequency divider to the memory counter pulse) Co, The block of inarisation plots 3 establishes the division ratio of the controlled frequency division 4 corresponding to the first plot, In accordance with the numbers of the inarization plots, the selection block of the inerization plots 3 sequentially changes the division ratio of the controlled 4. Then bodies frequency during reobrazovani state nakopitelnoo counter you next 5 can be represented by the formula: (Ha-n) q (N1-N1-1) -Kd where H | -Hj - r -th code breakpoint approximating curve; Cd is the division factor of the divider clock 6; K y -Kfly.j is the division ratio of the controlled frequency divider 4 at the 1 st portion of the approximation. The state of the cumulative counter is fixed at the time of the coincidence of the code of the pulse counter 2 and the input code. At this moment, the code 1 detection unit generates a signal that prohibits the passage and the pulses to the input of the cumulative counter 5. At this the conversion cycle ends. The output code is removed from counter 5. If, in the described digital linearizer, a linearization section selection block 3 is connected to a frequency divider 6 (FIG. 2), which is designed as a controlled frequency divider, and when passing linearization sections, the division factors of the controlled frequency dividers change 4 and 6, the range of variation of the resultant division factor can be significantly extended. Nafig 3 shows a variant of digital linearization, which additionally contains a pulse generator 7 and a control pulse shaping unit 8. The device in this case works as follows. When a signal is received, the Start-up, the control pulse shaping unit 8 resets the cogging screw

counter-G), counter pulses 3, block for allocation of sections 2, controlled frequency divider 4, frequency divider 6. At the same time, pulse generator 7 is started. Thereafter, the conversion cycle continues similarly to that described above. It ends after the arrival of the signal from the I code coincidence detection unit to the control pulse forming unit 8. In this case, the generator 7 is turned off.

FIG. 4 is a digital linearizer variant for multichannel operation. In this case, a software block 7 is inserted into the device, which is connected to an allocation block for approximation areas 3.

The use of the proposed digital harmonizer compatible with its informational, metrological and other characteristics with standard digital electrical devices will improve the accuracy of linearization and conversion of the codes of nonlinear signal sources in measuring systems of various purposes while reducing cost.

Formula

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Claims (4)

1. Digital linearizer auth. sa No. 551802, characterized in that, in order to improve accuracy, an additional frequency divider is included in it, which is connected to the inputs of a controlled frequency divider and the first pulse counter. 2. The digital linearizer according to claim 1, characterized in that, in order to expand (the range of variation of the division factors, the additional frequency divider is designed as a controllable frequency divider, which is connected by its control inputs to the linearization sections. 3. Digital linearizer on PP. 1, 2, characterized in that, in order to expand its functionality, it is equipped with an impulse generator with a control pulse shaping unit connected to the outputs of a code comparison unit, and the output is connected to a frequency divider, pulse counters, a linearization selection block, controlled a frequency divider, a pulse generator, which is connected to the inputs of a controlled frequency divider and an additional frequency divider. 4.Digital linearizer on PP. 1-3, characterized in that, in order to ensure multi-channel operation, it is provided with a software unit connected to the allocation unit of the linearization section. Sources of information taken during the examination I. USSR Copyright Certificate No. 551802, H 03 K 13 / 2O, 1975. j y 1 lAA ill  vlc I Ul