SU648976A1 - Discrete null-indicator - Google Patents

Description

(54) DISCRETE ZERO ORGAN

I

The invention contributes to the field of automation and computer technology and can be used as a null organ in digital follow-up systems for automatic control of the speed of electric drives.

A discrete null organ is known, which contains a clock pulse generator, two synchronization blocks, two blocking circuits, two counters, a trigger, and a block that protects the null organ from phase reversal, consisting of triggers and a reverse counter II.

The disadvantage of this device is that the phase reversal protection scheme works according to the principle of correctness of alternation of overflow pulses of each of the two zero-body counters, which are fed to the addition and subtraction inputs of the HBHoifxD reverse of the counter of the protection node that generates a blocking signal in case of arrival two overflow pulses

specified inputs. Thus, the reliability of the device is not high, since a one-time phase reversal and loss of information about the number of pulses from one of the

its frequency equal to the capacity of the null organ.

The closest in technical solution to the present invention is a discrete null-organ containing a clock signal generator, synchronization blocks, counters, protection blocks, trigger 2j.

The block of protection of the specified device is constructed so that the settings for its operation are determined by the delay times of the Kip-relay. The latter are chosen based on the minimum and maximum allowable values of the relative phase shift between the higher bits of the null-yrgan counters. The disadvantage of the 8TH device is the lack of reliability associated with

the possible instability of time exposures

The purpose of the invention is to improve the reliability of the device. This goal is achieved by the fact that in the device the first and second outputs of the clock signal generator are connected to the inputs of the first and second synchronization blocks, whose information inputs are connected to the input buses of the device, and the outputs to the first inputs of the first and the second counters, the second, third and fourth inputs of each of which are connected respectively to the first, third and fourth outputs of the clock signal generator, the fourth output of the clock signal generator connected to the first inputs of the first and second protection blocks, the second inputs of which are connected to the outputs of the first and second counters, to the first and second inputs of the trigger, the outputs of the first and second protection blocks are connected respectively to the inputs of the second and first synchronization blocks, the trigger outputs serve the outputs of the device and are connected to the third and fourth inputs of the protection blocks

In addition, the protection unit is executed on the AND, OR elements and triggers, with the output of the first trigger connected to the inputs of the first and second AND elements, the other inputs of which are connected to the first input of the block and the outputs to the inputs of the Second trigger and the OR element whose output is connected to one of the inputs of the third trigger, the other input of which is connected to another input of the first trigger and serves as the second one. The block input is connected to the input of the first trigger, the third inputs of the first and second I elements are the third and fourth inputs of the block, and the output of the second trigger is the output of the block.

The functional diagram of the proposed discrete null-organ is shown in the drawing. The device contains a clock signal generator 1, synchronization blocks 2 a 3, counters 4 and 5, trigger 6, protection blocks 7 and 8. Clock pulse generator 1 has four outputs 9, 10, 11, 12 for four time-varying ones that do not coincide. groups of clock signals. Synchronization blocks 2, 3 consist of y sync 13 and AND 14

Counters 4, 5 consist of a two-input element OR 15, a frequency divider 16, trigger 17, and element 18. The units are sewn 7 and .8 contain triggers 19, 2О, 21, three BHODA elements AND 22 and 23, and element OR 24, The bins 25 and 26 are the inputs connected to the signal sources of the compared parameters, and the outputs 27, 28 are the outputs of the null organ.

The device works as follows. The purpose of a discrete null organ is to ensure that upon receipt of a sequence of pulses at inputs 25 and 26 at outputs 27 and 28, frequency signals of a rectangular shape occur, the fill factor of which is determined by the difference in the number of pulses received at inputs 25 and 26 the period of operation of the device. The inputs 25 and 26 are supplied with the frequency of the reference and the frequency of the pulse feedback sensor for speed, and from the differential voltage removed by the flngrum from outputs 27 and 28, its average value is proportional to the integral mismatch of the input frequencies and serving after preliminary

amplification for motor control npjtBona. The common counters 4.5 incorporate two frequency dividers 16 of the same capacity, which are continuously filled with signals from the clock generator. The overflow pulses of the deltelles 16 are recorded in the triggers 17 and transferred to the trigger 6 via the elements 18 and 18 using the pulses of the clock signal generator 1, after which the triggers 17 are reset. In the absence of signals at inputs 25 and 26, at the outputs of trigger 6, square-shaped signals occur, the frequency of which is determined by the frequency of the impulse clock signal generator I and co-clock44 and the division ratio of the dividers 16, and the duty cycle is .generacy in the numbers of pulses recorded in the dividers 16 to the filing of the clock. your frequency. So, with a difference equal to the value of the unit of the highest bit of dividers, the duty cycle is 2.

Claims (2)

1. USSR author's certificate No. 239666, cl. Q 06 F 7/00, 1969. 2.Avtorskoe Soviet Union Inscription .. NO 226304, cl. Q06 F 7/00, 1968.