SU622083A1 - Command shaping arrangement - Google Patents

Description

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The device relates to computing technology and can be used to scale up computing and control automated systems.

A device for generating and executing computer commands is known, comprising a command register for receiving the next command and further issuing its constituent parts to the corresponding devices, a unit for generating executive addresses, an operation signal generating unit, and descriptors associated with the command register auxiliary registers.

In addition to performing direct functions, the task of this device is to reduce the information redundancy of programs by using rational ways of coding program information in devices and rational building of units for generating executive signals of operations and executive addresses.

However, in such a device, the information capacity of control operations (starts, stops, locks, unlocks, software settings in the "About, status polls, etc.) PS can be increased without a significant change in the ycTpoiicTiiii scheme.

The closest to the technical solution to the invention is a device containing a command register, a command control block, the output of which serves as the main output of the device, an operation decoder connected to the output of the command register and the input of the command control block 2. In this device, the next command whose code number is generated on

instruction counter, is accepted into the instruction register. Further, in accordance with the obtained operation code, a certain region is excited at the output of the operation decoder, the signal from which is sent to the command control circuit. From the output of this circuit, the control signals are transmitted along individual physical circuits to the executive circuits. The modification scheme allows to form new commands on the basis of

accepted commands of the main program. The drawback of the device is that the modification provides different execution of the same command only when accessing the cells of the memory devices and does not provide "multiplication of signals at the output of the command control circuit (for example, signals generated during control operations in unaddressed commands). In this device, the set of such signals is unchanged and cannot be expanded without the introduction of new operations and a significant change in the design of the device. This complicates the expansion of existing systems, as well as the use of the device in developing new, more extensive systems.

The purpose of the invention is to expand the operational capabilities of the device and simplify it.

The goal is achieved by introducing a trigger, an integrating unit, a NOT element and two I elements into the device. A zero output of a trigger through an integrating block is connected to the input of an NOT element whose output is connected to the first input of the first And element, the second input of the first And element is the input clock of the device. The output of the first element I is connected to the zero input of the trigger, the single input of which is connected to the output of the command control unit and the first input of the second element I, and the single output to the second input of the second element I, the output of which serves as an additional output of the device.

A trigger with an AND element connected to its single output allows modifying the control signals generated by the same operation and then using these signals independently in different actuators. The integration unit, the element NOT, the element AND connected to the clock bus, regardless of the operations performed, provides a circuit off the modification mechanism.

The drawing shows a functional diagram of the proposed device.

It contains a register of 1 commands, a decoder of 2 operations, a command control block 3, a trigger 4, an integrate block 5, a HE element 6, a first 7 and a second 8 AND elements, an input of 9 clock pulses, a main 10 and an additional 11 device outputs.

The device works as follows.

In the initial position, the trigger 4 is in the zero state, in which the low (closing) potential takes place at its single output, and at the zero output - the zero (opening) potential. Accordingly, the AND 8 element is closed, the input potential of the HE 6 element from the output of block 5 is integrated and zero potential is maintained, and the output of the HE element 6 is low (closing) potential. Element And 7 is closed and does not transmit to its output clock pulses, which from input 9 are continuously received at its second input.

When a control operation command is received in register 1, which is multiplied in this device, a unitary signal is generated at the output of command control unit 3, which is fed to the main output 10 of the device. At the same time, this signal is fed to the input of the element 8 and to the single input of the trigger 4. However, due to the closed state of the element 8, the additional output 11 of the device does not pass this signal, but the trigger 4 is set to one. After switching trigger 4 to its

a single output sets zero potential and a low potential at zero output. In this case, the element And 8 opens, and the capacity of the integration unit 5, due to a non-zero voltage level on its

the inlet starts to charge.

If during the execution of this section of the program to generate an additional control operation is not required, then further to register 1 commands are received,

the operations of which do not excite a signal at the considered output of the command control block 3. At an interval equal to the constant time of the integration unit 5, a low level appears at its output.

the voltage that triggers the element NO 6, causing the element AND 7 to open. The first clock pulse, which passed through the open element And 7, returns the trigger 4 to the zero state, while the same values of the potentials at the inputs of the elements And 7 and 8 are set, i.e. the device goes to the initial position. If, however, when performing this section

In addition to the basic control operation, it is necessary to develop an additional program, then trigger 4 receives the command twice and, respectively, the command performs the command twice with the same operation. At the same time, the parameters of the integration block 5 are selected such that the unitary signal generated at the output 10 of the command control block 3, when the command is executed again, has time

confidently pass through the open element AND 8 into the additional output circuit 11 of the device. Further, register 1 receives other commands, respectively, trigger 4 returns to the initial state, as in the previous

considered case.

The main advantage of the proposed device is the possibility of modifying the output signals generated in control operations, and the simplicity of this modification. Such operations are specified in commands that perform some kind of unitary actions: starts, stops, blocking individual processes and the corresponding unlocking, wiring, and

disconnect devices, reset or zero. When developing a system of commands for such software control, a fixed number of operations is allocated, however, when building

specific systems there is a set of sookazyvayas how

Corresponding signals are usually insufficient.

Claims (2)

1. Zhuravlev Yu. P. System design of control computers. M., “Soviet Radio, 1974, p. 123-126. 2. Khetagurov Ya. A., Malishevsky V.V., Poturava O.S. Fundamentals of engineering design of UCWM. M., “Soviet is pleased, 1972, p. 207-211. W