SU1185343A1 - Device for generating interruption signals in case of debugging programs - Google Patents

Abstract

A DEVICE FOR FORMING INTERRUPT SIGNALS WHILE PROGRAMS STARTING, contains the first and second registers, the first and second comparison circuits, the first and second elements AND, and the address input of the device is connected to the nepBbWH inputs of the first and second comparison circuits, the information outputs of the first and second registers are connected respectively the second inputs of the first and second comparison circuits, the outputs of which are connected respectively to the first and second inputs of the first element And, the output of the first element And connected to the first input of the second element And, the output of which is the output of the interrupt of the device, characterized in that, in order to expand the field of application by ensuring the laying of computer programs that do not have outputs of transition signs, a third register is entered into the device, a multiplex: address lexor, counter, third comparison circuit , the recording multiplexer and the third element I, and the output of the third register is connected to the first information input of the address multiplexer, the output of which is connected to the information input of the counter, the address input of the device is connected to the control address multiplexer and the first input of the third comparison circuit; mode I input is connected to the address multiplexer and multiplexer control inputs (L record, the output of which is connected to the meter installation input; device initial setup input is connected to the record multiplexer input; And connected to the first input of the third element And, the output of which is connected to the counting input of the counter, the input of the device address gate strobe is connected to 4; the second inputs of the second and third elements And, the output of the third circuit with the comparison is connected to the third input of the second element And, the output of which is connected to the information input of the recording multiplexer.

Description

The invention relates to computing and can be used in laying programs of specialized digital computing systems (RVS) real-time.

The purpose of the invention is to expand the field of application of the device by forming, based on the analysis of changes in address information in the computer mainline, the sign of the implementation of transitions in the program,

The essence of the invention is. that the current address appearing in the mainline of a computer, having a single address space for connecting RAM, ROM, and external device registers, is analyzed for the belonging to its address area of ROM, which stores commands for the NCSA programs being debugged. If a command is read, the increment value of the current address is estimated. If the increment value is different from +1 or +2 (depending on the type of computer), which indicates a transition in the program, then an output signal is generated that causes an interrupt.

The drawing shows a block diagram of the device.

The diagram shows the first register 1 of the first .2 and the second 3 comparison schemes, the second register 4, the first element AND 5 the third register 6, the address multiplexer 7, the counter 8, the third comparison scheme 9, the recording signal multiplexer 10, the second element 11, the third element 12, device output 13, device address inputs 14, address gate input 15, setup input 16, mode setting input 17.

Consider the operation of the device in conjunction with the debugged SCARS, built on the basis of a computer of type Electronics-60

The remote inputs 14 of the device are connected to the backbone of the micro-computer, to which are also connected a permanent storage device (ROM) for storing instructions and a random access memory (RAM) for storing program operands (not shown in the drawing). RAM and ROM have different addresses in the single address space of the microcomputer trunk.

The operation of the device begins with the installation on registers 1 and 4 of the upper and lower boundaries of the memory area allocated for storing instructions, and on register 6, the starting address of the program being debugged. In the simplest case, registers 1, 4 and 6 are made in the form of toggle dials on the front panel of the device.

From the device input 17, the control inputs corresponding to the input of the start address from register 6 through multiplexer 7 to counter 8 are fed from the input 17 of the device to the direct inputs of multiplexers 7 and 10 under the control of a signal from the device input 16 through multiplexer 10 to the installation input of counter 8. signals to inputs 16 and 17 are provided from the front panel of the device.

After the starting program address is entered into the counter 8 by changing the control potential at the device input 17, the information inputs of the counter 8 are connected via multiplexer 7 to the device address inputs 14, and the setup input is connected to the output of the second element 11 through multiplexer 10.

After the program is started, when an address code appears at the inputs 14 of the device, accompanied by an address strobe at the input 15, it is analyzed whether it belongs to the address field of the ROM, i.e. it is determined whether the instruction or operand is being read.

The current address from the device inputs 14 is fed to the first inputs of the circuits 2 and 3 of the comparison. At the output of the comparison circuit 2 there is a positive potential, if the current address is less than the upper limit address set on register 1, and the output of the comparison circuit 3 is greater than the address of the lower limit fixed in register 4. At the output of circuit 5 there will be a positive potential, if the current address is in the zone of addresses bounded by registers 1 and 4, which corresponds to reading the command.

At the same time, the current address is compared with the contents of counter 8 In case these values are equal, the output of the comparison circuit 9 to the third input of the element 11 comes a inhibitory potential blocking the appearance of a signal at its output. At the same time, on the falling edge of the address strobe, from the device input 15, through the element 12, the signal enters the counting input of counter 8 and increases its content by +2 (for Electronics-60, if the current address does not match the first inputs of the comparison circuit 9 with the current restraint the counter 8 of the comparison circuit 9 generates a resolving potential. Thus, at all inputs of the terminal And 11 there will be resolving signals and at output 13 of the device connected to the computer interruption system, the output signal causing an interruption on the realized At the same time with the appearance of the signal at the output 13 of the device, the signal from the output of the element 11 through the multiplexer 10 is fed to the installation input of the counter 8, through which the new value corresponding to the value of the current address is added to the counter 8, which increases on the trailing edge of the address strobe by +2. After this, the value of counter 8 will correspond to the address of the next command. If the operand is read on the course of element 5, you will have the inhibitory potential, blocking elements 11 11 34 and 12, 8 ika not izmenits and the output signal 13 of Vits regardless of the signal at the output of the comparison circuit 9. The operation of the device requires that the address of the interrupt vector and the technological program of the interruption service are outside the range of the addresses of the ROM defined by the registers w 1 and 4. The proposed device ensures the interruption of the debugged program of the RHD when performing the transition. Thus, due to the principle of forming a sign of implementing a transition in a program different from that in a known device, namely, by analyzing changes in information in a computer backbone, the field of application of the proposed device is expanded. At the same time, it can be used for laying the programs of the SCAR on the basis of widely used microcomputer Electronics-60 with the trunk organization of the interface.

Claims (1)

DEVICE FOR FORMING INTERRUPTION SIGNALS WHEN DEVICEING THE PROGRAMS, containing the first and second registers, the first and second comparison circuits, the first and second elements AND, the address input of the device being connected to the first inputs of the first and second comparison circuits, the information outputs of the first and second registers are connected respectively to the second inputs of the first and second comparison circuits, the outputs of which are connected respectively to the first and second inputs of the first element And, the output of the first element And is connected to the first input of the second element And, the output of which is the interrupt output of the device, characterized in that, in order to expand the scope of application by providing computer programs that do not have transition indications from masonry, a third register, an address multiplexer, a counter, a third comparison circuit, a recording multiplexer are introduced into the device the third element And, and the output of the third register is connected to the first information input of the address multiplexer, the output of which is connected to the information input of the counter, the address input of the device is connected to the control input the address multiplexer and the first input of the third comparison circuit, the mode setting input is connected to the control inputs of the address multiplexer and a recording multiplexer, the output of which is connected to the counter installation input, the device initial setup input is connected to the recording multiplexer input, the output of the first AND element is connected to the first input of the third element And, the output of which is connected to the counting input of the counter, the input gate of the address of the device is connected to the second inputs of the second and third elements of And, the output of the third the comparison circuit is connected to the third input of the second element And, the output of which is connected to the information input of the recording multiplexer. 1 1185343 2