SU521564A1 - Binary code converter to binary code of degrees and minutes - Google Patents

Description

(54) BINARY CODE CONVERTER TO BINARY DECISION DEGREES CODE AND MINUTES

the control input of which is connected with the output of the first block of the OR elements, and the information outputs are connected to the next group of output buses, the second input of the second block of the AND elements is connected to the third

There is an input register and the output --no i is connected to the first input of the second block of OR elements, to the second input of which is connected the control output of the binary counter of the minute counter, the control input of which is connected to the output of the second block of OR elements, and informational outputs are connected to the second group of output buses.

The drawing shows a diagram of the described Converter.

It includes the pulse generator 1, the element And 2, the input register 3 with de;

encoder zero 4, binary counter / 5, decoder 6, two blocks of 7 elements AND, i two blocks of 8 elements OR, a binary-digital counter of degrees 9 and a binary-specific counter-minutes 10 Ked in the input; the register is written to the input busses AND, j The converted code is removed from the output I

tires 12 The output tires of the decoder 6 are distributed among the outputs 13-16, and the output attributes of the input register 3 are distributed among the outputs 1719,

The generator 1 continuously generates a sequence of pulses that does not pass through the AND 2 element while the input register 3 is in the zero state. After writing to the input register 3 of the code being converted, the decoder zero 4 outputs the resolution signal to the AND 2 element and the AND 2 element passes the pulse sequence to the input of the binary counter 5. The output of the binary counter 5 is connected to the decoder 6, the output buses of which provide the initial reset of the binary-decimal minute counter and the binary-decimal counter ika degrees, polling the logical elements Ws of blocks 7 and resetting the input register 3 and. binary counter 5, after code conversion. . . Table 1 shows the connection of the blocks of the 7 elements AND with the corresponding bits of the outputs 18 and 19 of the input register 3 and through the elements OR of the blocks of 8 elements with the corresponding bits of the binary-decimal counters. Degrees and minutes

Table 1

From Table 1 it can be seen that the cash in the unit in any of the bits of the input register 3 must be given a matching number of units in the output binary-decimal counter of degrees 9 and the daoic-tenth counter of minutes Yu, the census of the binary recorded in input register 3 the output binary-decimal counter of degrees 9 and the binary-decimal counter, minutes 10, is carried out with the help of ig.shulsov ;. : Withdrawable from the corresponding tin outputs 14 and 15 of the decoder 6, At the same time, to increase the speed, the second output slot of the moves 14 and 13 of the decoder 6 (the first output bus output 13 is connected to the installation inputs of the binary-descr-south count of degrees 9 and the binary-das 10 minutes of the gichpogo counter is connected to the first input of a number of elements of both the first and the second block of elements I, wiring 5; the main input to the outputs П, (П-2), (п-З), (П-8) of the output bits 13 and 18 of the input register 3 The remaining output tires are decrypted; Rutora 6 (except for the last (the last Juiraa exit - id-output is connected: USEO4IJbiM B: - .. Odal1 is a counting calculator of 5 and a third repgr.3), connect; 10) with the return to &from; the rest of the rest. i: -JivenTOD Ifi Blocks 7,

Such a construction of a ns polling scheme is the coincidence of the synchronization on the elements of the control unit corresponding to the corresponding D5opch; 1a dess & 4iJ} i; a degrees nln rviHHYT and the corresponding Fully output of the elecants And blocks 7 of the eldantoe,

Lp-glenost /: - full tact is chosen by G taking into account the correct correction of the T1fu; ;) 1U counter ,.

: correct ;, to: l, iioriv.iet: i .-, (provisional scheme: CHIEEetT i; or; p; i - ;; jJ.I.Isi.l d --1 well-desyptplion c4eT4jfi,:, -. zpach, ennll, ares (zl1: 1: -; u y

In tab, 2 lead: 19P work of the corrections CH1ru; oi e; i logical cxe ;; L and, for each tatrad

DOUBLE. -DESYA G1 CHI; GO.,. in csr -iO-e. in the counter, the number 6 or B was recorded, 6 and B is added to the non-calculated & (in our transducer only: a combo of tetrads of tens, degrees, and units of Mss-i, chickpeas), then a signal appears. After oHON aHfia convert the input--; code signal lia output after, dn, bus (output 16) decoder 6 zeroes | BED register 3 and binary counter 5, resulting in deshafra or zero 4 pc-Ia prohibit ka and the device will stop the race, I Accuracy conversion of the described device | Ea is priced at the cost of a bit of .BK. One code. Formula and 3 o 6 rete nn Converter of the DEONCH code to double “al-tis actual code of degrees and mkzt, the content of the avto-ten tllgYaYe counter min g,: dichichpo - ten tpchn (G counter of , pulse of impulses, cusped (ny with the first input of the EI and the% Agora whose input is i: -m ;; And chei;: r eyfritsru zero, khototo; ochg: g; ol with V.lo; i) m input p & kg: t; w., - ;; -;: -. ;;. who -, -.:, d ;; l.: ocheg1 K SHL1L -tiSH-aN ;. s, t g; ij h. a; /. i il С К Those that ,, L: tsells u.-elggieni; 6y1S -: {/ e, ae ;; stVSh n ls m: l :: y pi t; and :: „tk npfioGpac oBainu ;, oi do, 1 .. ,,, -.,: .-: ;;:; -,; | g, SOS / eRK :: G flb-i bloK, EL37LY1 TOV m.) ;;; ;,} a: l ;; :::: -, iT;. ::. ps-lfry-tg,; f g:. l sc: - gh :(, l, s, v;, v-, n ko;;,.,:;. vodev, go rv; .o, r; -, i, And agoia,, -, .; G -: i - --ir -rTi Y, -: -. K, .Cfin ::;, i; Hi: Ell BX5 Vb; IdId and Iodine keys to the left input of the second unit connected to the input inputs of the input register and the binary counter, the second alode of the first block of elements AND connected to the second output of the input register, and the output p6 dklk yen to the first input of the first block; emitter ITOB OR, to the second input of which is J (Key output, 5 - a minute counter, to the third input there is a latch switch, which controls the output of the binary-decimal degrees, the control input of which is connected to the plant of the first block p (orts, information outputs are ordinal; to the first group of buses, the second input of the second block of elements And is connected to the third output of the input register, and the output is connected to the first socket of the second block of OR elements, to the second input of which the control output of the binary-decimal minute counter is connected (the control input of which is connected to the output of the second block of OR elements, and: informational outputs are connected to the group of output buses. Sources of information taken into account in the examination: 1. MM Sukhomlinov. and others. Converters codes numbers. Technique, K ,,. 1965, p. 83-91. 2, Auth. St. USSR N 277406, cl. GO6 5 / O2, 1969.