SU419945A1 - - Google Patents

Description

(54) DEVICE FOR TRANSMITTING TELECOMMINATIONS

one

The device relates to a technique for converting electrical signals and can be used in adaptive telemetry systems.

Transient automatic buffer memory is known, consisting of parallel action registers connected in series.

Each register in such a storage device is equipped with a rewrite control cell, which provides automatic promotion of information between registers in a parallel code. Such a buffer memory device can be used in telemetry systems, in electronic computing devices, etc.

In these systems, it must ensure that the transmitter input of the telemetry system is matched with the output of the measurement system, and on a computer, it must coordinate between the output of the electronic computer and the input of recording equipment.

In the telemetry system at the transmitter output, the information must be represented in the form of a serial digital code, therefore the output register of the memory device converts the parallel code into a serial one. And this largely removes the storage capabilities, as the speed is low.

information transfer may result in buffer storage overflow.

The proposed device is intended

to increase the speed of information transfer.

The drawing shows the block diagram of the described device. It contains registers of 1 significant bits, characteristic word cells 2, rewriting control cells 3, combined into a buffer storage unit, control cell 4, shift register 5, switch 6, code converter 7, jammer 8 and output registers 9.

The significant bits of each register I of parallel action are connected in series. efficiently and desaturates parallel promotion of the number between registers.

Cells of feature 2 and rewrite control cells 3 are designed to provide automatic advancement of numbers between registers if subsequent registers are free and to stop advancing information when the next register is already filled, i.e. occupied with a different number.

The control cell 4 is designed to monitor the state of the output registers. It may represent a logical addition cell "OR. Its inputs are connected to the unit outputs of the word word cells 2 of all output registers, and the output is connected to the control inputs of shift register 5, switch 6 and converter 7. If the code “1” arrives at all inputs of control cell 4, all the output registers 9 are filled with information, then a control command is formed at its output.

The shift register 5 is designed to form a grid of read-out pulses, which ensure the removal of information from the output registers. It has as many outputs as there are bits in an unreadable word, i.e., in register 1 of the significant bits and in the cell of the sign of the word 2.

Each of its outputs is connected to the reading inputs of the same-named bits of all output registers 9.

Switch 6 is intended for switching the output registers 9 when successively advancing information between registers during the filling of output registers 9, as well as for switching them to the input of converter 7 when reading information from output registers 9 after they are stored.

Converter 7 is designated to convert a digital code into a quality code. Its inputs are connected to the outputs of the switch 6, and the outputs - with the inputs of the modulator 8.

The principle of its work can be seen on an example.

Assume that there are four output registers in the buffer storage unit. Then, in each cycle, a four-digit code is fed to the input of the converter 7 through the switch 6. In the converter 7, it is recoded, and the corresponding subcarriers of frequencies that modulate the carrier frequency fn are input to the modulator 8 input. In this way, instead of transmitting four times from the first to the first bit each word, groups of words, while re-encoding four-bit packages.

The output registers 9 are designed for sequential advancement of information, just like the main registers of the buffer storage device, as well as for simultaneous transmission of like bits of all output registers to the converters 7 via the switch 6 when reading information.

For this purpose, they have the same connections as the main ground registers and, in addition, additional read inputs paired between the same-named bits of all output registers 9, which are connected to the outputs of the shift register 5. Registers 9 are connected in series through the switch 6.

When fed to the input of a buffer storage unit, words consisting of significant

bits and its sign, fill the bits and cell in the input register. Cell 3 analyzes the state of its own and the next register. If its full, and the next is free, then it generates a readout signal, which does not write the given word into the next register. Words automatically move from input to storage. They fill all output registers. As soon as the output registers 9 are filled, the control cell 4 forms the control command.

This command enters the input of the converter 7 and prepares it and the modulator for operation; to the input of the switch 6 and disables the serial connection of the output registers 9 among themselves, and connects them to the outputs of the switch 6 connected to the input of the converter 7; PA input shift register 5 and runs it.

The clock pulses received at the input of the shift register 5 are sequentially fed to its outputs connected to the corresponding inputs of the bits of the output registers 9.

At the same time, through the switch 6, the input of the converter 7 receives signals of the value of the nerve bits of all the output registers 9, then the values of the second and so on.

These numbers enter the converter 7, which, in accordance with the received code, passes to the modulator 8 the corresponding subcarriers of frequency to modulate the carrier.

After transmitting the number, the read pulse from the output of the shift register 5 also enters the word word 2 cells. From this code, the word end sign is formed in the information received at the output.

After the information from the word 2 cells is written off, the control cell 4 removes the control command from the control inputs: transmitter 7, and the converter measures the mode of operation of the transmitter for radiation; switch 6, and the switch disconnects the outputs of the output registers 9 from the converter 7 and connects them to the inputs of successively located output registers; shift register and disable it.

Thus, the initial state of the output registers 9 will be reset.

Information from basic ground registers can re-fill output registers.

Subject invention

A device for transmitting telemetry, containing a modulator and a buffer storage unit, which consists of parallel action registers with significant bits and cells and a rewriting control, characterized in that, in order to increase the speed of information transmission, a code converter , the shift register, the switch and the control cell, and the outputs of the registers of the buffer storage unit through the switch are connected to each other and to the inputs of the converter, the outputs of which are connected to the inputs of ul of a torus; the read inputs of the same bits of the registers of the buffer storage unit are paralleled and connected to the corresponding outputs of the shift register, the inputs of the control cell are connected to the single outputs of the word word cells, and its output is connected to the control inputs of the shift register, switch and converter.