SU395995A1 - DEVICE TRANSMISSION TELEMETRIC INFORMATION - Google Patents

Description

one

The invention relates to a technique for transmitting discrete information and can be used in adaptive radio telemetry systems.

Telemetry information transmission devices are known that contain an analog-code converter, the output of which is connected directly to the buffer register and through a controlled switch to the inputs of the AND circuit, the output of which is NOT directly and via the cell, and the output of the circuit “is NOT connected to the read input of the buffer register, and to the reset inputs of the buffer register and the memory cell of the synchronizer keys.

Such devices have redundancy that reduces the noise immunity of the transmitted information and the efficiency of using communication channels.

The purpose of the invention is to increase the noise immunity of the transmitted information and the efficiency of use of communication channels.

This is achieved by the fact that the output of the buffer register is connected to the inputs of the adder directly and through the serially connected channel register and inverting unit. In addition, the output of the circuit "NOT, and the output of the adder is connected to one2" is connected to the read input of the channel register.

th input of the output register directly and to the second input - through a parallel-connected inverter and an additional circuit “I.

The drawing shows a functional diagram of the proposed device.

The device contains a buffer register /, converter 2 analog-code, adder, channel register 4, delay line 5, circuit "NOT 6, synchronizer 7, inverting unit 8, circuit" And 9, output register 10, inverter 11, circuit "And 12 , managed switch 13 and memory location 14.

The buffer register / parallel action consists of n bits and is intended for interim storage of the measured value of the parameter value. The input of the buffer register / is given a n-bit number from the converter 2 analog-code, and its output is connected to n-bit inputs of the adder 3 and the channel register 4. In addition, the buffer register 1 has a read input, which through the delay line 5 is connected to The output of the circuit is NOT 6, and the reset input, to which the pulses are received from synchronizer 7. A delay of delay 5 is necessary to temporarily unlock the input and output information in the channel register 4. The channel register also consists of n bits and is intended to store the last th quantized level which was transferred to a communication channel for registration priemnoregistriruyuschim kit, wherein n the discharge channel output register 4 through the inverting unit 8 is connected to the adder 3, and the input read circuit connected to the output "NO 6.

Inverting unit 5 has inverters (according to the number of bits of the number) and converts the parallel forward code into the reverse one. Adder 3 is designed to perform the operation of adding two numbers received at its input from the buffer register / in the forward code, and from the channel register 4 in the reverse. The difference in p circuits from the output of the adder 3 is fed to the input of the circuit “AND 9, and the sign output of the adder 3 is connected to one of the bits of the output register 10 directly, and to the second through the inverter //. In addition, the output of the AND 9 circuit is connected to the second bit of the output register. The output register can be enabled to the input of a transmitter, an autonomous recorder, or some intermediate storage of information.

At the instant of "N + 1 measurement, the analog value of the parameter being measured is fed to the input of the converter 2 analog-code, and the synchronizer 7 outputs to the memory cell J4 a read pulse.

From the memory cell 14, the code (“1 or“ O) is input to the prohibition input of the circuit “NOT 6, and the parameter value converted to the code from the output of the converter 2 to the input of the buffer register / (three randomly selected bits of this converter are connected to the input of the circuit “And J2). If one of the inputs receives the code "O, then the output of the circuit" And 12 forms the code "O, which is recorded in memory cell 14. The control command at the output of the circuit" NOT 6 is absent and the clock pulse from the synchronizer arrives at the reset input buffer register 1 returns it to its original state, i.e., all bits of the register are set to the zero state.

At the moment “N + 2 measurements” from the output of memory stack 14, to the input of the prohibition of the circuit “NOT 6”, the code “O and to all inputs of the circuit“ AND 12 code, “I (this happens when the measured parameter reaches one of the quantized levels ). The output of the < RTI ID = 0.0 > 12 < / RTI > circuit also has the code ' 1, which is written into memory location 14

In this case, the output of the "NOT 6" circuit generates a control command (code "1) that goes to the delay line 5 and to the read input of the channel register 4. The number from the channel register 4 through the inverting unit 8 in the reverse parallel code goes to one of them the inputs of the adder 3, and the delay in the delay line 5 control command — to the read input of the buffer register 1 after the end of the transient processes in the channel register 4. This number in the forward parallel code is written to the channel register 4 and to the input of the adder 3. Adder 3 you EMA an operation of adding two codes, their difference in the form of parallel reverse code input to circuit "AND 9 and mark characteristics

differences from the output of the sign bit in the form

code "O or" 1 - to the input of the first digit

output register 10 and through the inverter 11-

to the input of the second digit of the specified register.

The output of the circuit "AND 9 is connected to the input

the second bit of the output register 10. At the output of this circuit, a code is generated "O, if at least one of its inputs receives the code" O. Thus, in output register 10, codes "01," 10, "And can be recorded only if the measured parameter reaches a certain quantized level. If the value of the measured parameter at the time of measurement is somewhere between two quantized levels, the code "00." Is written in the output register 10.

At the moment “N-f.3 measurement from the output of memory cell 14 to the input of the prohibition of the circuit“ NOT 6, the code “1 is received, and from the output of the circuit“ AND 12

code “1. At the output of the circuit, the "O" code is not generated, and the number that is recorded in buffer register 1 in this measurement cycle is erased by a reset pulse. The output register 10 does not receive any information (code

“00).

Subject invention

A telemetry data transmission device containing an analog-code converter, the output of which is connected directly to the buffer register and through a controlled switch to the inputs of the AND circuit, the output of which is NOT directly and through the memory cell, and the output of the circuit "NOT - to the read input of the buffer register, and a synchronizer is connected to the reset inputs of the buffer register and the memory cell,

characterized in that, in order to increase the noise immunity of the transmitted information and the efficiency of using communication channels, the output of the buffer register is connected to the inputs of the adder directly and through serially connected channel register and inverting unit, in addition, the output of the circuit is connected to the read input of the channel register, and the output of the aggregator is connected to the input of the output register directly and to the second input - through a parallel-connected inverter and an additional “I.