SU1714662A1 - Display unit - Google Patents

Abstract

The invention relates to automation and computer technology and can be used to output analog information, and in particular short-term single processes, on a television indicator screen. The purpose of the invention is to improve the quality of Imaging by eliminating the flickering of an air flow by increasing the scanning frequency, which is achieved by introducing an inverter 3, a decoder 4, a group of elements OR 5, and the corresponding functional connections. The invention makes it possible to record information for each raster point separately in memory block 7 in accordance with the value of an analog signal at the device input, and to read information simultaneously for points. Due to this, you can increase the frequency of scanning. 3 il .'f ^, Ar :: ^ \ indiha / p ^ ^ u \

Description

The invention relates to automation and computer technology and can be used to output analog information, in particular short-term single processes, on a television display screen.

The purpose of the invention is to improve the image quality by eliminating flickering by increasing the scanning frequency.

FIG. 1 shows the page | ukturna diagram of the device; in fig. 2 is a block diagram of the control signal generator; in fig. 3 — memory block organization.

The device contains multiplexer 1, and n vertor 2, counters to 3, decoder 4. group of elements OR 5, driver 6 of control signals, block 7 of memory, elements 8 of memory. The driver control signal generator B contains elements OR 9 and 10, element 11, an analog-to-digital converter (not shown).

The device works as follows.

The display is carried out on a raster indicator with a dimension of 2 x 2 points (2 is the number of horizontal tracks in the track). The color and brightness of each dot of the raster is encoded by a K-bit binary code stored in memory elements 8. Information is read from memory block 7, consisting of N memory elements 8, in words of dimension NX K, where N 2, i.e. at the same time, the binary code of luminance and color is read for N raster points, which then from the device outputs goes to the information inputs of the indicator, where it is initially converted from parallel (for N points) to serial.

FIG. 3 shows an example of organizing a memory block 7 for displaying information on a screen with m p 8, q 2. In the recording mode of information in memory block 7, a driver 6 of control signals is connected by a Y2 signal to the output of multiplexer 1 via an inverter 2 and an analog-to-digital converter output (ADC) {n the lower bits of the multiplex output ((litter) and (mq) the higher bits of counter 3 (higher multiplex output bits) ;, counter 3 is zeroed.

When the data is ready, a reference code appears at the output of the ADC. After inversion on inverters 2, said code through multiplexer 1 is fed to the address input of memory elements 8. Inverting the reference code allows you to take on the horizontal axis of the graph the bottom of the screen, which is more convenient for perception. With the appearance of a pulse

at the gate output of the ADC, the driver of the control signals b generates a pulse at its third output (US), which serves as a recording resolution signal.

According to this signal, the code of luminance and color of the investigated signal is entered into the cell defined by the code and the reference number. Cell selection is performed as follows. Counter 3, the width of which is t, determines the number of the element of the raster row and the number of the column in the structure of the memory block 7 (Fig. 3). The line number of the raster is the number of the element in the column (Fig. 3), which is determined by the code at the output of the ADC. Junior q bits

5, the counter 3 determines the number of the element 8 in the memory block 7 — the outputs of the decoder 4 through the elements OR 5 are connected to the gating inputs (-CS) of the memory elements 8. Due to this record information about

The next sample of the analog signal is carried out only in one element 8 in the memory block 7. The recording control signal from the third output of the imager b is fed to the write enable inputs (WE) of all memory elements B.

By the cut of the signal at the gate output of the ADC, the value of the counter 3 is inserted. Due to this, the displayed signal is scanned along the horizontal axis and the Sample Codes are recorded in the memory block 7.

In the mode of reading information from memory block 7, in the process of displaying information, the driver 6 of control signals (signal y1) connects to the multiplexer output the highest (rn-q) bits from the output of the horizontal scan counter (the low bits of the outputs of multiplexer 1) and h bit dow counter vertical

0 sweep (high-order multiplexer 1 output). From the first output of the imaging unit 6, through the OR 5 elements, a single signal is fed to the gating inputs of all the 8 memory elements. Due to this, simultaneous reading of all N memory elements 8 at the address set at the output of multiplexer 1 will occur, i.e. A K-bit color and luminance code is read for N adjacent points of one line. raster.)

0 Since not all the outputs of the horizontal scan counter are used for addressing, but only (m – q) of its high-order bits, then for every clock cycle of the gap. fussing is the same word.

5 Thus, when displayed simultaneously, a word is supplied to the indicator containing the luminance and color codes of 2 consecutive image points. This makes it possible to increase the image scanning frequency by a factor of 2. In other words, the proposed device allows to write data in columns (bit by K 1), and read them in words in rows.

To erase, an Erase 1 signal is sent. At the same time, the UZ is "1". Recording is simultaneously allowed in all elements of memory 8. If a zero code is put on the bus of the luminance and color code, then in one cycle of forming the image frame, all the information stored in the graphic memory of block 7 will be erased.

Thus, the device retains high speed when recording information in the same way as devices for which q 1 This improves the display quality by increasing the scanning frequency or reduces the cost and power consumption of the device due to the possibility of using memory elements i at lower speeds same sweep frequency.

For a 512 x 512 pixel raster and a 500 cycle memory clock, the scan rate at 7 q will be 7.7 frames per second, which is not enough for high-quality display perception, but at q 2 - 30.8 frames / s, with q 3 - more than 60 frames / s.

Claims (1)

The invention of the device for displaying information containing a multi-decoder, counters) (the driver of the control signals, the memory block, the analog-digital converter, the information input of the second is the information input of the device, the first output of the analog-digital gear the former is connected to the clock input of the counter and the gate input of the driver of the control signals, the first output of which is connected to the first address the input of a multiplexer, the output of which is connected to the address input of a memory unit, whose information input is an input for controlling the brightness and color of the device image, the first and second information inputs of the multiplexer are device address inputs, the third information input of the multiplexer is connected to the first output of the counter, the second address input of the multiplexer is the second output of the driver of the matching signals, the third output of which is central with the memory control input, the outputs of which are information GOVERNMENTAL output device control yuts s The control signal generator inputs are the control inputs of the device, from and € 6 so that, in order to improve the image quality by eliminating flickering by increasing the scanning frequency, it contains inverters, a decoder, OR elements, and outputs which are connected to the gating inputs of the memory block, the first inputs of the OR elements are connected to the outputs of the decrypt, the rator, the information input of which is connected to the second output of the counter, the second inputs of the IL AND elements are connected to the first output of the control driver x signals, the fourth information input multiplexer - with the outputs of the inverters, the inputs of which are connected to the second output of an analog 11M | 11-converter. WBSwJWPwe Erasing " Record Ml U1  StroNishyu Wash Atsl OF 2