SU1702497A1 - Digital control device for regulated-power converter - Google Patents

Abstract

The invention relates to control devices for direct current energy converters at the input to direct current energy at the output and can be used for powering various electronic equipment. The purpose of the invention is to increase the reliability and quality of the output voltage. The binary 1 U counter counts the pulses of the master oscillator 1, and at the moment of comparing its output code with the code of the reversible counter 15 logical comparator 3 generates a pulse forming the trailing edge of the wide modulating pulse, the leading edge of which is formed at the moment of the zero state of the counter 2 The state of the reversible counter 15 changes in the process of stabilizing the output voltage of the converter. Enhance the dc current by changing the frequency of the impulses of the controlled oscillator 18, which makes it possible to optimize the transient processes of the output voltage. When the primary pitch is fed to the converter, pulses of a lower frequency are sent from the frequency divider to the clock input of the reversible counter 15, which ensures an optimal output to the converter mode. 1 il. YO VI Oh you about xi

Description

The invention relates to control devices for converters of direct current energy at the entrance to direct current energy at the output and can be used to power various electronic equipment.

The purpose of the invention is to increase the reliability and quality of the output voltage.

An electrical circuit is shown on the left (search for

The device contains the mastering switch 1, and in (the progress of the copier through the binary counter 2 .. is connected to the first inputs of the logical s .. "L- 3 (equalization of the codes (logic component, jropa) The output of the logic control through the first input first RS-flip-flop 1 and power amplifier 5 are designed to be connected to rectifier 6. filter I and output terminals 8. The first inputs of the first and second analog comparators 9 and 10 are designed to be connected to the output of the converter, the second inputs are connected to the corresponding extreme the pins of the voltage divider collected on the resisk 11-13 and connected to the output of the reference voltage 14 of the reference voltage. The outputs of the tarator 9 and 10 are connected to the control inputs of the reversible counter 15, the outputs of the coyur are connected to the second inputs of the comparator 3. The first input of the amplifier 16 is constant current is connected to the output terminals 8, the second s / o with the divider) voltage across the resistors 11-13 - output through the rectifier 17 and the control - pulse generator 18 - r input frequency de 19 and the second input I / I element 20, The first input of which is connected to the first output of the second RS trigger 21, the second input otorrhea connected to the output of the comparator 10, and the first - with the output of the unit 22 setting an initial state. The output of the frequency divider 19 is connected to the second input of the first logic element I 23, the first input of which is connected to the second output of trigger 21, and the outputs of the AND elements are connected to the inputs of the logic element OR 24, the output connected to the clock input of the reversible counter 15,

The device works as follows.

When applied to the primary power converter, the initial state setting unit 22 generates a signal that counters 2 and 15 nullify, i.e. at all their outputs, signals of logical zeroes are formed, and the trigger rep 21 is set to the state in which it opens the first logic element AND 23 with its output signals on the first input and locks the second logic

0

5 0 ъ 0 5 0 5

0

By the first input at the output of the source 14 of the reference voltage leads to the appearance of a high potential on the second comparators 9 and 10, while at their first inputs at the first moment of time the voltage is zero. On a compareto Q, Hn3t is formed. uropen signal ln nm output of the compa- rature of 10 high levels, signal h High signal level from the input of composer 10 enters the pho p SCHR-MW 15 at this mic ml or 1/1 ochchsh-, z-tla mode

Lz-due to the presence of a large signal of the size of the bandwidth of the donor 1czddy output days n.rrr h P. GOGL Konnpfn.jp and forward (io v. HiiHv jMbiri with D | ligel. Pressure on the 11/1 H on; сc / cm) Ital H of the forerunner t. -t is formed high in modulus of dropping. Hdi parameter which controls the guides of the vnpoF-t generator 18 pulses A symmetric multivibrator can be used as a controlled generator

multivibrayur with about, r; n. With an emitter capacitor. With a high output voltage, rectify the 17 frequency of the generator 18 pulses, but the frequency divider 19 divides it to the required value, with a coir, the output to the converter mode does not exceed the ACCEPTABLE 1 at the absence; or unregulated and overshooting

At the moment of installation of the counter 2 in the zero state nf5pa3v of the emergency mode PR1 1 JTC t, the RS flip-flop 4 is switched to the state at which the -th output cm opens the mode: m1G |, bridges. Switching the RS-flip-flop 4 to the initial state occurs at the moment t cp of the readout code of the recording) O1 o P reversible counter 15, with the counter code 2. Increasing the stake in the counter 15 lead to an increase in the time of the P codes of the circuits, 1 3 of it the length of the codes increases due to which the long duration of the latitude-mode 2, the pulse Htuo at the output RS of the trigger 2, respectively) increases the source voltage of the converter

As the output voltage decreases, the voltage at the output of the amplifier 1 bp to another current decreases and the period of the following pulses increases (emulator 18. At a nominal value of the converter, the voltage at the inputs of the voltage of the converter is equal to 16 south of it ых н ид н н равно is equal to zero and 1 quota or quantization period (. eout t following 1mp oscillator generator 17) t,) from the condition of the liver of stable work, the horse of rgop, 10-20 times according to generally accepted recommendations Btiiue cut-off frequency filter

When the output voltage reaches the output of the de / millimeter nal-zh-j1 on the res 1 o 1 1 11 ne kg-mpeg 1 re 10 inlet, the last nepeif. Is set, its output cm l accepts zero 1, ach / and - and switches trig i ep 2 in other gse

С L f Х (G, OOM For YBYYA E (6

Mot I 5 wa jnr 11, HI k VJ (. about p. j cdam, ccm u in the case of the gunner, and, iap ii of the first 1g generator, it isn’t possible l o / c p ntto with pt. ka 1e

A change in, daddy, mn apery 1, t, o shchennogo (.1 or load to change of BI. Single voltage1. Concert 1rz

Relie specified changed. c has a fi character that includes CHI e and Comprator 9 and) ar: -Thore 10 and Sr with its output signals and the addition of impuces u C4f to the pickup 15 and the subtraction due to its change v п с.: г and stabilization of one voltage of the converter is carried out

In case of a stepwise junction, voltage, or load, soybean tonnes - 15 times change from an increased time g,; with which gp scrub and gel perturbations of external parameters in the converter, the magnitude of dips and It is easy for you / one tension of knowledge / sword shazgs that the positive effect affects the quality of the output of the oyster, which is expected by the oyster (

GET AHEAD ABOUT STABILITY)

voltage and at the same time provide.

necessary stability

Claims (1)

Formula izobrbt ilch Digital device to control stabilized converters goder A driving master oscillator connected to the counting input of a binary counter, the outputs of which are connected to the first inputs of the coincidence circuit, the output of the coincidence circuit is connected to the first input of the RS flip-flop, while the output of the RS flip-flop is intended to communicate with the control inputs of the stabilized converter, The first inputs of the DC amplifier and the first rj and the first enalog comparators are the first ones, they are started for output from a hectare or: з кон то,,, the second pass of the connection with the co-link output of the “lt voltage, mountain and octopus couple allel reference voltage source TM-v, and outputs the first analog comparators R jporo LN compounds with the appropriate inputs of the gate reverse schetchikz. the outputs of which are connected to the automatic inputs of a govademi circuit, the steady output of the two-south counter is connected to the second input of the Trigger and the output bends a constant go-worm the rectifier is connected to the upstream input of a controlled pulse generator characterized by that I nocwi w reliability and of the quality of the HC r-.tenMfl, into the device, the first and second elements, the element OR the second RS trigger, the frequency divider and the initial state setup block, the first output connected to the binary and reverse input inputs the second output is connected to the pen, input ;, the second hS-TOHTiepa, the second input of which is connected to the output of the second analog comparator, and the outputs to the first B1 IM of the first and second elements AND whose inputs are connected through the OR element „The clock input of the reversible counter, output, d of the impulse generator of the HSLB HSV is connected via a frequency divider to the r input of the first element I and directly to the second input of the second element I.