SU1343404A1 - D.c.voltage stabilizer - Google Patents

Abstract

The invention relates to electrical engineering and may find application in stabilized sources of secondary power supply. The goal is to improve the dynamic parameters, as well as improve the sustainability margin. The error signal is fed to the inputs of the comparator 12, then converted by two elements AND-NOT 13 and 14, synchronized by the generator 15 clock pulses. The reverse counting unit 16, connected by a fault input to the output of the overvoltage protection unit 17, processes the signals from the NAND elements and transmits the information in a digital code to the digital-to-analog converter unit 18, which controls a control element consisting of transistors 3 and 4. 1 Il. W (L 00 4 WITH

Description

The invention relates to electrical engineering and may find application in stabilized sources of secondary power supply for radio and electrical devices.

The purpose of the Invention is to improve the dynamic parameters and increase the stability margin.

The drawing shows a functional DC voltage regulator circuit.

The device contains input pins 1 and 2, the second of which is a common bus, a regulating element consisting of transistors 3 and 4, output pins 5 and 6, a nonlinear output voltage divider consisting of a resistor 7 and a zener diode 8, a linear divider output voltage, consisting of resistors 9-11, comparator 12, two elements 2 AND-NOT 13 and 14, generator, 15 clock pulses, reversible counting unit 16, overvoltage protection unit 17, digital-to-analogue conversion unit 18, block 19 auxiliary voltage, the output capacitor 20. Output 1 is connected to the collectors of the transistors 3 and 4. The input terminal 2 (the total bus) is connected with the resistor 11., The anode of the zener diode 8, the output capacitor 20 and the output, pin 6.

The device works as follows.

Unstabilized DC voltage is applied to input pins 1 and 2 of the device. At the same time, the auxiliary voltages from the auxiliary voltage block 19 energize all the elements and blocks of the device. At the initial moment of time until the stabilizer reached the stabilization mode, the output voltages at the output terminals 5 and 6 are zero. When the auxiliary voltage is supplied to the generator 15 clock pulses, rectangular pulses with a frequency of 1-10 MHz begin to flow from it, which, through elements 2 AND 13 and 14, are applied either to the direct counting input or to the counting input of the reverse counting unit 16 Direction accounts depend on the signals at the outputs of the comparator 12. If the gf rom of the comparator 12 is logical 1 and at the inverse O, the clock 1n “1 pulses come from the generator 15 clock pulses through

element 2 AND-NOT 13 to the input of the direct account of the block 16 reverse account. If at the direct output of the comparator 12 is logical O, and at inverse 1, the clock pulses come from generator 15 through element 2 AND-NOT 14 to the input of the countdown of block 16 of the reverse account.

The digital code, the current value of which is continuously changing, from the output of the block 16 of the reverse account is fed to the input of the block 18 of the digital-analog conversion, where it is

is supplied at some constant voltage equivalent to a numeric code. This voltage, arriving at the base of the transistor 3, which is part of the regulating element, determines

the output voltage at the output of the outputs 5 and 6.

At the initial time after switching on the voltage at the outputs of the comparator 12, the voltage will be set

so that the clock pulses from the generator 15 will be fed to the input of the direct account of the block 16 of the reverse account and therefore the digital code from the output of the block 16 will increase with each clock cycle. An increase in the code will cause an increase in the output voltage at the output pins 5 and 6.

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Reaching a certain value determined by the output voltage divider and the reference voltage source, consisting of resistor 7 and zener diode 8, the output voltage will cause the comparator 12 to switch, resulting in a change in the counting direction in the reversal counting unit 16 and the output code of the unit 16 will begin to decrease . Decreasing the code will decrease the output voltage. Decreasing the output voltage will cause the comparator 12 to switch again and the whole cycle will repeat again.

The overvoltage protection unit 17 operates as follows.

When a voltage appears at its input, a certain set level will appear at its output equal to a logical unit, which will lead to a reset of the digital code at the output of the reversible counting unit 16, as well as resetting the output voltage.

Thus, the introduction of a new set of elements allows for

2-3 times to reduce the amplitude of the ripple of the output voltage of the stabilizer as compared with the known device, 3 times to reduce the duration of the transient process by improving the dynamic parameters of the device and increasing speed, and also significantly increase the stability margin of the proposed device. In addition, the proposed device has a higher reliability than the known.

Claims (1)

Invention Formula A DC voltage regulator containing a serial regulating element made on a composite transistor emitter connected to the output output, linear and nonlinear output voltage dividers connected between the output terminal and the common bus, the nonlinear one connected to the common bus stabilized output terminal, output capacitor characterized in that, in order to improve the dynamic parameters, as well as increase the stability margin. Compiled by O. Ovs Nnikov Editor P. Gereshi Tehred L.Serdyukova Proofreader M. Maksimishinets Order 4823/49 Circulation 863 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, unitary enterprise. Project, 4 A voltage comparator two elements 2 AND-NOT, a clock pulse generator, a reversal counting unit, an overvoltage protection unit, a digital-analog conversion unit, an auxiliary voltage block, and a inverter and non-inverting inputs of the comparator are connected to the outputs of the linear and nonlinear dividers of the output voltage, the outputs of the comparator voltage direct and inverse connected separately to the inputs, respectively, of the first and second elements 2 AND-NOT, the other inputs of which are connected to the output of the clock generators, the outputs of the first and second elements 2 are NOT connected to the forward and reverse inputs of the reverse account unit, respectively, and the reverse input of the reverse account unit is connected to the output of the overvoltage protection unit whose input is connected to the output output, the output of the digital code of the reverse counting unit is connected to the input of the digital to analogue conversion unit, the output of which is connected to the control input of the regulating element