SU1674096A1 - Discrete square wave signals system generator - Google Patents

Abstract

The invention relates to the field of automation and computer technology and can be used in spectral analysis and communication devices for generating orthogonal signals. The purpose of the invention is to expand the functionality by creating an additional system of orthogonal signals with a smaller effective width of the spectrum. The generator contains a clock generator 1, counter 2, shift registers 3, multipliers 4.1 - 4.6, limiters 5.1, 5.2 signal levels, additional multipliers 6. Forming an additional system of orthogonal signals with a smaller effective width of the spectrum is provided by introducing into the generator two signal level limiters and additional multipliers. 3 il.

Description

The invention relates to automation and computer engineering and can be used in spectral analysis and communication devices to generate orthogonal signals.

The purpose of the invention is the expansion of the functionality of the generator due to the formation of an additional system of signals with a smaller effective spectral width.

In FIG. 1 shows a block diagram of a generator; in FIG. 2 - its timing diagrams; in FIG. 3 - an additional system of orthogonal signals.

The generator contains a clock 1, counter 2, cyclic shift registers 3, multipliers 4.1 - 4.6, limiters

5.1 and 5.2 signal levels and multipliers 6.

The generator operates as follows.

At m senior bit outputs (gp +

1) -bit counter 2, a system of Rademacher signals is formed, represented by levels i 1. The formation of subsets of Haar signals from the corresponding. Rademacher signals are performed using shift registers 3 and associated multipliers 4.1 - 4.6. The width of the register 3 and the number of multipliers 4 in the subgroup are equal to the number of Haar signals in the subset (2 ¹ , where I is the number of the subset). In registers 3, a code of the form 100 ... 0 is cyclically shifted. the bits of which specify the intervals of existence of the corresponding Haar signals. A shift by one bit is caused by each change in the sign of the Rademacher signal at the shifting input of register 3. As a result of the multiplication of the Rademacher signals with existence intervals, the system of Haar signals is formed at the outputs of the multipliers 4.1 - 4.6. ,

An additional system of orthogonal signals is removed from the outputs of the additional multipliers 6, with each Haar signal X1 (\) corresponding to a pair of signals a / d 0), v / d $) from the additional system and a pair of additional multipliers 6. Timing diagrams in FIG. 2 illustrate the formation process. Using the example of signals X3 (0), Ar ^ h (0), Br * 0): a - clock signal; b - output of the (t + 1) th (least) discharge of counter 2; c, d - outputs of limiters 5.1 and 5.2 signal levels; d, e, g - generated signals.

Signals A and B are obtained by multiplying the Haar signal X with the output signals of the limiters 5 (Fig. 2c, d) on the corresponding pair of multipliers 6.

The complete a / h signal system is shown in FIG. 3. Compared to the Haar signal system, the additional system of orthogonal signals has a smaller effective spectrum width and increases the efficiency of using a given frequency range.

Claims (1)

Claim A generator of a discrete orthogonal signal system containing a clock connected to the counter input, (m - 1) cyclic 2-bit shift registers (2 ^t is the dimension of the signal system, I = 1, t-2 is the number of the cyclic shift register), (2 ^t -2) of multipliers, and the i-th bit output of the counter (numbering from the high-order side) is connected to the shift input of the I-th cyclic shift register, (i + 1) -th bit output of the counter is connected to the first inputs (2 '- 1 ) (2 ^{| +1} -2) multipliers, the second inputs of which are connected to the corresponding bit and outputs of the ith cyclic shift register, the first bit output of the counter and the outputs of all the multipliers are outputs of the Haar function system of the generator, characterized in that, in order to expand the generator’s functionality by forming an additional system of orthogonal signals with a smaller effective spectrum width, it contains two signal level limiters and (2 ^t - 1) pairs of additional multipliers, the first bit output of the counter connected to the first inputs of the first pair of additional multipliers, output One j-th (j = 1,2 ^Ж - 2) multiplier is connected to the first inputs of the 0 + 1) -th pair of additional multipliers, (* + 1) th digit output of the counter is connected to the inputs of the first and second signal level limiters, the outputs of which connected respectively to the second inputs of the first and second additional multipliers of each pair, the outputs of all pairs of additional multipliers are the outputs of the additional generator signal system. FROM ! θ) in? (e) l *: ’| (8) B'o ° (8) A? (9) (θ) FROM (Θ) In g (θ) A,' (θ) IN' (β) A (θ) (θ) A? '(θ) in"' (9) A (θ) VT (β)