SU866695A1 - Device for shaping multi-phase frank signal - Google Patents

Description

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The invention relates to radio engineering and can be used to generate noise-like signals that are used in multi-channel. communication systems, as probing signals in radar, as well as a test signal for monitoring the signal processing device.

A device for formating a multi-phase Frank signal is known, containing a controllable block of reference frequencies, whose outputs are connected to the signal inputs of n switching keys (P is the number of phase gradations), as well as three annular shift registers, a 3 n element of coincidence, a static trigger , divide the frequencies on the p and band-pass amplification.

The disadvantage of the known device

. is that the number of phase gradations n in each particular case is constant and cannot be changed. Thus, to build a device with

PERSONAL values - complexity; dimensions and weight increase in proportion to the number of values.

The purpose of the invention was to provide adjustment of the phase phase gradients while simultaneously simplifying the device.

The supplied circuit is achieved by the fact that the device contains a controlled O110px1DX frequency block, the outputs of which are connected to the signal inputs

10 P switching keys (n is the number of phase gradations), the outputs of which are combined and are the output of the device,. two serially connected binary pairs are entered; general counter with

15 variable recalculation coefficient P, the outputs of which are connected via a serially connected zetushf & multiplier modulo n and a code converter connected to control inputs n commits of switch keys, while the signal input of the first binary summing counter with variable conversion factor T is a clock input of the device , and control inputs adjustable /. Modulo p multipliers and binary summation counters with a variable / recalculation coefficient are combined and are the control input of the device. The drawing shows a structural electrical -. scheme of the proposed device. The device contains a controlled block of 1 reference frequencies, n switching keys 2, the first 3 and second 4 binary summing counters with a variable conversion factor, and an adjustable multiplier for the Y1 module, a code converter 6,. The device clock input 7, which controls the device 8, device output 9. The device operates as follows. The signal input of the first counter 3 comes from clock input 7 of square-wave pulses with a frequency of rotation. TORENA I O T - 0 DPS of the elementary signal of Frank's signal. At the outputs of the first counter 3 in series with a clock frequency {Q appears. a sequence of numbers of the natural number from O to n -1 in binary code. The second counter 4 works in a similar way, but with a frequency that is n times smaller. From the outputs of both counters 3 and 4, signals are fed to the input of multiplier 5 modulo n, where the two sequences multiply from the natural numbers from O to n -1. As a result, Frank outputs binary signals in the output of the multiplier 5. .. Code converter 6 is a output decoder ... which converts the Frank signal in binary code to a n-position code. The control signal is always present only at one of the outputs of the decoder. Thus, at each point in time is open only. one of u | the switching keys 2 in accordance with the code at the output of the multiplier 5; The signal inputs n of the switching keys 2 receive signals from the controlled reference frequency block with distinct phase shifts, and the output 9 produces a signal that has an increasing phase shift strict law, i.e. Frank's multiphase signal. Thus, the elements of the Frank signal are obtained sequentially as a product of absolute value and natural numbers from O to n -1 recorded in binary code, which come from the outputs of binary summing counters with a variable recalculation factor r. The technical and economic effect of the invention is the ability to control the number of phase gradations in a multi-phase Frank signal while simplifying the device. At the same time, the required frequency of the input frequency of the device is reduced by n times, which allows the use of less high-speed logic elements that have a much lower power consumption. of the invention. A device for generating a multi-phase Frank signal containing a controllable block of reference frequencies, the outputs of which are connected to the signal inputs of the n switching keys (h the number of phase gradations), the outputs of which are combined and represented by the output of the device, which is designed to ensure the adjustment of the number of phase gradations when simultaneous simplification of the device, two serially connected binary-summing counters with a variable conversion factor are introduced and whose outputs through the serially connected Adjustable modulo multiplier .g and code converter are connected to control inputs of n switching keys, while the signal input of the first binary summing counter with variable recalculation coefficient p is the clock input of the device, and the control inputs of the adjustable modulus multiplier and binary totalizers counters with a variable conversion factor n are combined and are the control input of the device. Sources of information taken into account in the examination of 1, USSR Author's Certificate No. 51O769, cl. 03 V. 7/00, 1973 (prototype).

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Claims (1)

Claim An apparatus for generating multiphase Frank signal comprising a controllable unit reference frequency, you _s0 passages which are connected to signal inputs η switching key (U phase number of gradations), the outputs of which are combined and are output devices, characterized in that, with the chain to ensure the adjustment of gradation phase while simplifying device introduced two series connected binary - counter summing variable scaling factor η, koto ⁴⁰ outputs ryh introduced through successively connecting The modulated adjustable multiplier and the code converter are connected to the control inputs η of the switching keys, while the signal '45 input of the first binary totalizing counter with a variable conversion factor is the device clock signal, and the control inputs of the adjustable multiplier modulo and 50 binary totalizing counters with variable conversion factor and combined and are the control input of the device.