SU1665387A1 - Device for calculation of interval correlation function - Google Patents

Abstract

The invention relates to measuring the characteristics of random processes and is intended to determine in real time the interval correlation function of current random processes. The aim of the invention is to simplify the device and improve accuracy. The device contains a pulse distributor 1, a generator of 3 clock pulses, counters 2, 6, registers 7, 9, shift, blocks 8 converting a direct code into an additional, delay elements 10, decoders 5, blocks of keys 4 accumulating accumulators 11. 1 sludge.

Description

The invention relates to computing, in particular to measuring the characteristics of random processes, and is intended to determine in real time the interval correlation function (ICF) of the current random processes.

The aim of the invention is to simplify the device and improve accuracy.

The drawing ’presents a structural diagram of the device.

The device comprises a pulse distributor 1, a group of counters 2, a generator 3 of clock pulses, a group of key blocks 4, a group of decoders 5, a counter 6, a shift register 7, a group of blocks 8 for converting a direct code to an additional one, a group of shift registers 9, a group of delay elements 10, a group of accumulative adders 11, inputs 12 and 13.

. The interval correlation function can be determined by the formula

Dry O) “tg Σ (1)

L where I is the ordinate number of the ICF;

N is the number of pulses of the second random pulse sequence oo

Yn = y (tn) = Σ yn <5 (t - tn) η = 1.

y _n is the amplitude of the random pulse; d- Dirac delta function;

L is the number of simultaneously processed pulses y-j-e, if Int О, if not —5 symbol

Kronecker

Δ is the forced sampling interval;

ti is the arrival time of the current pulse of the first sequence;

tj is the arrival time of the current impulse of the second sequence.

The device uses a modified algorithm for determining the ICF score.

plM (logpN) (2)

The device operates as follows.

Before starting work, the counters 2, the register 9 and the accumulating adders 11 are reset. Code 7 is entered in register 7

111 ... 1112 ^w η (for binary notation), and in the auxiliary counter 6 - code

111 ... 110 g = o, where η is the bit depth of the counter 6 and register 7. The first is fed to the input 12 of the device, and random sequences are fed to the input 13 — second input 5. The counting inputs of the counters 2 are supplied with clock pulses from the generator 3 with a forced sampling interval Δ. The pulse distributor 1 carries out 10 sequential ring (circulation) zeroing of the counters 2 according to the current pulses of the first sequence. These codes for the current j-th pulses of the second sequence through 15 blocks of keys 4 will go to the decoders 5, which produce signals at their specific output, the number of which corresponds to the input code. These signals are synchronizing for 20 corresponding accumulating adders 11, in which the IRF estimate of the corresponding ordinate is formed.

The code from the output of the forming unit 8 is supplied to the corresponding averaging 25 register 9 by the signals from the corresponding output of the decoders 5, and then to the accumulating adder 11 by the same signal through the delay element 10. The pulses of the second sequence are fed to the 30 counting input of counter 6. After the receipt of the first pulse in the counter 6, a code 111 ... 1111g is generated (for the binary system of calculus). After the second pulse arrives at the overflow output of counter 6 35, a signal is generated that allows code 6 to be read into this counter 6 from register 7, so code 111 ... 1102 is written to counter 6. At the same time, the same overflow signal of counter 6 to 40 enters the shift input register 7 and shifts its contents. Thus, a code 111 ... 100g is formed in it.

After the fourth pulse of the second sequence arrives, an overflow signal is generated again at the output of counter 6. At the same time, a code 111 ... 100 g is generated in it, and a code 111 ... 1000 g in register 6. Thus, counter 6 and register 7 logarithmize the number of pulses of the second sequence at base 2 (for the binary number system). The signals from the output of the overflow counter 6 are fed to the inputs of the shift registers 9 and shift their contents.

Thus, averaging is performed using exponential smoothing of the calculation results. At the outputs of the accumulating adders 11, the current values of the ICF estimates are generated.

With the arrival of the last pulse of the second sequence, the device ends its work.

The device averages the results without a complex division unit and systematic error, which simplifies the practical implementation of the device.

Claims (1)

Claim A device for calculating the interval correlation function, comprising a pulse distributor, a clock pulse generator, a group of key blocks, a group of decoders, a group of accumulative adders, the information input of the pulse distributor being the input of the job of the first random pulse sequence of the device, the control inputs of the key blocks of the group connected to the job input of the second random pulse sequence of the device, the outputs of the key blocks of the group are connected to the inputs of the corresponding group encoders, the outputs of the accumulating group adders are a group of device outputs, characterized in that, in order to improve accuracy and simplification, the device contains a group of counters, a counter, a shift register, a group of direct code to additional conversion blocks, a group of shift registers, a group of delay elements, moreover, the recording permission entries of the group shift registers are connected to the inputs of the corresponding elements of the group delay and through the OR5 circuit OR with the corresponding outputs of the group decoders, the outputs of the elements in group delays, they are connected to the sync inputs of the respective accumulating group adders, the outputs of the pulse distributor are connected to the zeroing inputs of the corresponding group counters, the counting inputs of which are connected to the output of the clock pulse generator, the outputs of the group counters are connected to the information inputs of the corresponding group key blocks, the counter overflow output is connected with the input enable recording the initial state of the counter, the shift inputs of the registers 20 of the shift group and the shift register, the output of which connected to the input of the job initial state of the counter, the counting input of which is connected to the job input of the second random pulse sequence 25 of the device, the outputs of the accumulating adders of the group are connected to the inputs of the blocks converting direct code into additional groups, the outputs of which are connected to the information inputs of registers 30 of the group shift, outputs which are connected to the information inputs of the corresponding accumulating adders of the group.