SU1663768A1 - Phase-locked loop frequency control device - Google Patents

Abstract

The invention relates to radio engineering and communication technology. The aim of the invention is to improve the noise immunity and the expansion of the capture band. The device contains a tunable generator 1, a phase shifter 2 at ϕ / 2, the first and second phase detectors 3 and 4, the first and second comparators 5 and 6, the switch 7 of the polarity of the signal, the reversible counter 8, the digital-analog converter 9, the adder 10, the delay line 11 , filter 12, EXCLUSIVE OR 13 pulse generator 14. The goal is achieved by digitally processing two quadrature signals obtained by converting in the first 5 and second 6 comparators. Moreover, the digital channel of the auto-tuning does not contain filters and ensures the entry into the synchronous mode of operation in the holding band of the device. 2 Il.

Description

The invention relates to radio engineering and can be used in communication and radar systems for measuring parameters of radio pulses.

The aim of the invention is to improve noise immunity and broaden the capture bandwidth.

Figure 1 shows the structural electrical circuit of the phase locked loop; Fig. 2 illustrates stress plots at various points of the device, illustrating the operation of the device.

The automatic frequency control device contains a tunable oscillator 1, a phase shifter 2 per l / 2, first and second phase detectors 3 and 4, first and second voltage comparators 5 and 6, a polarity switch 7, a reversible counter 8, a digital-analog converter 9, an adder 10 delay line 11, loop filter 12, an EXCLUSIVE element OR 13 and shaper 14 pulses.

The device works as follows.

When a signal appears at the input of the device, at the outputs of the first 3 and second 4 phase detectors, quadrature beating components appear with a frequency corresponding to the initial frequency detuning D «od - Sh0. where bs is the frequency of the input signal, b 0 is the oscillation frequency of the adjustable oscillator 1 at the initial control voltage at its output. The first 5 and second 6 voltage comparators from the output signals of the first 3 and second 4 phase detectors are the formulas shown in Fig. 2a, c, d (Fig. 2a corresponds to the output signal of the first comparator 5, Fig. 2b - the output signal of the second comparator 6 with bs od; fig 2g — output signal of the second comparator 6 with one) Former pulse 14 produces short pulses corresponding to the falling edge of the output signal of the first comparator 5. FIG. 26 shows these pulses passing through the line 11 delays. The output signal of the EXCLUSIVE OR 13 element at OD OD is shown in FIG. 2d, and at OD OD in FIG. 2e. From fig. 2b, d, e, it is observed that the code recorded in the reversible counter 8, and therefore, the output voltage of the converter 9, increases with one OD and the one and the same decreases.

The output voltage plots of the converter 9 are shown in Fig. 2g (at shc OD.} And 2h (at one).

Thus, when a signal appears at the input of the device, the output voltage

five

0

50

5 0 5 0 5 0

five

converter 9 increases (if one) or decreases (if one), as a result, the frequency of adjustable oscillator 1 changes in the direction of decreasing Dg,

By reducing the frequency detuning of the value corresponding to the capture band of the analog loop of the device, including the second phase detector 4, switch 7, loop filter 12, adder 10 and adjustable oscillator 1. a synchronic mode is established.

The presence of the first and second comparators 5 and 6 in quadrature channels allows digital processing in blocks 13,11,14 and 8, which leads to an increase in noise immunity and provides the possibility of synchronous operation in the device's hold band.

Claims (1)

Invention Formula A phase locked loop device containing a sequentially tunable oscillator, a phase shifter per l / 2, a first phase detector, the second input of which is the device input, and a first voltage comparator, the second input of which is connected to a common bus, and also connected in series to a second phase detector , the first input of which is connected to the output of the undergravable generator, and the second input is connected to the input of the device, and a switch of polarity of the signal, the control input of which is connected to the output of the first A comparator, a series-reversible counter, a digital-to-analog converter and an adder, and a delay line and loop filter, characterized in that, in order to improve noise immunity and increase the capture band, a second voltage comparator, the first input of which is connected to the output of the second phase detector, and the second input is connected to the common bus, and the EXCLUSIVE OR element, the second input of which is connected to the output of the first voltage comparator, and the output connected to the input of the counting direction of the reversible counter, a pulse shaper, whose input is connected to the output of the first voltage comparator, and the output is connected to the input of the delay line whose output is connected to the clock input of the reversible counter, and the output of the signal polarizer is connected to the input of the loop filter, the output which is connected to the second input of the adder, and the output of the adder is connected to the control input of the adjustable generator. about I I nih p ih p irirt 3 nfig .2