SU1651300A1 - Trigonometric pipeline converter - Google Patents

Abstract

The invention is intended for use as a functional converter that provides input of analog information in a computer with a conveyor or traditional organization, and can be used in instrument engineering, control, and information and measurement systems. The purpose of the invention is to increase the reliability and expand the scope by allowing the input signal to be represented in analog

Description

The invention relates to functional transducers providing the calculation of trigonometric functions from arguments presented in analog form and is intended for use in instrument engineering, control and information measuring systems.

The purpose of the invention is to increase the reliability and expand the range of application due to the possibility of representing the input signal in analog form.

The drawing shows a diagram of the Converter.

t The converter contains a counter, a decoder 2, a block of memory of a 4-stage constant, an algebraic adder 4, a register of memory 5, a digital-analog converter 6, a comparator 7, the first fuffer registers 8.1, 8.2, ..., 8. N pipeline, second buffer registers 9.1,9.2,.,., 9.N pipeline, D-flip-flops 10.1, 10.210.W

conveyor, first algebraic summers 11.1, 11.2, ..., 11.N of the pipeline, second algebraic adders 12.1, 12.2, ..., 12.N of the conveyor.

The Converter operates as follows.

The basis of the calculations of trigonometric functions using the figure-by-digit method is the execution of stages I and 2 of the transformation. Execution of this - step 1 consists in entering into D-triggers 10.1,10.2, ..., 10.N of the values determining the operation mode - addition / subtraction - adders 11.1, 11 .2, ..., 11 .N and 12.1 , 12.2, ..., 12.N at the second stage. The calculation of fi is performed according to the following equations:

9; and 9, - fjarctg

 - sign6 ;,

where i О, 1,2, ..., n-l.

These equations are basic to the Volder algorithm, according to which the converter operates. In the device, they are implemented in the following equivalent form.

i

-one

9l4. q -Zt; arctg 2 "

i 0

where Cj is the argument presented in

analogue form and input to the comparator 7.

The signal at the output of comparator 7 determines whether the next value of the reference constant stored in memory block 3 of the reference constant is added to or subtracted from the sum accumulated in register 5. Thus, the implementation of step 1 of the Volder algorithm is implemented in the device based on the usual accumulating adder, all values of the current sums generated in it are compared by the comparator 7 with the analog input signal and the results of the comparison are recorded in the D-triggers 10 for subsequent use of the trigonometric calculation functions.

Phase 2 in the converter is performed according to a conveyor scheme that does not require synchronization signals, since the values Ј, defining the addition / subtraction mode in the adders 11 and 12 of the conveyor are already formed in step 1 in the D-triggers 10. The start of the stage 2 is effected by signal K, D.2. In the pipeline, hardware implementation of the following recurrent transformations is implemented:

y; + y; -; 2 x ;;

f: 2;

yoy:

O, x - 1 / K, K J P (

™:

).

As a result of the operation of the conveyor on the accumulator 1.N, the value xn costf is formed, and on the adder 12.N the value yn sinU) is formed.

Multiplication by i. a shift by a variable number of bits is performed in the device using a hard cross-coupling system when connecting adders and registers. In this connection, at the registers, the input is FIP in the conveyor, and two outputs appear - one output provides a connection to the same bits of the input of the adder, and the second output provides a mounting shift of bits.

Claims (1)

Invention Formula A trigonometric pipeline converter containing a memory block of a reference constant, an algebraic adder, N (where N 1,2 ...) are conveyor's russians, each of which includes the first and second buffer registers and the first and second algebraic adders. the output of the first buffer register is connected to the first input of the first algebraic adder, and the second output is connected to the first input of the second algebraic adder, the second input of which is connected to the first output of the second buffer register, the second output to torogo connected to the second input of the first algebraic adder, the outputs of the first and second algebraic adders are respectively first and second outputs corresponding tiers of the conveyor, inputs of the first and second buffer registers  . ten 15 20 3006 respectively, the first and second inputs of the corresponding conveyor russia, the POWDER of the memory block of the reference constant are connected to the first input of the algebraic adder, characterized in that, in order to increase reliability and expand the scope by providing the input signal in analog form, it has a counter, a memory register, a digital-to-analog converter, a de-encoder, a comparator, and a D-flip-flop is entered in each Rus of the conveyor; its forward and inverse outputs are connected to the inputs of operating mode, respectively, of the first and second algebraic adders, the clock inputs of D-flip-flops are connected to the corresponding outputs of the decoder, the input of which is connected to the output of the counter and the address input of the memory unit of the reference constant, the counting input of the counter is connected to the input of the synchronizing clock of the converter and connected to the input of the register of memory, the output of which is connected to the second input of the algebraic adder, the output of which is connected to the information input of the register of memory and through the digital channel The gov converter is connected to the first input of the comparator, the second input of which is the information input of the converter, and the output of the comparator is connected to the information inputs of the D-flip-flops and to the control input of the algebraic adder operation mode, the inputs of the initial installation of the counter and the memory register are connected to the first initial bus the transducer settings, the initial installation inputs of all buffer registers of the conveyor are combined and connected to the second bus of the initial installation of the converter. 25 thirty 35 40