SU1615769A1 - Device for receiving data - Google Patents

Abstract

The invention relates to telemechanics and computing and can be used to receive information. The purpose of the invention is to increase credibility. The device contains a receiver 1, a selector code feature 2, a shaper 3 serial reference code, block 4 comparison, the selector 5 error signal, performed on the D-flip-flop and a diode. The sequencer reference generator consists of a counter 6, a decoder 7, and an EXCLUSIVE OR 8 element. Wo allows the verification of received binary information in a sequential code for each received bit. 1 hp f-ly, 1 ill.

Description

The invention relates to telemechanics: none and can be used to receive information transmitted in binary code.

The purpose of the invention is to increase the d

on the fidelity of the device. In the drawing, a full diagram of the information.

The device depicts a function device for reception that contains a receiver 1, a code indicator selector 2, a sequential reference code generator 3, a comparison unit 4, an error signal selector 5, and this generator 15 rows of decoder 7 from 1 to η using a binary code.

Switching of the decoder 7 is carried out with a code frequency supplied to the clock (counting) input of the counter on the second clock input of the device. The formation of a serial code is carried out by connecting certain outputs of the decoder 7 to the common bus in accordance with the selected form of the code. The generated code from the outputs of the decoder 7 is fed to the second input of the EXCLUSIVE OR 8 element, which is used for the control sequential code and consists of a counter 6, decoder 7 and the EXCLUSIVE OR 8 element.

The device operates as follows.

Binary information in the form of code words (each of which consists of a code (information) characteristic · п ”or О and an η-bit verification code is sequentially supplied to the device information input. To write information signs of the code words, clock pulses are received at the first synchronizing input of the device frequencies synchronized with respect to informational features of codewords.

To generate a test polarity of the reference code by a signal of a code attribute, I act. on its first input from the first output of the selector 2 code attribute. At the output of the sequential reference code generator, a reference verification code is generated, the polarity of which depends on the code characteristic adopted in this cycle. The accepted and reference verification codes are received at the first and second inputs of the comparison unit 4, where they are bitwise compared. The signal from the output of the comparison unit 4 is fed to the information input of the ^ 0 ^ -trigger of the error signal selector 5 of the reference code 20 and comparing it with the received verification code, pulses with a code frequency synchronized with respect to the clock frequency * are received at the second clock input.

ki. The selector 5 of the error signal um from the D-flip-flop and a diode, the second synchronizing input, the new signal is fed to the installation input of the D-flip-flop and sets the trigger to a single state. The trigger input receives a signal from the output of the comparison unit 4. To trigger trigger input

The codeword is received by the receiver 1, which is an amplifier-limiter of pulses, and is fed to bxo / j selector '2 code sign and to the input of block 4 comparison. Depending on the code sign, the corresponding signal is generated at the output of the code sign selector 2, which controls the generator 3 of the sequential reference code, the output of which forms the n-bit reference verification code.

During the passage of the code sign, the clock signal from the first synchronizing input of the device is supplied to the installation input of the counter 6? And sets it to its original state. The functions of counter 6 include control of switching the output, a sequence of pulses of code frequency is received from the second synchronizing input of the device.

In case of coincidence of the digits of the received and the reference codes, a signal of a logical unit is received at the information input of the trigger, confirming the initial state of the trigger at the moment of arrival of the gating pulse. If one of the digits of the received and the reference codes does not match, the logic input receives a logic zero signal and with the arrival of the gate gate along the second synchro input, the trigger changes its state to the opposite, signaling a failure in receiving information. Turning on the diode between the information input of the trigger and its direct output makes it impossible to record a logical unit signal into it after a logical zero signal appears on its output until a signal arrives at its installation input at the first sync input of the device.

In case of mismatch of one of the bits of the received and reference codes, a logic zero signal is generated at the output of the error signal selector 5, j signaling about itself in the received information for each bit. In case of coincidence of all bits of the received and reference codes at the output of the selector 5, the error signal saves -; a signal of a logical unit signaling the correctness of the reception of information.

Claims (2)

Formula 2 1. A device for receiving information containing a receiver, the input of which is the information input of the device, the output of the receiver is connected 2 to the information input of the code sign selector, a comparison unit, characterized in that, in order to increase the reliability, an error signal selector is inserted into it, j D-flip-flop, between the information input and the direct output of which a diode is connected with its anode and cathode, respectively, is a shaper of the reference serial. ' · Code, the output of the selector of the code sign is connected to the first control input of the shaper of the reference serial code and is the information output of the device, the second l control input of the shaper of the reference serial code is combined with the clock input of the selector of the code 5 signs, with the installation input of the D-trigger of the error signal selector,! and is the first synchronizing input of the device, the output of the receiver is connected to the first input of the comparison unit, the output of which is connected to the information input of the D-trigger of the error signal selector, the inverse output of which is the control output of the device, the output of the generator of the reference serial code is connected to the second input of the comparison unit , the information input of the shaper of the reference serial code is combined with the clock input Yu of the D-flip-flop of the error signal selector and is the second clock input Odom device. r ·· „ 2, The device according to claim 1, with regard to the fact that the shaper of the reference serial code contains a counter, a decryptor: an EXCLUSIVE OR element, the first input of an EXCLUSIVE OR element, a setting [0 input counter, clock input of the counter and the output of the element EXCLUSIVE OR are respectively the first, second control, information inputs and the output of the shaper 'of the reference serial code, the outputs of the counter are connected to the corresponding inputs of the decoder, the corresponding outputs of which are combined and connected An exception to the second input <item _n or aspirants. ‘Compiled by V. Strukov