SU1583863A1 - Apparatus for classifying random signals - Google Patents

Abstract

The invention relates to the field of radio measurements and can be used in radio engineering, medicine and seismology. The aim of the invention is to increase the reliability of the classification by increasing the noise immunity of the device. An introduction to the device of an integrator controlled by a clipped voltage and a comparator with an adjustable comparison threshold eliminates the influence on the operation of the device of noise and interference, the amplitude of which is less than the comparison threshold. The use of a ROM, in which the types of classifying signals are recorded in the memory cells, eliminates the time spent on comparison with the standards and increases the speed of the device. 2 hp ff, 4 ill.

Description

The invention relates to radio, and can be used z1 radio engineering, medicine and seismology.

The purpose of the invention is to increase the reliability of classification by increasing the noise immunity of the device.

Fig with 1 shows the structural aspect of the proposed device; on .2 - block diagram of the 4i counting block (ikov, decisive block, control unit to the indicator; Fig. 3 - time charts explaining the operation of the device; Fig. 4 - time charts explaining the operation of the block counters, decision block and control block.

A device for classifying random signals contains a center unit 1, a subscriber 2, a diffraction block 3, an integrator 4, a cell block 5, a comparator 6, a setpoint generator

7 thresholds, block 8 counters, decision block 9, control block 10, processing channel II, indicator 12, counter 13, read-only memory (ROM) 14, memory element 15; a decoder 16, a timer 17, a pulse decay scheme 18, a delay element 19, a one-shot 20 and a trigger 21,

The device works as follows.

The random signal arriving at the device input is centered in the centering unit 1 and amplified by amplifier 2. From the output of amplifier 2, the voltage goes to the inputs of differentiation unit 3.1, integrator 4.1 and clipping unit 5.1. Fig. 3a shows a random signal at the output of amplifier 2, limited in time to an analysis interval of 0-1; a clipping block 5.1 turns this signal into a rectangular two-pole pulse

00

with

00

00

These are shown in Lig.36. They are fed to the control input of the integrator 4.1, which at positive pulses accumulates the input signal, and at negative pulses it is zeroed. The voltage at the integrator output is depicted in FIG. It also shows the threshold level, which is fed to the second input of the comparator 6.1 and set by the threshold adjuster 7.1. The voltage from the output of the integrator and the voltage of the threshold are compared with a comparator 6.1. When the output voltage exceeds the threshold voltage of the integrator, the comparator generates a pulse shown in Fig. 3. In cases where the integrator output voltage is less than the threshold voltage, a low level is present at the output of the comparator. In this way, minimally in-active choices of the random signal are eliminated and the influence of interference is reduced.

From the comparator output, pulses are fed to the input of the counter 13.1. block 8. The signal amplified by amplifier 2 is also fed to the input of the DILAENATION block 3.1, where the extremes of the random signal turn into zeros of the derivative of this signal. After that, using operations similar to those described for the first channel, the pulses from the output of each comparator are fed to the input of the corresponding counter of the block of detectors 8. At the end of the fixed analysis time, the accumulated accumulators in the block of counters inform on the number of pulses from the outputs of the comparators of all channels into the decision block 9, in which a decision is made on whether the signal belongs to one of the classes. The choice of the required number of processing channels depends on the required accuracy of the passLICIATION and the type of random signal. For most practical applications, two or three processing channels are sufficient.

The selection of the threshold with which the output voltage of the integrator is compared is conducted so as to ensure the minimum probability of classification error. The threshold must be selected above the average amplitude level of the direction at the integrator output, created by interference. To achieve this, before starting work, the threshold level must be set. For

This signal is input to the device, consisting only of interference. A porosity level is set with some (5-10%) exceeding the trigger level. For example, in seismology, the threshold must be set in a normal tectonic situation, with medical measurements on signals from normally functioning bodies or other human organs, in radio engineering with the antenna turned off (the effect of internal noise of the receiver is taken into account).

In block 8 of counters, decision block 9 and block 10 of control, the following processes occur during one cycle of operation. Before the beginning of the next cycle of operation (in the time interval t, - t in Lig.4), the elements and blocks of the device are in the following state: the delay element 19 processes the delays of the pulse that arrived at its input during the previous cycle of operation (moment to Fig. 4), and at its output a low voltage level (Fig. 4a). The trigger 21 is in the zero state, at its direct output there is a low voltage level (Lig.46), and at its inverse output it is a high level (Fig. 4c. At the output of the timer 17, the voltage level is low (Fig.4g); counters 13.1 - 13.N - in the zero state (shaded area in fig, 4e), since the inputs of the Reset of the indicated counters receive a high voltage level from the inverse output of the trigger 21, the output level of the pulse dropping circuit 17 is low (Fig. .4g), in memory element 15, the result of the previous work cycle (Fig. 4g) is stored, which is obrazhaets indicator 12.

At the end of the delay time (interval t0 - t, Lig, 4), a high voltage level appears at the output of delay element 18 (moment t, fig 4a), which sets trigger 21 to one state. At the direct output of the trigger 21, a high voltage level is set (FIG. 46), which starts the timer 17, at the inverse output of the trigger 21 a low voltage level is established (FIG. 4c), i.e. Signal Reset from counters 13.1 - 13.N is removed and they conduct pulses from the outputs of channels 11.1 - 13.N (

t., Lig.ad). Timer 17 generates high voltage pulses (time interval, 4g), length

which is shorter than the analysis time by the amount of transients of switching on and off of the counters 13.1.- 13.N

impulse output at timer output 16)

After the pulse decays from the output of timer 17 (instant ts, Lig.4d), the pulse decoupling circuit 18 generates a high voltage pulse (Fig. 4g), using which Lronth records the output code of the ROM 14 (i.e. stored in its cell with the address equal to the output code of the counters 13.1-13N at this moment, to the memory element 15 (the moment tt on Lig.4.z); the trigger is set to the zero state (the moment t, fig .46, c); this pulse also enters delay element 19. A high voltage level from the inverse output of trigger 21 (Lig.46) is set to left state counters 13.1 - 13.N (moment t, fig-4d). At the end of a high level pulse, the voltage at the output of the pulse decay circuit 18 (moment tj, Aig.4g) ends and the device goes to the initial state The minimum duration of this pulse is determined by the transient time in the device.

When the device power is turned on, the first cycle of operation starts from Lrota of the high voltage output pulse from the output of the one-shot 20, the input of the power supply connected to the bus, which sets the trigger 21 to one state, the ROM 14 together with the counters 13.1 - 13.N works as follows in a way. A priori, the maximum number of pulses at the output of processing channels for the classified signals is determined, and the necessary counter width is determined from them. The required number of counters of the counters is 13.1 - 13.N, respectively

n, is

p4, ... front ,. Address entry ROM 14

-n bits

They are arranged as follows. Signals belonging to the same class have a variation of parameters,

25

with

YU

15 20

-

838636

determined by law is distributed) 11, and in particular by its dispersion. Therefore, with different implementations of signals of the same class, the number of pulses at the outputs of counters 13.1 - 13.N is different. Let, for the j-ro class of signals, the number of code variants at the outputs of the counters be b:, b;

thirty

35

40

45

u m j

..., b-n. The number of FCU cells allocated for this j-ro class of signals, wwN

pressure z n (n b. Bit size

 J

cells are determined by the number of classes, if we denote it by M, then the cell width is the nearest larger integer from log2M.

The proposed device differs from the known higher accuracy of classification of random signals, which is achieved by increasing the noise immunity. Turning on . an integrator controlled by clipping voltage and a comparator with an adjustable comparison threshold, eliminates the influence of noise and interference on the device, the amplitude of which is less than the comparison threshold. In this case, the number of pulses at the output of the processing channel corresponds to the number of not all zero values of the nth derivative of this random signal, but only those which, after integration, exceed the threshold value, i

In addition, the use of a ROM, in which the types of classified signals are recorded in the memory cells, and the addresses of these cells are the codes for the number of pulses corresponding to these types, which allows not to spend time on comparison with the standards, i.e. get the result of the classification faster than it does in a known device.

Claims (1)

Invention Formula I. A device for classifying random signals containing a centering unit, an N processing channel amplifier, each of which contains a clipping unit, N-1 serially connected digirization units, a counter unit with N inputs and N outputs, a decision unit, a control unit, an indicator the input of the centering unit is connected to the input bus, the output is connected to the input usi f1 OS OS 1L