SU1569979A1 - Subtracting counting device with controllable scaling ratio - Google Patents

Abstract

The invention relates to a pulse technique, in particular to devices for counting clock pulses and generating output pulses with a predetermined frequency and delay in measuring equipment and automatic control and monitoring systems. The aim of the invention is to increase functional reliability. The goal is achieved by introducing a digital comparator and element I into a subtractor containing a decoder, a multiplexer, a subtracting counter, an additional subtracting counter, and when the output code of the subtracting counter exceeds the allowable value, the device returns to the original code sequence. 1 il.

Description

The invention relates to a pulse technique, in particular to devices for counting clock pulses and generating output pulses with a predetermined frequency and delay in measuring equipment and automatic control and monitoring systems.

The aim of the invention is to increase the functional reliability of the device.

The drawing shows a structural diagram of the proposed device.

A subtractive counting device with a controlled conversion factor contains decoder 1, multiplexer 2, subtractive counter 3, additional subtractive counter 4, the counting input of the subtractive counter 3 are connected to the counting input 5 of the device, and the information inputs of the subtractive counter 3 connect to the corresponding inputs 6 setting the conversion factor of the device, the counting input and the write enable input of the parallel code of the additional subtractive counter 4 are connected respectively to the counter input of the subtractive counter 3 and the multiplexer 2, whose address inputs are the time delay setting inputs 7, the information / inputs of the multiplexer 2 are connected to the corresponding outputs of the decoder 1, whose inputs are connected respectively to the outputs of the reading counter 3, the information inputs of which are connected to the corresponding information inputs of the additional reading reading 4, the group of outputs of the subtractive counter 3 is connected to the first group of inputs of the digital comparator 8, the second group of inputs of which is connected to the inputs back no factor perescheSP

about Stock 1

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This device, and the inverse output of the More comparator 8 and the inverse output of the subtractive counter 3 are connected to the inputs of the And 9 element, the output of which is connected to the inverting input of the write resolution of the parallel subtractive counter code 3.

The device works as follows.

If the code in subtractive counter 3 does not exceed the code on inputs 6, the device operates in the required mode. At the same time, inputs 6 are fed with a code defining the unit's recalculation module, and inputs 7 - a code defining the time shift. The counter 3 under the influence of pulses arriving at the input 5 of the device operates in the subtraction mode and the code at its output decreases. When the zero code is reached, the appearance of the input pulse causes the recording permission signal to appear at its output of the loan and the counter K is written to the counter 3. from inputs 6. Thus, at the outputs of counter 3, a sequence of codes is formed with a period T K + 1 / fex, where fex is the frequency of the input signal. Counter 4 also operates in the subtraction mode, and the K code is written to it at the moment when the write enable signal appears at the output of the decoder 1 corresponding to the included input of the multiplexer 2. Thus, the code at the outputs of counters 3 and 4 changes synchronously from K to zero, and at the output of counter 4, the changes are also shifted in time by Te () / fx where M is the code at inputs 7. If you turn it on or because malfunction (for example, due to interference), the counter 3 fails and the stroke in it becomes greater than the code on the inputs 6, the comparator 8 is triggered and with a 3 it is set to permissible

code state. Thus, the reliability of the subtractor device is improved.

Claims (1)

Invention Formula Subtracting counting device with controlled conversion factor, containing decoder, multiplexer, subtracting counter, additional subtracting counter, counting input of the subtracting counter are connected to the counting input of the device, and information inputs of the counting counter are connected to the corresponding inputs of setting the conversion factor of the device, counting input of the parallel recording resolution the code of the additional subtractive counter is connected respectively to the counter input of the subtractive counter and the multiplex output The corr, the address inputs of which are connected to the inputs of the time delay, the information inputs of the multiplexer are connected to the outputs of the decoder, the inputs of which are connected to the outputs of the subtracting counter, the information inputs of which are connected to the corresponding information inputs of the additional subtractive counter, which differs from functional reliability, a digital comparator and an element I are entered into it, the first group of inputs of a digital comparator is connected to the outputs of a subtracting counter, group torus whose input is connected to the reference input unit conversion factors More inverse output of the comparator is connected to a first input of AND gate, a second input and whose output is connected respectively to inverted outputs of the subtractor borrow counter and its write enable input of a parallel code.