SU1566388A1 - Information registering device - Google Patents

Abstract

The invention relates to automation and computing and can be used, for example, in computer output devices. In order to improve speed, a group of elements AND 6, a group of analog storage elements 5, a demultiplexer 4, a digital-to-analog converter 3, a synchronization unit 1, and a print mode control unit 2 are introduced into the device. This ensures optimum heating of the elements, regardless of print density. 3 il.

Description

ate

about

O5 CO 00 00

Par.1

The invention relates to automation and computing and can be used, for example, in computer output devices.

The aim of the invention is to increase speed.

Figure 1 shows the functional diagram of the device; Fig.2 is a functional diagram of the control unit jg inputs of elements And 6, which are closed 15

thirty

print mode; on fig.Z - functional diagram of the synchronization unit.

The device contains a synchronization unit 1, a control unit 2.; A print generator, a digital analog converter 3, a demultiplexer, a group of analog storage elements 5, a group of elements And 6, keys 7, amplifiers 8, a thermal print head 9.

The print mode control unit 2 contains an AND 10 group, a group of counters 11, an IS-NOT 12 element group, a multiplexer 13, a code converter 14.

Synchronization unit 1 contains 25 counter 15 and trigger 16.

The device works as follows.

In the initial state, the code at the output of the meters 11 has the maximum value. In this case, the elements AND-NO 12 provide a logical zero, which is fed to one of the inputs of the elements 10, closing it for passing to the clock input of the counters 11 clock pulses fed to the other inputs of the elements AND-NOT 12 of the synchronization unit. This is done to prevent counter 11 from overflowing when it reaches its maximum condition. To the control inputs (SE) of multiplexer 13, a synchronization block is supplied with a code by means of which the output of the counter 11 is selected, which is fed to the multiplexer output. In the initial state, when the codes issued by the meters 11 are maximum, the converter 3 outputs a voltage that ensures the specified print density in the first operating cycle. From the output of the converter 3, the voltage is fed to the input of the demultiplexer 4, which, depending on the code supplied from the synchronization unit, distributes the voltage to the corresponding analog storage elements 5.

Under the action of clock pulses supplied to the input of the synchronization unit 1, when the counter 15 overflows

35

40

45

50

55

switches 7 in those bits, where the other inputs of the And 6 elements receive the linguistic unit in the input information, Chere 1 closes the voltage with amplitude, onnt-divisible energy, 14-code getter code, is fed to the corresponding heating elements through amplifiers 8 heads 9. At the end of the impulse Heating, the keys are disconnected and, on the falling edge of single information signals from the outputs of the keys, counters 11 are reset at the zero & status in the bits where the printing was made. Counters 11 not participating in this print cycle are not reset to the zero state.

The control signals provide sequential and cyclical storage of energy, represented as voltage, in analog storage elements 5 and coordinated operation of multiplexer 13 and demultiplex 4. At the same time, for example, for the first heating element of the print head 9, the codes of the first counter 11 through the multiplexer are fed to a code converter, from the output of which the print mode code of the first heating element is fed to a digital-to-analog converter 3, is converted into a voltage memorized in the first element 5, when closing the first key, demultiplex 4.

During each successive print cycle, the contents of each of the counters 11 are replenished by recalculating the pulses from the high-bit output of the counter 15. Moreover, the counters corresponding to the elements of the print head that participated in the formation of the printed mark in the previous cycle begin to accumulate the number of pulses from zero, Otherwise, accumulation continues for several cycles until reaching the maximum value at which the output of the element is NOT

output signal request information. Having received this signal, the source of information sets new data at the device input and issues a Print signal, which sets the RS flip-flop 16 into a single state, thereby providing a signal. Heating for one

five

0

0

five

five

0

five

0

five

switches 7 in those bits, where the other inputs of the And 6 elements receive the linguistic unit in the input information, Chere 1 closes the voltage with amplitude, onnt-divisible energy, 14-code getter code, is fed to the corresponding heating elements through amplifiers 8 heads 9. At the end of the impulse Heating, the keys are disconnected and, on the falling edge of single information signals from the outputs of the keys, counters 11 are reset at the zero & status in the bits where the printing was made. Counters 11 not participating in this print cycle are not reset to the zero state.

The control signals provide sequential and cyclical storage of energy, represented as voltage, in analog storage elements 5 and coordinated operation of multiplexer 13 and demultiplexer 4. In this case, for example, for the first heating element of the print head 9, the codes of the first counter 11 are fed through a multiplexer to the code converter, from the output of which the code of the printing mode of the first heating element is fed to the digital-to-analog converter 3, is converted into a voltage memorized in the first element 5, when closing the first key, demultiplex 4.

During each successive print cycle, the contents of each of the counters 11 are replenished by recalculating the pulses from the high-bit output of the counter 15. Moreover, the counters corresponding to the elements of the print head that participated in the formation of the printed mark in the previous cycle begin to accumulate the number of pulses from zero, Otherwise, accumulation continues for several cycles until reaching the maximum value at which the output of the element is NOT

12, a prohibitory level is formed, not transmitting impulses through the elements of AND 10.

The number stored in each counter, And, is converted using elements 13,14, 3 and 4 and is written to the elements 5. The current strength and heating of the corresponding element of the head 9 depends on the value of the number in the counter 11, depending on the inclusion of this element in previous cycles.

Thus, in the device, the heating energy of the elements of the head 9 is adjusted depending on their previous heating.

Claims (2)

Claim 1. Device for recording information containing sequentially connected keys, amplifiers and a heat-printing head, characterized in that, in order to improve speed, it contains a group of elements AND, a group of analog storage elements, a demultiplexer, a digital-analog converter, a synchronization unit and The control unit for the print mode, the outputs of which are connected to the corresponding outputs of the digital-to-analog converter, the information inputs with the outputs of the corresponding elements AND Rupp and with the control inputs of the corresponding keys, a clock, and the address inputs - outputs a corresponding sync block, the input clock and input printing block synchronization are respective inputs 0 five 0 devices, output The request is the corresponding output of the device, and the print control output is connected to the first inputs of elements AND groups, the second inputs of which are the information inputs of the device, the information input of the demultiplexer is connected to the output of the D / A converter, the address inputs to the corresponding outputs of the synchronization unit, and outputs - with the inputs of the corresponding analog storage elements, the outputs of which are connected to the second inputs of the corresponding keys. 2. The device according to claim 1, of which is such that the print mode control unit coax. groups ;, elements AND, a group of counters, a group of elements AND –NE, a multiplex and a code converter, the input of which are outputs of 5poc, the properties are connected to the corresponding outputs of the multiplexer, the address inputs of the multiplexer are address inputs of the block, information YEARS of each group are connected to i, respectively, with the outputs of the corresponding counters of the group and with the inputs of the corresponding AND-NOT groups whose inputs are connected to the first inputs of the corresponding IJ elements of the group, the second inputs of which Ina and are the clock inputs of the block, and the outputs are connected to the counting inputs of the corresponding counter-groups, the inputs Reset Counters are the information inputs Q block. five